diff options
| author | Max Krummenacher <max.krummenacher@toradex.com> | 2019-07-04 19:57:43 +0200 |
|---|---|---|
| committer | Marcel Ziswiler <marcel.ziswiler@toradex.com> | 2020-02-12 11:05:58 +0100 |
| commit | 4bfb19388251ba644a8c831a65c63d7e7b75b7d6 (patch) | |
| tree | 7e432d430e7a9aba55a05ee3bc73907ed594db29 | |
| parent | df6f72c6fee2aff9d1c7691901c005aa11e62317 (diff) | |
arm64: dts: fsl-imx8qxp-colibri: add mipi camera with nxp's v3 driver
Related to: #42565
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
| -rw-r--r-- | arch/arm64/boot/dts/freescale/fsl-imx8qxp-colibri-dsihdmi-eval-v3.dts | 10 | ||||
| -rw-r--r-- | arch/arm64/boot/dts/freescale/fsl-imx8qxp-colibri-eval-v3.dtsi | 73 |
2 files changed, 71 insertions, 12 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qxp-colibri-dsihdmi-eval-v3.dts b/arch/arm64/boot/dts/freescale/fsl-imx8qxp-colibri-dsihdmi-eval-v3.dts index 6a91caaaaeac..db82278713d1 100644 --- a/arch/arm64/boot/dts/freescale/fsl-imx8qxp-colibri-dsihdmi-eval-v3.dts +++ b/arch/arm64/boot/dts/freescale/fsl-imx8qxp-colibri-dsihdmi-eval-v3.dts @@ -178,16 +178,6 @@ }; }; -/* DSI/LVDS port 1 */ -&i2c0_mipi_lvds1 { - #address-cells = <1>; - #size-cells = <0>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c0_mipi_csi>; - clock-frequency = <100000>; - status = "disabled"; -}; - &ldb2_phy { status = "disabled"; }; diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qxp-colibri-eval-v3.dtsi b/arch/arm64/boot/dts/freescale/fsl-imx8qxp-colibri-eval-v3.dtsi index bc2c66d8d3f4..4564d79fe0fc 100644 --- a/arch/arm64/boot/dts/freescale/fsl-imx8qxp-colibri-eval-v3.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-imx8qxp-colibri-eval-v3.dtsi @@ -101,6 +101,13 @@ >; }; + pinctrl_csi_ctl: csictlgrp { + fsl,pins = < + SC_P_QSPI0A_SS0_B_LSIO_GPIO3_IO14 0x00000020 /* 77 */ + SC_P_QSPI0A_SS1_B_LSIO_GPIO3_IO15 0x00000020 /* 89 */ + >; + }; + pinctrl_lpuart0: lpuart0grp { fsl,pins = < SC_P_UART0_RX_ADMA_UART0_RX 0x06000020 @@ -215,8 +222,6 @@ pinctrl_hog2: hog2grp { fsl,pins = < SC_P_CSI_MCLK_LSIO_GPIO3_IO01 0x00000020 /* 75 */ - SC_P_QSPI0A_SS0_B_LSIO_GPIO3_IO14 0x00000020 /* 77 */ - SC_P_QSPI0A_SS1_B_LSIO_GPIO3_IO15 0x00000020 /* 89 */ SC_P_QSPI0A_SCLK_LSIO_GPIO3_IO16 0x00000020 /* 93 */ >; }; @@ -790,6 +795,53 @@ }; }; +&i2c0_mipi_lvds1 { + #address-cells = <1>; + #size-cells = <0>; + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c0_mipi_csi>; + status = "okay"; + + ov5640_mipi: ov5640_mipi@3c { + compatible = "ovti,ov5640_mipi_v3"; + clocks = <&clk IMX8QXP_24MHZ>; + clock-names = "csi_mclk"; + csi_id = <0>; + mclk = <24000000>; + mclk_source = <0>; + mipi_csi; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_csi_ctl>; + pwn-gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>; + reg = <0x3c>; + rst-gpios = <&gpio3 15 GPIO_ACTIVE_LOW>; + status = "okay"; + + port { + ov5640_ep: endpoint { + remote-endpoint = <&mipi_csi0_ep>; + }; + }; + }; +}; + +&isi_0 { + status = "okay"; +}; + +&isi_1 { + status = "okay"; +}; + +&isi_2 { + status = "okay"; +}; + +&isi_3 { + status = "okay"; +}; + &lpspi2 { #address-cells = <1>; #size-cells = <0>; @@ -806,6 +858,23 @@ }; }; +&mipi_csi_0 { + #address-cells = <1>; + #size-cells = <0>; + /delete-property/virtual-channel; + status = "okay"; + + /* Camera 0 MIPI CSI-2 (CSIS0) */ + port@0 { + reg = <0>; + + mipi_csi0_ep: endpoint { + data-lanes = <1 2>; + remote-endpoint = <&ov5640_ep>; + }; + }; +}; + &pcieb{ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pcieb &pinctrl_wifi>; |