diff options
author | Clement Faure <clement.faure@nxp.com> | 2018-04-13 11:11:36 +0200 |
---|---|---|
committer | Jason Liu <jason.hui.liu@nxp.com> | 2019-02-12 10:31:22 +0800 |
commit | c180569c63d047816aa00a49b38ff6bdcf0e4404 (patch) | |
tree | 5d64a2511e05eb15d2225f0cd3bae02f63f12b3c | |
parent | d6f6f7e13e62065ac1a9543eb0e675c565576c98 (diff) |
MLK-18036-1 Add "fsl,optee-lpm-sram" node for optee os power management.
This node will be used by the OCRAM driver in optee to:
* Get the OCRAM start address for power management in optee.
* Add an entry that will overwrite ocrams nodes and dynamically reduce
the OCRAM available for mmio-sram in Linux.
That way we do not touch the legacy Linux boot and remove the dedicated
optee device tree.
Signed-off-by: Clement Faure <clement.faure@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
-rw-r--r-- | arch/arm/boot/dts/imx6dl.dtsi | 7 | ||||
-rw-r--r-- | arch/arm/boot/dts/imx6q.dtsi | 7 | ||||
-rw-r--r-- | arch/arm/boot/dts/imx6sl.dtsi | 7 | ||||
-rw-r--r-- | arch/arm/boot/dts/imx6sll.dtsi | 10 | ||||
-rw-r--r-- | arch/arm/boot/dts/imx6sx.dtsi | 10 | ||||
-rw-r--r-- | arch/arm/boot/dts/imx6ul.dtsi | 8 | ||||
-rw-r--r-- | arch/arm/boot/dts/imx6ull.dtsi | 8 | ||||
-rw-r--r-- | arch/arm/boot/dts/imx7d.dtsi | 11 |
8 files changed, 63 insertions, 5 deletions
diff --git a/arch/arm/boot/dts/imx6dl.dtsi b/arch/arm/boot/dts/imx6dl.dtsi index 7a45f9c2bc8d..03fcba6e3222 100644 --- a/arch/arm/boot/dts/imx6dl.dtsi +++ b/arch/arm/boot/dts/imx6dl.dtsi @@ -1,6 +1,7 @@ /* * Copyright 2013-2015 Freescale Semiconductor, Inc. + * Copyright 2018 NXP * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as @@ -120,6 +121,12 @@ clocks = <&clks IMX6QDL_CLK_OCRAM>; }; + ocram_optee: sram@00918000 { + compatible = "fsl,optee-lpm-sram"; + reg = <0x00918000 0x8000>; + overw_reg = <&ocram 0x00905000 0x13000>; + }; + aips1: aips-bus@02000000 { iomuxc: iomuxc@020e0000 { compatible = "fsl,imx6dl-iomuxc"; diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi index 83dab03921bf..4dabb0997aeb 100644 --- a/arch/arm/boot/dts/imx6q.dtsi +++ b/arch/arm/boot/dts/imx6q.dtsi @@ -1,6 +1,7 @@ /* * Copyright 2013-2015 Freescale Semiconductor, Inc. + * Copyright 2018 NXP * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as @@ -139,6 +140,12 @@ clocks = <&clks IMX6QDL_CLK_OCRAM>; }; + ocram_optee: sram@00938000 { + compatible = "fsl,optee-lpm-sram"; + reg = <0x00938000 0x8000>; + overw_reg = <&ocram 0x00905000 0x33000>; + }; + aips-bus@02000000 { /* AIPS1 */ spba-bus@02000000 { ecspi5: ecspi@02018000 { diff --git a/arch/arm/boot/dts/imx6sl.dtsi b/arch/arm/boot/dts/imx6sl.dtsi index a3355e579e7c..4738b2559f82 100644 --- a/arch/arm/boot/dts/imx6sl.dtsi +++ b/arch/arm/boot/dts/imx6sl.dtsi @@ -1,5 +1,6 @@ /* * Copyright 2013-2016 Freescale Semiconductor, Inc. + * Copyright 2018 NXP * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as @@ -176,6 +177,12 @@ clocks = <&clks IMX6SL_CLK_OCRAM>; }; + ocram_optee: sram@00918000 { + compatible = "fsl,optee-lpm-sram"; + reg = <0x00918000 0x8000>; + overw_reg = <&ocram 0x00905000 0x13000>; + }; + L2: l2-cache@00a02000 { compatible = "arm,pl310-cache"; reg = <0x00a02000 0x1000>; diff --git a/arch/arm/boot/dts/imx6sll.dtsi b/arch/arm/boot/dts/imx6sll.dtsi index d76c363ec5af..8b2e72bf61fe 100644 --- a/arch/arm/boot/dts/imx6sll.dtsi +++ b/arch/arm/boot/dts/imx6sll.dtsi @@ -1,6 +1,6 @@ /* * Copyright 2016 Freescale Semiconductor, Inc. - * Copyright 2017 NXP. + * Copyright 2017-2018 NXP * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as @@ -167,6 +167,12 @@ reg = <0x00905000 0x1B000>; }; + ocram_optee: sram@00918000 { + compatible = "fsl,optee-lpm-sram"; + reg = <0x00918000 0x8000>; + overw_reg = <&ocram 0x00905000 0x13000>; + }; + L2: l2-cache@00a02000 { compatible = "arm,pl310-cache"; reg = <0x00a02000 0x1000>; @@ -679,7 +685,7 @@ <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clks IMX6SLL_CLK_DCP>; clock-names = "dcp"; - }; + }; }; aips2: aips-bus@02100000 { diff --git a/arch/arm/boot/dts/imx6sx.dtsi b/arch/arm/boot/dts/imx6sx.dtsi index 152926d500e5..78bbfe900e5a 100644 --- a/arch/arm/boot/dts/imx6sx.dtsi +++ b/arch/arm/boot/dts/imx6sx.dtsi @@ -1,5 +1,6 @@ /* * Copyright 2014-2016 Freescale Semiconductor, Inc. + * Copyright 2018 NXP * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as @@ -219,6 +220,15 @@ clocks = <&clks IMX6SX_CLK_OCRAM>; }; + ocram_optee { + compatible = "fsl,optee-lpm-sram"; + reg = <0x008f8000 0x4000>; + overw_reg = <&ocrams_ddr 0x00904000 0x1000>, + <&ocram 0x00905000 0x1b000>, + <&ocrams 0x00900000 0x4000>; + overw_clock = <&ocrams &clks IMX6SX_CLK_OCRAM>; + }; + L2: l2-cache@00a02000 { compatible = "arm,pl310-cache"; reg = <0x00a02000 0x1000>; diff --git a/arch/arm/boot/dts/imx6ul.dtsi b/arch/arm/boot/dts/imx6ul.dtsi index efe0ea135ca4..6562c256f241 100644 --- a/arch/arm/boot/dts/imx6ul.dtsi +++ b/arch/arm/boot/dts/imx6ul.dtsi @@ -1,6 +1,6 @@ /* * Copyright 2015-2016 Freescale Semiconductor, Inc. - * Copyright 2017 NXP. + * Copyright 2017-2018 NXP * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as @@ -185,6 +185,12 @@ reg = <0x00905000 0x1B000>; }; + ocram_optee: sram@00918000 { + compatible = "fsl,optee-lpm-sram"; + reg = <0x00918000 0x8000>; + overw_reg = <&ocram 0x00905000 0x13000>; + }; + dma_apbh: dma-apbh@01804000 { compatible = "fsl,imx6q-dma-apbh", "fsl,imx28-dma-apbh"; reg = <0x01804000 0x2000>; diff --git a/arch/arm/boot/dts/imx6ull.dtsi b/arch/arm/boot/dts/imx6ull.dtsi index d9579de06dba..802ab78b719c 100644 --- a/arch/arm/boot/dts/imx6ull.dtsi +++ b/arch/arm/boot/dts/imx6ull.dtsi @@ -1,6 +1,6 @@ /* * Copyright 2016 Freescale Semiconductor, Inc. - * Copyright 2017 NXP. + * Copyright 2017-2018 NXP * * This file is dual-licensed: you can use it either under the terms * of the GPL or the X11 license, at your option. Note that this dual @@ -217,6 +217,12 @@ reg = <0x00905000 0x1B000>; }; + ocram_optee: sram@00918000 { + compatible = "fsl,optee-lpm-sram"; + reg = <0x00918000 0x8000>; + overw_reg = <&ocram 0x00905000 0x13000>; + }; + dma_apbh: dma-apbh@01804000 { compatible = "fsl,imx6ul-dma-apbh", "fsl,imx28-dma-apbh"; reg = <0x01804000 0x2000>; diff --git a/arch/arm/boot/dts/imx7d.dtsi b/arch/arm/boot/dts/imx7d.dtsi index 939584bddd04..3b76c80d8b4e 100644 --- a/arch/arm/boot/dts/imx7d.dtsi +++ b/arch/arm/boot/dts/imx7d.dtsi @@ -1,7 +1,7 @@ /* * Copyright 2015-2016 Freescale Semiconductor, Inc. * Copyright 2016 Toradex AG - * Copyright 2017 NXP. + * Copyright 2017-2018 NXP * * This file is dual-licensed: you can use it either under the terms * of the GPL or the X11 license, at your option. Note that this dual @@ -160,6 +160,15 @@ reg = <0x00900000 0x20000>; clocks = <&clks IMX7D_OCRAM_CLK>; }; + + ocram_optee { + compatible = "fsl,optee-lpm-sram"; + reg = <0x00180000 0x8000>; + overw_reg = <&ocrams_ddr 0x00904000 0x1000>, + <&ocram 0x00905000 0x1b000>, + <&ocrams 0x00900000 0x4000>; + overw_clock = <&ocrams &clks IMX7D_OCRAM_CLK>; + }; }; }; |