diff options
| author | Leonard Crestez <leonard.crestez@nxp.com> | 2018-03-07 22:49:10 +0200 |
|---|---|---|
| committer | Jason Liu <jason.hui.liu@nxp.com> | 2019-02-12 10:24:39 +0800 |
| commit | ecb76bafaeeae50f972bd99972e468a9438a57ea (patch) | |
| tree | ac117550561686f14b7a2a577fc33f3dbd839caa | |
| parent | be03a9f3c30021185cc06d8a2be357ca784b6796 (diff) | |
MLK-12746-1: ARM: dts: add QSPI support on i.MX6ULL
support QSPI on i.MX6ULL. By default, only QSPI1 was enabled, while
reworked board could support all 4 QSPI chips.
Signed-off-by: Han Xu <han.xu@nxp.com>
| -rw-r--r-- | arch/arm/boot/dts/Makefile | 1 | ||||
| -rw-r--r-- | arch/arm/boot/dts/imx6ull-14x14-ddr3-arm2-qspi.dts | 18 | ||||
| -rw-r--r-- | arch/arm/boot/dts/imx6ull-14x14-ddr3-arm2.dts | 7 | ||||
| -rw-r--r-- | arch/arm/boot/dts/imx6ull.dtsi | 2 |
4 files changed, 26 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index b57c24f87ee0..5398eca027cf 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -545,6 +545,7 @@ dtb-$(CONFIG_SOC_IMX6ULL) += \ imx6ull-14x14-ddr3-arm2-flexcan2.dtb \ imx6ull-14x14-ddr3-arm2-gpmi-weim.dtb \ imx6ull-14x14-ddr3-arm2-lcdif.dtb \ + imx6ull-14x14-ddr3-arm2-qspi.dtb \ imx6ull-14x14-ddr3-arm2-uart2.dtb \ imx6ull-14x14-ddr3-arm2-usb.dtb \ imx6ull-14x14-evk.dtb diff --git a/arch/arm/boot/dts/imx6ull-14x14-ddr3-arm2-qspi.dts b/arch/arm/boot/dts/imx6ull-14x14-ddr3-arm2-qspi.dts new file mode 100644 index 000000000000..63659bdc1ac3 --- /dev/null +++ b/arch/arm/boot/dts/imx6ull-14x14-ddr3-arm2-qspi.dts @@ -0,0 +1,18 @@ +/* + * Copyright (C) 2016 Freescale Semiconductor, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#define REWORKED_ENABLE_ALL_QSPI +#include "imx6ull-14x14-ddr3-arm2.dts" + +&gpmi { + status = "disabled"; +}; + +&usdhc2 { + status = "disabled"; +}; diff --git a/arch/arm/boot/dts/imx6ull-14x14-ddr3-arm2.dts b/arch/arm/boot/dts/imx6ull-14x14-ddr3-arm2.dts index 8486b14d420d..3642016c316f 100644 --- a/arch/arm/boot/dts/imx6ull-14x14-ddr3-arm2.dts +++ b/arch/arm/boot/dts/imx6ull-14x14-ddr3-arm2.dts @@ -905,8 +905,10 @@ &qspi { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_qspi>; - status = "disabled"; + status = "okay"; +#ifdef REWORKED_ENABLE_ALL_QSPI fsl,qspi-has-second-chip = <1>; +#endif ddrsmp=<0>; flash0: n25q256a@0 { @@ -918,6 +920,8 @@ reg = <0>; }; +#ifdef REWORKED_ENABLE_ALL_QSPI + flash1: n25q256a@1 { #address-cells = <1>; #size-cells = <1>; @@ -944,6 +948,7 @@ spi-nor,ddr-quad-read-dummy = <6>; reg = <3>; }; +#endif }; &uart1 { diff --git a/arch/arm/boot/dts/imx6ull.dtsi b/arch/arm/boot/dts/imx6ull.dtsi index df3bc9482979..819ba84cccc8 100644 --- a/arch/arm/boot/dts/imx6ull.dtsi +++ b/arch/arm/boot/dts/imx6ull.dtsi @@ -1042,7 +1042,7 @@ qspi: qspi@021e0000 { #address-cells = <1>; #size-cells = <0>; - compatible = "fsl,imx6ul-qspi"; + compatible = "fsl,imx6ull-qspi", "fsl,imx6ul-qspi"; reg = <0x021e0000 0x4000>, <0x60000000 0x10000000>; reg-names = "QuadSPI", "QuadSPI-memory"; interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; |