diff options
| author | Stefan Eichenberger <stefan.eichenberger@toradex.com> | 2020-09-15 10:54:11 +0200 |
|---|---|---|
| committer | Max Krummenacher <max.krummenacher@toradex.com> | 2022-12-21 13:14:08 +0100 |
| commit | aab589b0c9354522723e643c540691644bf89c11 (patch) | |
| tree | 3dd6ba10568e1784bd5103142b9a8839395eec22 | |
| parent | bbbc03a7f6259c916eb2bc4db7a5fbf6c1a7c48d (diff) | |
drm: imx8: fix hdmi firmware load
Loading the hdmi firmware from kernel is broken. The firmware is loaded
from filesystem but never sent to the hdmi controller. This commit fixes
it by waiting for the firmware load to complete and afterwards transfer
it to the controller.
Signed-off-by: Stefan Eichenberger <stefan.eichenberger@toradex.com>
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Upstream-Status: Pending
Downstream specific, i.MX 8 HDMI subsystem not yet in upstream.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
| -rw-r--r-- | drivers/gpu/drm/imx/mhdp/cdns-mhdp-imx8qm.c | 26 |
1 files changed, 21 insertions, 5 deletions
diff --git a/drivers/gpu/drm/imx/mhdp/cdns-mhdp-imx8qm.c b/drivers/gpu/drm/imx/mhdp/cdns-mhdp-imx8qm.c index 4fca888c3991..20fc9f90a0ae 100644 --- a/drivers/gpu/drm/imx/mhdp/cdns-mhdp-imx8qm.c +++ b/drivers/gpu/drm/imx/mhdp/cdns-mhdp-imx8qm.c @@ -12,6 +12,7 @@ #include <linux/clk.h> #include <drm/drm_vblank.h> #include <drm/drm_print.h> +#include <linux/delay.h> #include "cdns-mhdp-imx.h" @@ -554,6 +555,7 @@ static int cdns_mhdp_firmware_load(struct imx_mhdp_device *imx_mhdp) { const u8 *iram; const u8 *dram; + int i; u32 rate; int ret; @@ -578,14 +580,28 @@ static int cdns_mhdp_firmware_load(struct imx_mhdp_device *imx_mhdp) DRM_ERROR("failed to load firmware\n"); return -ENOENT; } - } else { - iram = imx_mhdp->fw->data + FW_IRAM_OFFSET; - dram = iram + FW_IRAM_SIZE; + } - cdns_mhdp_firmware_write_section(imx_mhdp, iram, FW_IRAM_SIZE, ADDR_IMEM); - cdns_mhdp_firmware_write_section(imx_mhdp, dram, FW_DRAM_SIZE, ADDR_DMEM); + for (i = 0; i < 10; i++) { + if (imx_mhdp->fw) + break; + usleep_range(1000, 10000); } + if (!imx_mhdp->fw) { + DRM_ERROR("FW loading timed out\n"); + return -ENXIO; + } + + /* Copy the firmware to the hdmi controller */ + iram = imx_mhdp->fw->data + FW_IRAM_OFFSET; + dram = iram + FW_IRAM_SIZE; + + cdns_mhdp_firmware_write_section(imx_mhdp, iram, + FW_IRAM_SIZE, ADDR_IMEM); + cdns_mhdp_firmware_write_section(imx_mhdp, dram, + FW_DRAM_SIZE, ADDR_DMEM); + out: /* un-reset ucpu */ cdns_mhdp_bus_write(0, &imx_mhdp->mhdp, APB_CTRL); |