diff options
| author | Marcel Ziswiler <marcel.ziswiler@toradex.com> | 2020-12-14 09:30:26 +0100 |
|---|---|---|
| committer | Marcel Ziswiler <marcel.ziswiler@toradex.com> | 2020-12-14 09:45:13 +0100 |
| commit | d4d4c7a9357648c45de7268865c668c9b15d1da1 (patch) | |
| tree | 8bb993e870fbe7b6fa1b96b37088078547bed55c | |
| parent | c1108d7fae5ff53483c2903e0e4622174854f62e (diff) | |
arm64: dts: imx8mp-verdin: ethernet workaround
Work around potential probe deferral, order and race condition issues.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
| -rwxr-xr-x | arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi | 14 |
1 files changed, 8 insertions, 6 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi index 2e0dd66ce297..5c249cabda56 100755 --- a/arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi @@ -74,6 +74,8 @@ off-on-delay = <500000>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_reg_eth>; + regulator-always-on; + regulator-boot-on; regulator-max-microvolt = <3300000>; regulator-min-microvolt = <3300000>; regulator-name = "V3.3_ETH"; @@ -178,7 +180,7 @@ &eqos { phy-handle = <ðphy0>; phy-mode = "rgmii-id"; - phy-supply = <®_ethphy>; +// phy-supply = <®_ethphy>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_eqos>; @@ -189,10 +191,10 @@ ethphy0: ethernet-phy@7 { compatible = "ethernet-phy-ieee802.3-c22"; - interrupt-parent = <&gpio1>; - interrupts = <10 IRQ_TYPE_LEVEL_LOW>; - reg = <7>; +// interrupt-parent = <&gpio1>; +// interrupts = <10 IRQ_TYPE_LEVEL_LOW>; micrel,led-mode = <0>; + reg = <7>; }; }; }; @@ -211,8 +213,8 @@ ethphy1: ethernet-phy@7 { compatible = "ethernet-phy-ieee802.3-c22"; - interrupt-parent = <&gpio4>; - interrupts = <18 IRQ_TYPE_LEVEL_LOW>; +// interrupt-parent = <&gpio4>; +// interrupts = <18 IRQ_TYPE_LEVEL_LOW>; micrel,led-mode = <0>; reg = <7>; }; |