diff options
author | Marcel Ziswiler <marcel.ziswiler@toradex.com> | 2021-04-02 02:12:57 +0200 |
---|---|---|
committer | Marcel Ziswiler <marcel.ziswiler@toradex.com> | 2021-04-02 02:18:07 +0200 |
commit | bd7c3fa375600a1aa71d56cfb081184d800dd78b (patch) | |
tree | 4f9d69e6ef614e8d1848f75689f8b0f7a0d86948 | |
parent | a0e2111014c66e01ccf439b1d507e0ab3fecc818 (diff) |
arm64: dts: colibri-imx8x: prepare for csi camera module 5mp ov5640
Prepare the main device tree to work with a device tree overlay for
the CSI Camera Module 5MP OV5640 previously orderable at Toradex.
- remove cameradev disabling
- split SODIMM 75 resp. FFC X3-12 from pinctrl_hog2 to an optional
pinctrl_csi_mclk or pinctrl_hog3
- enabled missing irqsteer_csi0 node
- clean-up isi_0 node
Related-to: ELB-3883
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
-rw-r--r-- | arch/arm64/boot/dts/freescale/imx8qxp-colibri.dtsi | 47 |
1 files changed, 33 insertions, 14 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-colibri.dtsi b/arch/arm64/boot/dts/freescale/imx8qxp-colibri.dtsi index e0eeb619804b..1fc13f9c3240 100644 --- a/arch/arm64/boot/dts/freescale/imx8qxp-colibri.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8qxp-colibri.dtsi @@ -236,10 +236,6 @@ #pwm-cells = <3>; }; -&cameradev { - status = "disabled"; -}; - /* Display Prefetch Resolve, (Tiling) */ &dc0_dpr1_channel1 { status = "okay"; @@ -598,8 +594,14 @@ pinctrl_csi_ctl: csictlgrp { fsl,pins = < - IMX8QXP_QSPI0A_SS0_B_LSIO_GPIO3_IO14 0x20 /* SODIMM 77 */ - IMX8QXP_QSPI0A_SS1_B_LSIO_GPIO3_IO15 0x20 /* SODIMM 89 */ + IMX8QXP_QSPI0A_SS0_B_LSIO_GPIO3_IO14 0x20 /* SODIMM 77 / X3-22 */ + IMX8QXP_QSPI0A_SS1_B_LSIO_GPIO3_IO15 0x20 /* SODIMM 89 / X3-23 */ + >; + }; + + pinctrl_csi_mclk: csimclkgrp { + fsl,pins = < + IMX8QXP_CSI_MCLK_CI_PI_MCLK 0xC0000041 /* SODIMM 75 / X3-12 */ >; }; @@ -728,11 +730,16 @@ pinctrl_hog2: hog2grp { fsl,pins = < - IMX8QXP_CSI_MCLK_LSIO_GPIO3_IO01 0x20 /* SODIMM 75 */ IMX8QXP_QSPI0A_SCLK_LSIO_GPIO3_IO16 0x20 /* SODIMM 93 */ >; }; + pinctrl_hog3: hog3grp { + fsl,pins = < + IMX8QXP_CSI_MCLK_LSIO_GPIO3_IO01 0x20 /* SODIMM 75 */ + >; + }; + /* * This pin is used in the SCFW as a UART. Using it from * Linux would require rewritting the SCFW board file. @@ -1072,14 +1079,26 @@ }; }; +&irqsteer_csi0 { + status = "okay"; +}; + &isi_0 { - interface = <2 0 2>; - /** - * interface = <Input MIPI_VCx Output> - * Input: 0-DC0, 1-DC1, 2-MIPI CSI0, 3-MIPI CSI1, 4-HDMI, 5-MEM, INPUT: 6-PARALLEL CSI - * MIPI_VCx: 0-VC0, 1-VC1, 2-VC2, 3-VC3, MIPI CSI only - * Output: 0-DC0, 1-DC1, 2-MEM - */ + /** + * interface = <Input MIPI_VCx Output> + * Input: 0-DC0, 1-DC1, 2-MIPI CSI0, 3-MIPI CSI1, 4-HDMI, 5-MEM, INPUT: 6-PARALLEL CSI + * MIPI_VCx: 0-VC0, 1-VC1, 2-VC2, 3-VC3, MIPI CSI only + * Output: 0-DC0, 1-DC1, 2-MEM + */ + interface = <2 0 2>; + + cap_device { + status = "okay"; + }; + + m2m_device { + status = "okay"; + }; }; &isi_1 { |