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authorMax Krummenacher <max.krummenacher@toradex.com>2024-02-07 16:17:19 +0100
committerMax Krummenacher <max.krummenacher@toradex.com>2024-02-07 18:50:27 +0100
commit0dae0c54feafd327366df4eac6f8948d2b167afa (patch)
tree15bac3b3d180297d0d6a85ad33881877087bfc83
parent340d0000d1e277a5ec64e5bd903dab8ed1df1860 (diff)
Revert "Revert "mtd: rawnand: gpmi: Fix setting busy timeout setting""toradex_5.4.y
This reverts commit 15a3adfe75937c9e4e0e48f0ed40dd39a0e526e2. The backport of [1] relies on having [2] also backported. Having only one of the two results in a bogus hw->timing1 setting. If only [2] is backportet the 16 bit register value likely underflows resulting in a busy_wait_timeout of 0. Or if only [1] is applied the value likely overflows with chances of having last 16 LSBs all 0 which would then result in a busy_wait_timeout of 0 too. Both cases may lead to NAND data corruption, e.g. on a Colibri iMX7 setup this has been seen. [1] commit 0fddf9ad06fd ("mtd: rawnand: gpmi: Set WAIT_FOR_READY timeout based on program/erase times") [2] commit 06781a5026350 ("mtd: rawnand: gpmi: Fix setting busy timeout setting") Upstream-Status: Submitted [https://lore.kernel.org/all/20240207174911.870822-1-max.oss.09@gmail.com/] Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
-rw-r--r--drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c b/drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c
index b806a762d079..fdf5cf5565f9 100644
--- a/drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c
+++ b/drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c
@@ -684,7 +684,7 @@ static void gpmi_nfc_compute_timings(struct gpmi_nand_data *this,
hw->timing0 = BF_GPMI_TIMING0_ADDRESS_SETUP(addr_setup_cycles) |
BF_GPMI_TIMING0_DATA_HOLD(data_hold_cycles) |
BF_GPMI_TIMING0_DATA_SETUP(data_setup_cycles);
- hw->timing1 = BF_GPMI_TIMING1_BUSY_TIMEOUT(busy_timeout_cycles * 4096);
+ hw->timing1 = BF_GPMI_TIMING1_BUSY_TIMEOUT(DIV_ROUND_UP(busy_timeout_cycles, 4096));
/*
* Derive NFC ideal delay from {3}: