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authorMax Krummenacher <max.oss.09@gmail.com>2021-01-11 16:17:04 +0100
committerMax Krummenacher <max.krummenacher@toradex.com>2021-02-01 10:10:45 +0100
commitbb2267dff284200dc5fa1dbed857206df8996210 (patch)
tree34f57b3d794e167abae064034eba854f2b1870c9
parentba1343756ce90a70de8090564ee34c394edbe4e6 (diff)
ARM: imx: build suspend-imx6.S with arm instruction set
When the kernel is configured to use the Thumb-2 instruction set "suspend-to-memory" fails to resume. Observed on a Colibri iMX6ULL (i.MX 6ULL) and Apalis iMX6 (i.MX 6Q). It looks like the CPU resumes unconditionally in ARM instruction mode and then chokes on the presented Thumb-2 code it should execute. Fix this by using the arm instruction set for all code in suspend-imx6.S. Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com> Fixes: df595746fa69 ("ARM: imx: add suspend in ocram support for i.mx6q") Acked-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org> (cherry picked from commit a88afa46b86ff461c89cc33fc3a45267fff053e8) Related-to: ELB-3434 Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
-rw-r--r--arch/arm/mach-imx/suspend-imx6.S1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/mach-imx/suspend-imx6.S b/arch/arm/mach-imx/suspend-imx6.S
index 1eabf2d2834b..e06f946b75b9 100644
--- a/arch/arm/mach-imx/suspend-imx6.S
+++ b/arch/arm/mach-imx/suspend-imx6.S
@@ -67,6 +67,7 @@
#define MX6Q_CCM_CCR 0x0
.align 3
+ .arm
.macro sync_l2_cache