diff options
author | Sanchayan Maity <maitysanchayan@gmail.com> | 2016-05-18 18:37:43 +0530 |
---|---|---|
committer | Max Krummenacher <max.krummenacher@toradex.com> | 2016-06-24 11:08:16 +0200 |
commit | 0368155fc985c8e2bf6334fc5b56ff2ac6082908 (patch) | |
tree | 56f48320b0f702b3f72544291e0aabe656f093ba | |
parent | 56d10e53f3ccd59b5af434dda2f7f2d10a504416 (diff) |
mxc_v4l2_capture: Allow clock setting for de-interlaced video input
Make provision for a decoder driver to specify clock mode for
progressive in case the decoder provides deinterlaced output.
This is required for ADV7280 decoder where we can use the hardware
deinterlace capabity of ADV7280. Without setting the clock mode
to progressive but having hardware deinterlace on for ADV7280
results in a non working setup.
Signed-off-by: Sanchayan Maity <sanchayan.maity@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
-rw-r--r-- | drivers/media/platform/mxc/capture/mxc_v4l2_capture.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/media/platform/mxc/capture/mxc_v4l2_capture.c b/drivers/media/platform/mxc/capture/mxc_v4l2_capture.c index d00b7eb8c17f..505249040a63 100644 --- a/drivers/media/platform/mxc/capture/mxc_v4l2_capture.c +++ b/drivers/media/platform/mxc/capture/mxc_v4l2_capture.c @@ -1367,6 +1367,8 @@ static int mxc_v4l2_s_param(cam_data *cam, struct v4l2_streamparm *parm) pr_debug(" clock_curr=mclk=%d\n", ifparm.u.bt656.clock_curr); if (ifparm.u.bt656.clock_curr == 0) csi_param.clk_mode = IPU_CSI_CLK_MODE_CCIR656_INTERLACED; + else if (ifparm.u.bt656.clock_curr == 1) + csi_param.clk_mode = IPU_CSI_CLK_MODE_CCIR656_PROGRESSIVE; else csi_param.clk_mode = IPU_CSI_CLK_MODE_GATED_CLK; |