diff options
| author | Stefan Agner <stefan.agner@toradex.com> | 2016-09-22 15:02:02 -0700 |
|---|---|---|
| committer | Max Krummenacher <max.krummenacher@toradex.com> | 2016-09-29 15:23:04 +0200 |
| commit | 8a91ecf06aa0155b36641630ee1ee932c3855fe2 (patch) | |
| tree | 7a11668700bbd180c776b1e6946f9988045fff5b | |
| parent | 315740d8fe6a0517219c0b479bad4a7db3e7ac30 (diff) | |
arm: dts: imx7: assign CAN interrupt pin explicitly
The SPI CAN controller MCP2515 uses a dedicated interrupt line.
Assign the interrupt line to the CAN controller node explicitly.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
| -rw-r--r-- | arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi | 2 | ||||
| -rw-r--r-- | arch/arm/boot/dts/imx7-colibri.dtsi | 7 |
2 files changed, 8 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi index 1254aaee6a0f..8255b7e742eb 100644 --- a/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi +++ b/arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi @@ -69,6 +69,8 @@ mcp258x0: mcp258x@1 { compatible = "microchip,mcp2515"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_can_int>; reg = <0>; clocks = <&clk16m>; interrupt-parent = <&gpio3>; diff --git a/arch/arm/boot/dts/imx7-colibri.dtsi b/arch/arm/boot/dts/imx7-colibri.dtsi index a79967207920..fb97088fbf75 100644 --- a/arch/arm/boot/dts/imx7-colibri.dtsi +++ b/arch/arm/boot/dts/imx7-colibri.dtsi @@ -318,7 +318,6 @@ MX7D_PAD_UART3_RTS_B__GPIO4_IO6 0x14 /* SODIMM 131 USBH OC */ MX7D_PAD_ENET1_RGMII_RD3__GPIO7_IO3 0x74 /* SODIMM 55 */ MX7D_PAD_ENET1_RGMII_RD2__GPIO7_IO2 0x74 /* SODIMM 63 */ - MX7D_PAD_SD1_RESET_B__GPIO5_IO2 0X14 /* SODIMM 73 */ MX7D_PAD_SAI1_RX_SYNC__GPIO6_IO16 0X14 /* SODIMM 77 */ MX7D_PAD_EPDC_DATA09__GPIO2_IO9 0x14 /* SODIMM 89 */ MX7D_PAD_EPDC_DATA08__GPIO2_IO8 0x74 /* SODIMM 91 */ @@ -403,6 +402,12 @@ >; }; + pinctrl_can_int: canintgrp { + fsl,pins = < + MX7D_PAD_SD1_RESET_B__GPIO5_IO2 0X14 /* SODIMM 73 */ + >; + }; + pinctrl_enet1: enet1grp { fsl,pins = < MX7D_PAD_ENET1_RGMII_RX_CTL__ENET1_RGMII_RX_CTL 0x73 |