diff options
| author | Stefan Agner <stefan.agner@toradex.com> | 2018-01-17 11:23:53 +0100 |
|---|---|---|
| committer | Stefan Agner <stefan.agner@toradex.com> | 2018-01-17 12:32:44 +0100 |
| commit | a79214d7fc1e34e8ea01b0b9e6136deeb173d38c (patch) | |
| tree | 5fb338616e4daea4401e0281d53aa739f58edb49 | |
| parent | f53ff75c1eee0cfb7ad91ce1f0eb92d087181b38 (diff) | |
PCI: imx6: add external clock support for i.MX8QM
Add external reference clock via clock tree. This allows to model
the shared reference clock provided via PCIE_SATA_REFCLK100M_P/N
properly.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
| -rw-r--r-- | drivers/pci/host/pci-imx6.c | 13 |
1 files changed, 12 insertions, 1 deletions
diff --git a/drivers/pci/host/pci-imx6.c b/drivers/pci/host/pci-imx6.c index 8a099fbcb08d..1799cc24b10b 100644 --- a/drivers/pci/host/pci-imx6.c +++ b/drivers/pci/host/pci-imx6.c @@ -643,6 +643,14 @@ static int imx6_pcie_deassert_core_reset(struct imx6_pcie *imx6_pcie) goto err_pcie_bus; } } else { + if (imx6_pcie->ext_osc && (imx6_pcie->variant == IMX8QM)) { + ret = clk_prepare_enable(imx6_pcie->pcie_ext); + if (ret) { + dev_err(pp->dev, "unable to enable pcie_ext clock\n"); + goto err_pcie_bus; + } + } + ret = clk_prepare_enable(imx6_pcie->pcie_bus); if (ret) { dev_err(pp->dev, "unable to enable pcie_bus clock\n"); @@ -1864,14 +1872,17 @@ static int imx6_pcie_probe(struct platform_device *pdev) if (of_property_read_u32(node, "ext_osc", &imx6_pcie->ext_osc) < 0) imx6_pcie->ext_osc = 0; - if (imx6_pcie->ext_osc && (imx6_pcie->variant == IMX6QP)) { + if (imx6_pcie->ext_osc && (imx6_pcie->variant == IMX6QP || + imx6_pcie->variant == IMX8QM)) { imx6_pcie->pcie_ext = devm_clk_get(&pdev->dev, "pcie_ext"); if (IS_ERR(imx6_pcie->pcie_ext)) { dev_err(&pdev->dev, "pcie_ext clock source missing or invalid\n"); return PTR_ERR(imx6_pcie->pcie_ext); } + } + if (imx6_pcie->ext_osc && (imx6_pcie->variant == IMX6QP)) { imx6_pcie->pcie_ext_src = devm_clk_get(&pdev->dev, "pcie_ext_src"); if (IS_ERR(imx6_pcie->pcie_ext_src)) { |