diff options
| author | Antti P Miettinen <amiettinen@nvidia.com> | 2012-12-07 23:32:42 +0200 |
|---|---|---|
| committer | Dan Willemsen <dwillemsen@nvidia.com> | 2013-09-14 12:48:20 -0700 |
| commit | 52088ff2a6b6869d9220c5b86b04465dbc8df068 (patch) | |
| tree | 7b4c37acd51910cde8464b29bb3323f216cead22 | |
| parent | df2f4561b463318714f7de5a84ce178e76dad23b (diff) | |
ARM: Tegra: Use relaxed register access
No need to include heavy barriers for register access.
Change-Id: I55c664e196ec02a352b705a528882797169a1309
Signed-off-by: Antti P Miettinen <amiettinen@nvidia.com>
Reviewed-on: http://git-master/r/169492
Reviewed-by: Harshada Kale <hkale@nvidia.com>
Tested-by: Harshada Kale <hkale@nvidia.com>
| -rw-r--r-- | arch/arm/mach-tegra/flowctrl.c | 2 | ||||
| -rw-r--r-- | arch/arm/mach-tegra/powergate.c | 6 |
2 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm/mach-tegra/flowctrl.c b/arch/arm/mach-tegra/flowctrl.c index ffaa286a71e1..cb17e207a59e 100644 --- a/arch/arm/mach-tegra/flowctrl.c +++ b/arch/arm/mach-tegra/flowctrl.c @@ -43,7 +43,7 @@ static void flowctrl_update(u8 offset, u32 value) { void __iomem *addr = IO_ADDRESS(TEGRA_FLOW_CTRL_BASE) + offset; - writel(value, addr); + writel_relaxed(value, addr); /* ensure the update has reached the flow controller */ wmb(); diff --git a/arch/arm/mach-tegra/powergate.c b/arch/arm/mach-tegra/powergate.c index d66e32c94cd2..21d9d4bf2c79 100644 --- a/arch/arm/mach-tegra/powergate.c +++ b/arch/arm/mach-tegra/powergate.c @@ -334,7 +334,7 @@ static u32 mipi_cal_read(unsigned long reg) static void mipi_cal_write(u32 val, unsigned long reg) { - writel(val, mipi_cal + reg); + writel_relaxed(val, mipi_cal + reg); } static void __iomem *clk_rst = IO_ADDRESS(TEGRA_CLK_RESET_BASE); @@ -352,7 +352,7 @@ static u32 pmc_read(unsigned long reg) static void pmc_write(u32 val, unsigned long reg) { - writel(val, pmc + reg); + writel_relaxed(val, pmc + reg); } static void __iomem *mc = IO_ADDRESS(TEGRA_MC_BASE); @@ -364,7 +364,7 @@ static u32 mc_read(unsigned long reg) static void mc_write(u32 val, unsigned long reg) { - writel(val, mc + reg); + writel_relaxed(val, mc + reg); } #if !defined(CONFIG_ARCH_TEGRA_2x_SOC) && \ |