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authorShantanu Nath <snath@nvidia.com>2014-03-14 10:33:53 +0530
committerSachin Nikam <snikam@nvidia.com>2014-03-26 08:52:30 -0700
commit7ec650cac30c1244b217c4036553aafd1d535d92 (patch)
treee2132f927028eb73a29d93bc39bd2629ac77a2e5
parentb05a79f9bbb741b415b8bc6dcc99afba765f2bb7 (diff)
media: platform: tegra: IMX135: Add 4Kx2K mode
Add 3840x2160 mode for video recording. Bug 1477205 Change-Id: Ibf76d3ba488c8abab75269f6fd77b9e1ff6f5fbb Signed-off-by: Shantanu Nath <snath@nvidia.com> Reviewed-on: http://git-master/r/381849 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Sachin Nikam <snikam@nvidia.com> Reviewed-by: Jihoon Bang <jbang@nvidia.com> Reviewed-by: Philip Breczinski <pbreczinski@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
-rw-r--r--drivers/media/platform/tegra/imx135.c160
1 files changed, 160 insertions, 0 deletions
diff --git a/drivers/media/platform/tegra/imx135.c b/drivers/media/platform/tegra/imx135.c
index e021c8b7872b..4519a23d9af4 100644
--- a/drivers/media/platform/tegra/imx135.c
+++ b/drivers/media/platform/tegra/imx135.c
@@ -2075,6 +2075,161 @@ static struct imx135_reg mode_3904x2196[] = {
{IMX135_TABLE_END, 0x00}
};
+static struct imx135_reg mode_3840x2160[] = {
+ /* software reset */
+ {0x0103, 0x01},
+ /* global settings */
+ {0x0101, 0x00},
+ {0x0105, 0x01},
+ {0x0110, 0x00},
+ {0x0220, 0x01},
+ {0x3302, 0x11},
+ {0x3833, 0x20},
+ {0x3873, 0x03},
+ {0x3893, 0x00},
+ {0x3906, 0x08},
+ {0x3907, 0x01},
+ {0x391B, 0x00},
+ {0x3C09, 0x01},
+ {0x600A, 0x00},
+ {0x3008, 0xB0},
+ {0x320A, 0x01},
+ {0x320D, 0x10},
+ {0x3216, 0x2E},
+ {0x322C, 0x02},
+ {0x3409, 0x0C},
+ {0x340C, 0x2D},
+ {0x3411, 0x39},
+ {0x3414, 0x1E},
+ {0x3427, 0x04},
+ {0x3480, 0x1E},
+ {0x3484, 0x1E},
+ {0x3488, 0x1E},
+ {0x348C, 0x1E},
+ {0x3490, 0x1E},
+ {0x3494, 0x1E},
+ {0x3511, 0x8F},
+ {0x364F, 0x2D},
+ /* Clock Setting */
+ {0x011E, 0x18},
+ {0x011F, 0x00},
+ {0x0301, 0x05},
+ {0x0303, 0x01},
+ {0x0305, 0x0C},
+ {0x0309, 0x05},
+ {0x030B, 0x01},
+ {0x030C, 0x01},
+ {0x030D, 0xC2},
+ {0x030E, 0x01},
+ {0x3A06, 0x11},
+ /* Mode Settings */
+ {0x0108, 0x03},
+ {0x0112, 0x0E},
+ {0x0113, 0x0A},
+ {0x0381, 0x01},
+ {0x0383, 0x01},
+ {0x0385, 0x01},
+ {0x0387, 0x01},
+ {0x0390, 0x00},
+ {0x0391, 0x11},
+ {0x0392, 0x00},
+ {0x0401, 0x00},
+ {0x0404, 0x00},
+ {0x0405, 0x10},
+ {0x4082, 0x01},
+ {0x4083, 0x01},
+ {0x7006, 0x04},
+ /* Optinal/Function settings */
+ {0x0700, 0x00},
+ {0x3A63, 0x00},
+ {0x4100, 0xF8},
+ {0x4203, 0xFF},
+ {0x4344, 0x00},
+ {0x441C, 0x01},
+ /* Size Setting */
+ {0x0340, 0x0A},
+ {0x0341, 0x40},
+ {0x0342, 0x11},
+ {0x0343, 0xDC},
+ {0x0344, 0x00},
+ {0x0345, 0x9C},
+ {0x0346, 0x01},
+ {0x0347, 0xD0},
+ {0x0348, 0x0F},
+ {0x0349, 0xD3},
+ {0x034A, 0x0A},
+ {0x034B, 0x5F},
+ {0x034C, 0x0F},
+ {0x034D, 0x00},
+ {0x034E, 0x08},
+ {0x034F, 0x70},
+ {0x0350, 0x00},
+ {0x0351, 0x00},
+ {0x0352, 0x00},
+ {0x0353, 0x00},
+ {0x0354, 0x0F},
+ {0x0355, 0x00},
+ {0x0356, 0x08},
+ {0x0357, 0x70},
+ {0x301D, 0x30},
+ {0x3310, 0x0F},
+ {0x3311, 0x38},
+ {0x3312, 0x08},
+ {0x3313, 0x90},
+ {0x331C, 0x0F},
+ {0x331D, 0x32},
+ {0x4084, 0x00},
+ {0x4085, 0x00},
+ {0x4086, 0x00},
+ {0x4087, 0x00},
+ {0x4400, 0x00},
+ /* Global Timing Setting */
+ {0x0830, 0x87},
+ {0x0831, 0x3F},
+ {0x0832, 0x67},
+ {0x0833, 0x3F},
+ {0x0834, 0x3F},
+ {0x0835, 0x4F},
+ {0x0836, 0xDF},
+ {0x0837, 0x47},
+ {0x0839, 0x1F},
+ {0x083A, 0x17},
+ {0x083B, 0x02},
+ /* Integration Time Setting */
+ {0x0202, 0x0A},
+ {0x0203, 0x3C},
+ /* Gain Setting */
+ {0x0205, 0x00},
+ {0x020E, 0x01},
+ {0x020F, 0x00},
+ {0x0210, 0x01},
+ {0x0211, 0x00},
+ {0x0212, 0x01},
+ {0x0213, 0x00},
+ {0x0214, 0x01},
+ {0x0215, 0x00},
+ /* HDR Setting */
+ {0x0230, 0x00},
+ {0x0231, 0x00},
+ {0x0233, 0x00},
+ {0x0234, 0x00},
+ {0x0235, 0x40},
+ {0x0238, 0x01},
+ {0x0239, 0x04},
+ {0x023B, 0x00},
+ {0x023C, 0x01},
+ {0x33B0, 0x0F},
+ {0x33B1, 0x38},
+ {0x33B3, 0x01},
+ {0x33B4, 0x01},
+ {0x3800, 0x00},
+ {0x3A43, 0x01},
+ /* stream on */
+ {0x0100, 0x01},
+ {IMX135_TABLE_WAIT_MS, IMX135_WAIT_MS},
+ {IMX135_TABLE_END, 0x00}
+};
+
static struct imx135_reg mode_2080x1560[] = {
/* software reset */
{0x0103, 0x01},
@@ -2772,6 +2927,7 @@ enum {
IMX135_MODE_1280X720,
IMX135_MODE_2616X1472,
IMX135_MODE_3896X2192,
+ IMX135_MODE_3840X2160,
IMX135_MODE_2104X1560,
IMX135_MODE_QUALITY_HDR,
IMX135_MODE_QUALITY,
@@ -2788,6 +2944,7 @@ static struct imx135_reg *mode_table[] = {
[IMX135_MODE_1280X720] = mode_1280x720,
[IMX135_MODE_2616X1472] = mode_2616x1472,
[IMX135_MODE_3896X2192] = mode_3896x2192,
+ [IMX135_MODE_3840X2160] = mode_3840x2160,
[IMX135_MODE_2104X1560] = mode_2104x1560,
[IMX135_MODE_QUALITY_HDR] = mode_quality_hdr,
[IMX135_MODE_QUALITY] = mode_quality,
@@ -2993,6 +3150,9 @@ imx135_set_mode(struct imx135_info *info, struct imx135_mode *mode)
} else if (mode->xres == 3896 && mode->yres == 2192) {
sensor_mode = IMX135_MODE_3896X2192;
quality_hdr = 1;
+ } else if (mode->xres == 3840 && mode->yres == 2160) {
+ sensor_mode = IMX135_MODE_3840X2160;
+ quality_hdr = 1;
} else if (mode->xres == 2104 && mode->yres == 1560) {
sensor_mode = IMX135_MODE_2104X1560;
quality_hdr = 1;