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authorStefan Agner <stefan.agner@toradex.com>2017-03-24 12:44:00 -0700
committerStefan Agner <stefan@agner.ch>2018-06-04 17:36:25 +0200
commit8500b6c5d691ddaba42ac2fa649c5699eaa70d35 (patch)
treeb9d9265c6001237db5dfc0c5284a61078f39568a
parentc40abcef423ca42ebe3d629e131ed5df20632e33 (diff)
tty: serial: fsl_lpuart: lock port on console writetoradex_vf_4.1-next
The console write code is not entirely race free (e.g. the operations to disabling the UART interrupts are not atomic) hence locking is required. This has been become apparent with the PREEMPT RT patchset applied: With the fully preemptible kernel configuration the system often ended up in a freeze already at startup. Disable interrupts and lock using read_lock_irqsave. Try to lock in the sysrq/oops case, but don't bother if locking fails. Signed-off-by: Stefan Agner <stefan.agner@toradex.com> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
-rw-r--r--drivers/tty/serial/fsl_lpuart.c20
1 files changed, 20 insertions, 0 deletions
diff --git a/drivers/tty/serial/fsl_lpuart.c b/drivers/tty/serial/fsl_lpuart.c
index be86414ba1b0..c0cb253520ba 100644
--- a/drivers/tty/serial/fsl_lpuart.c
+++ b/drivers/tty/serial/fsl_lpuart.c
@@ -1707,6 +1707,13 @@ lpuart_console_write(struct console *co, const char *s, unsigned int count)
{
struct lpuart_port *sport = lpuart_ports[co->index];
unsigned char old_cr2, cr2;
+ unsigned long flags;
+ int locked = 1;
+
+ if (sport->port.sysrq || oops_in_progress)
+ locked = spin_trylock_irqsave(&sport->port.lock, flags);
+ else
+ spin_lock_irqsave(&sport->port.lock, flags);
/* first save CR2 and then disable interrupts */
cr2 = old_cr2 = readb(sport->port.membase + UARTCR2);
@@ -1721,6 +1728,9 @@ lpuart_console_write(struct console *co, const char *s, unsigned int count)
barrier();
writeb(old_cr2, sport->port.membase + UARTCR2);
+
+ if (locked)
+ spin_unlock_irqrestore(&sport->port.lock, flags);
}
static void
@@ -1728,6 +1738,13 @@ lpuart32_console_write(struct console *co, const char *s, unsigned int count)
{
struct lpuart_port *sport = lpuart_ports[co->index];
unsigned long old_cr, cr;
+ unsigned long flags;
+ int locked = 1;
+
+ if (sport->port.sysrq || oops_in_progress)
+ locked = spin_trylock_irqsave(&sport->port.lock, flags);
+ else
+ spin_lock_irqsave(&sport->port.lock, flags);
/* first save CR2 and then disable interrupts */
cr = old_cr = lpuart32_read(sport->port.membase + UARTCTRL);
@@ -1742,6 +1759,9 @@ lpuart32_console_write(struct console *co, const char *s, unsigned int count)
barrier();
lpuart32_write(old_cr, sport->port.membase + UARTCTRL);
+
+ if (locked)
+ spin_unlock_irqrestore(&sport->port.lock, flags);
}
/*