diff options
| author | Vaibhav Hiremath <hvaibhav@ti.com> | 2012-08-24 20:24:24 +0530 |
|---|---|---|
| committer | Paul Walmsley <paul@pwsan.com> | 2012-09-12 16:28:34 -0600 |
| commit | 78da264019e18db25b937fbb98328c680b1161cd (patch) | |
| tree | 10703621325d2c60fb982b8a2e3ebdf4f4c8f47d | |
| parent | a2cfc509bc4eeef9f5c4607b1203f17f22ea2a36 (diff) | |
ARM: OMAP2+: dpll: Add missing soc_is_am33xx() check for common functions
Add missing soc_is_am33xx() check for DPLL common control & clock
related functions, without this dpll programmability would be broken
for am33xx family of devices.
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Cc: Rajendra Nayak <rnayak@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
| -rw-r--r-- | arch/arm/mach-omap2/clkt_dpll.c | 4 | ||||
| -rw-r--r-- | arch/arm/mach-omap2/dpll3xxx.c | 4 |
2 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm/mach-omap2/clkt_dpll.c b/arch/arm/mach-omap2/clkt_dpll.c index cd7fd0f91149..05ff99e528c8 100644 --- a/arch/arm/mach-omap2/clkt_dpll.c +++ b/arch/arm/mach-omap2/clkt_dpll.c @@ -211,7 +211,7 @@ void omap2_init_dpll_parent(struct clk *clk) if (v == OMAP3XXX_EN_DPLL_LPBYPASS || v == OMAP3XXX_EN_DPLL_FRBYPASS) clk_reparent(clk, dd->clk_bypass); - } else if (cpu_is_omap44xx()) { + } else if (soc_is_am33xx() || cpu_is_omap44xx()) { if (v == OMAP4XXX_EN_DPLL_LPBYPASS || v == OMAP4XXX_EN_DPLL_FRBYPASS || v == OMAP4XXX_EN_DPLL_MNBYPASS) @@ -257,7 +257,7 @@ u32 omap2_get_dpll_rate(struct clk *clk) if (v == OMAP3XXX_EN_DPLL_LPBYPASS || v == OMAP3XXX_EN_DPLL_FRBYPASS) return dd->clk_bypass->rate; - } else if (cpu_is_omap44xx()) { + } else if (soc_is_am33xx() || cpu_is_omap44xx()) { if (v == OMAP4XXX_EN_DPLL_LPBYPASS || v == OMAP4XXX_EN_DPLL_FRBYPASS || v == OMAP4XXX_EN_DPLL_MNBYPASS) diff --git a/arch/arm/mach-omap2/dpll3xxx.c b/arch/arm/mach-omap2/dpll3xxx.c index b9c8d2f6a81f..063e1f9b465a 100644 --- a/arch/arm/mach-omap2/dpll3xxx.c +++ b/arch/arm/mach-omap2/dpll3xxx.c @@ -311,7 +311,7 @@ static int omap3_noncore_dpll_program(struct clk *clk, u16 m, u8 n, u16 freqsel) * Set jitter correction. No jitter correction for OMAP4 and 3630 * since freqsel field is no longer present */ - if (!cpu_is_omap44xx() && !cpu_is_omap3630()) { + if (!soc_is_am33xx() && !cpu_is_omap44xx() && !cpu_is_omap3630()) { v = __raw_readl(dd->control_reg); v &= ~dd->freqsel_mask; v |= freqsel << __ffs(dd->freqsel_mask); @@ -471,7 +471,7 @@ int omap3_noncore_dpll_set_rate(struct clk *clk, unsigned long rate) return -EINVAL; /* No freqsel on OMAP4 and OMAP3630 */ - if (!cpu_is_omap44xx() && !cpu_is_omap3630()) { + if (!soc_is_am33xx() && !cpu_is_omap44xx() && !cpu_is_omap3630()) { freqsel = _omap3_dpll_compute_freqsel(clk, dd->last_rounded_n); if (!freqsel) |