diff options
authorAndi Shyti <>2016-01-12 19:11:12 +0900
committerStefan Agner <>2016-02-16 16:01:00 -0800
commitf9ce15a70727d73ae17829507fc50a18c1a1aac3 (patch)
parente76397903b9ca9e94bc36cb15f0d5fb7e8c85dbc (diff)
arm: irq: l2c: do not print error in case of missing l2c from dtb
In some architectures the L2 cache controller is integrated in the processor's block itself and it doesn't use any external cache controller. This means that an entry in the board's dtb related to the l2c is not necessary. Distinguish between error codes and do not print anything in case l2x0_of_init() doesn't find any L2C DTB entry and returns -ENODEV. This patch mutes the following error message: L2C: failed to init: -19 on boards like odroid-xu4, cortex A7/A15, which don't have external cache controller. Signed-off-by: Andi Shyti <> Reported-by: Krzysztof Kozlowski <> Reviewed-by: Krzysztof Kozlowski <> Signed-off-by: Stefan Agner <>
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/kernel/irq.c b/arch/arm/kernel/irq.c
index 1d45320ee125..ece04a457486 100644
--- a/arch/arm/kernel/irq.c
+++ b/arch/arm/kernel/irq.c
@@ -95,7 +95,7 @@ void __init init_IRQ(void)
outer_cache.write_sec = machine_desc->l2c_write_sec;
ret = l2x0_of_init(machine_desc->l2c_aux_val,
- if (ret)
+ if (ret && ret != -ENODEV)
pr_err("L2C: failed to init: %d\n", ret);