diff options
author | Tony LIU <junjie.liu@freescale.com> | 2011-12-30 14:34:38 +0800 |
---|---|---|
committer | Tony LIU <junjie.liu@freescale.com> | 2011-12-31 09:40:56 +0800 |
commit | cede990ad3becc0869fac5f24fcd4d32ea527d2c (patch) | |
tree | 61a547a800b210d28e830b1ab26baecd0314357e | |
parent | 574b9641d5846e58273dac6bf80fcf1ff312c5c9 (diff) |
ENGR00171027-3 usbcore:after plug in/out on the hub,host can't work
This issue will happen only when suspend bit is set but phcd is not set
The root cause of this issue is the IC defect.
- If the suspend bit is set without phcd bit set, host controller
can't resume normally
- The workaround is after set suspend bit, we need set the following
bit in USB PHY at once:
HW_USBPHY_PWD_RXPWDRX
HW_USBPHY_PWD_RXPWDDIFF
HW_USBPHY_PWD_RXPWD1PT1
HW_USBPHY_PWD_RXPWDENV
HW_USBPHY_PWD_TXPWDv2I
HW_USBPHY_PWD_TXPWDIBIAS
HW_USBPHY_PWD_TXPWDFS
- Furthermore, after resume, we must clear these bits during the K state
- IC has no plan to fix this issue
- This issue only happen on MX6Q/MX28
core part
Signed-off-by: Tony LIU <junjie.liu@freescale.com>
-rw-r--r-- | drivers/usb/host/ehci-hub.c | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/drivers/usb/host/ehci-hub.c b/drivers/usb/host/ehci-hub.c index 8a515f0d5988..69b7a31612aa 100644 --- a/drivers/usb/host/ehci-hub.c +++ b/drivers/usb/host/ehci-hub.c @@ -28,6 +28,10 @@ /*-------------------------------------------------------------------------*/ +#ifdef CONFIG_ARCH_MX6 +#define MX6_USB_HOST_HACK +#include <linux/fsl_devices.h> +#endif #define PORT_WAKE_BITS (PORT_WKOC_E|PORT_WKDISC_E|PORT_WKCONN_E) #ifdef CONFIG_PM @@ -1032,6 +1036,14 @@ static int ehci_hub_control ( temp &= ~PORT_WKCONN_E; temp |= PORT_WKDISC_E | PORT_WKOC_E; ehci_writel(ehci, temp | PORT_SUSPEND, status_reg); +#ifdef MX6_USB_HOST_HACK + { + struct fsl_usb2_platform_data *pdata; + pdata = hcd->self.controller->platform_data; + if (pdata->platform_suspend) + pdata->platform_suspend(pdata); + } +#endif if (hostpc_reg) { spin_unlock_irqrestore(&ehci->lock, flags); msleep(5);/* 5ms for HCD enter low pwr mode */ |