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authorRongjun Ying <rongjun.ying@csr.com>2014-01-30 13:54:53 +0800
committerBarry Song <Baohua.Song@csr.com>2014-05-07 16:01:29 +0800
commit00954c1bdb7dc284b461008dddaf0231c9412467 (patch)
treece43f33950b054507f3f149ad787de803bd1ae0e
parentc9eaa447e77efe77b7fa4c953bd62de8297fd6c5 (diff)
ARM: dts: sirf: add pin group for USP0 with only RX or TX frame sync for atlas6
add pin groups for USP0 only holding one of TX and RX frame sync. this patch matches with the change in drivers/pinctrl/sirf. commit 73f68c01f46 did this for prima2, but missed prima2. this patch fixes the problem. Signed-off-by: Rongjun Ying <rongjun.ying@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
-rw-r--r--arch/arm/boot/dts/atlas6.dtsi12
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/atlas6.dtsi b/arch/arm/boot/dts/atlas6.dtsi
index 9d72674049d6..c84c45c2bd41 100644
--- a/arch/arm/boot/dts/atlas6.dtsi
+++ b/arch/arm/boot/dts/atlas6.dtsi
@@ -554,6 +554,18 @@
sirf,function = "usp0_uart_nostreamctrl";
};
};
+ usp0_only_utfs_pins_a: usp0@2 {
+ usp0 {
+ sirf,pins = "usp0_only_utfs_grp";
+ sirf,function = "usp0_only_utfs";
+ };
+ };
+ usp0_only_urfs_pins_a: usp0@3 {
+ usp0 {
+ sirf,pins = "usp0_only_urfs_grp";
+ sirf,function = "usp0_only_urfs";
+ };
+ };
usp1_pins_a: usp1@0 {
usp1 {
sirf,pins = "usp1grp";