diff options
author | Joakim Zhang <qiangqing.zhang@nxp.com> | 2019-06-01 14:19:51 +0800 |
---|---|---|
committer | Joakim Zhang <qiangqing.zhang@nxp.com> | 2019-07-12 09:36:50 +0800 |
commit | 0377ac8769fb5366a254abdf885d258fc70ac7fe (patch) | |
tree | b903558413e4b804235fb75397837c4fa675a800 | |
parent | 70bda4e5532b54da3b6ea7f48a37659a5b814108 (diff) |
MLK-22210 mxc: emvsim: enable ICM mode
Once detected a valid TS, the ICM bit is cleared and the data format bit,
IC bit , is set to appropriate value depending on the data format
detected using the initial character.
When TS is 0x3B (direct convention) in cold reset, and then become 0x3F
(inverse convention) in warm reset, it will not in ICM mode.
Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
Acked-by: Fugang Duan <fugang.duan@nxp.com>
-rw-r--r-- | drivers/mxc/sim/imx_emvsim.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/mxc/sim/imx_emvsim.c b/drivers/mxc/sim/imx_emvsim.c index 59f54dcd533e..1fc682e2efd9 100644 --- a/drivers/mxc/sim/imx_emvsim.c +++ b/drivers/mxc/sim/imx_emvsim.c @@ -410,6 +410,7 @@ static void emvsim_receive_atr_set(struct emvsim_t *emvsim) __raw_writel(ATR_MAX_CWT, emvsim->ioaddr + EMV_SIM_CWT_VAL); reg_data = __raw_readl(emvsim->ioaddr + EMV_SIM_CTRL); + reg_data |= ICM; reg_data |= CWT_EN; __raw_writel(reg_data, emvsim->ioaddr + EMV_SIM_CTRL); |