diff options
| author | Han Xu <b45815@freescale.com> | 2015-04-02 14:58:29 -0500 |
|---|---|---|
| committer | Nitin Garg <nitin.garg@nxp.com> | 2016-01-14 11:02:37 -0600 |
| commit | 099f080ba060e9c0df23b49096f79c23b7c1dce9 (patch) | |
| tree | 6eda13976feae51dda79e20b0b98172b0a649e95 | |
| parent | 609c81ba160242b53e0252cecd357f3d89b03b02 (diff) | |
MLK-10565-1: ARM:dts: new dts for QSPI on i.MX7D SDB
Add a new dts file for QSPI on i.MX7D SDB, also changed dtb file order
to alphabetical order.
Signed-off-by: Han Xu <b45815@freescale.com>
(cherry picked and merge from commit b24b9f69616f3d603f70740543e83ea71585c0ea)
| -rw-r--r-- | arch/arm/boot/dts/Makefile | 1 | ||||
| -rw-r--r-- | arch/arm/boot/dts/imx7d-sdb-qspi.dts | 44 |
2 files changed, 45 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 565bb4762663..f30261dc48cb 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -375,6 +375,7 @@ dtb-$(CONFIG_SOC_IMX7D) += \ imx7d-sdb.dtb \ imx7d-sdb-epdc.dtb \ imx7d-sdb-gpmi-weim.dtb \ + imx7d-sdb-qspi.dtb \ imx7d-sdb-touch.dtb \ imx7d-sdb-m4.dtb dtb-$(CONFIG_SOC_LS1021A) += \ diff --git a/arch/arm/boot/dts/imx7d-sdb-qspi.dts b/arch/arm/boot/dts/imx7d-sdb-qspi.dts new file mode 100644 index 000000000000..83b040170f2f --- /dev/null +++ b/arch/arm/boot/dts/imx7d-sdb-qspi.dts @@ -0,0 +1,44 @@ +/* + * Copyright (C) 2015 Freescale Semiconductor, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include "imx7d-sdb.dts" + +/* disable epdc, conflict with qspi */ +&epdc { + status = "disabled"; +}; + +&iomuxc { + qspi1 { + pinctrl_qspi1_1: qspi1grp_1 { + fsl,pins = < + MX7D_PAD_EPDC_DATA00__QSPI_A_DATA0 0x51 + MX7D_PAD_EPDC_DATA01__QSPI_A_DATA1 0x51 + MX7D_PAD_EPDC_DATA02__QSPI_A_DATA2 0x51 + MX7D_PAD_EPDC_DATA03__QSPI_A_DATA3 0x51 + MX7D_PAD_EPDC_DATA05__QSPI_A_SCLK 0x51 + MX7D_PAD_EPDC_DATA06__QSPI_A_SS0_B 0x51 + >; + }; + }; +}; + +&qspi1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_qspi1_1>; + status = "okay"; + ddrsmp=<0>; + + flash0: mx25l51245g@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "macronix,mx25l51245g"; + spi-max-frequency = <29000000>; + reg = <0>; + }; +}; |