diff options
| author | Viresh Kumar <viresh.kumar@linaro.org> | 2018-05-25 16:01:50 +0530 |
|---|---|---|
| committer | Heiko Stuebner <heiko@sntech.de> | 2018-06-17 09:31:50 +0200 |
| commit | 0bac06df36abb3b74e146091ca51c8c6d70d69a6 (patch) | |
| tree | 10d5ee617a4f71d9749673598dafd9f8492aab9b | |
| parent | fce152a63d9597c108c10a0eb7a71f1edfc9d42e (diff) | |
ARM: dts: rockchip: Add missing cooling device properties for CPUs on rk322x
The cooling device properties, like "#cooling-cells" and
"dynamic-power-coefficient", should either be present for all the CPUs
of a cluster or none. If these are present only for a subset of CPUs of
a cluster then things will start falling apart as soon as the CPUs are
brought online in a different order. For example, this will happen
because the operating system looks for such properties in the CPU node
it is trying to bring up, so that it can register a cooling device.
Add such missing properties.
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
| -rw-r--r-- | arch/arm/boot/dts/rk322x.dtsi | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/rk322x.dtsi b/arch/arm/boot/dts/rk322x.dtsi index cdc08520de1d..cd8f2a3b0e91 100644 --- a/arch/arm/boot/dts/rk322x.dtsi +++ b/arch/arm/boot/dts/rk322x.dtsi @@ -42,6 +42,7 @@ reg = <0xf01>; resets = <&cru SRST_CORE1>; operating-points-v2 = <&cpu0_opp_table>; + #cooling-cells = <2>; /* min followed by max */ enable-method = "psci"; }; @@ -51,6 +52,7 @@ reg = <0xf02>; resets = <&cru SRST_CORE2>; operating-points-v2 = <&cpu0_opp_table>; + #cooling-cells = <2>; /* min followed by max */ enable-method = "psci"; }; @@ -60,6 +62,7 @@ reg = <0xf03>; resets = <&cru SRST_CORE3>; operating-points-v2 = <&cpu0_opp_table>; + #cooling-cells = <2>; /* min followed by max */ enable-method = "psci"; }; }; |