diff options
| author | Robby Cai <robby.cai@nxp.com> | 2016-11-08 08:54:14 +0800 |
|---|---|---|
| committer | Robby Cai <robby.cai@nxp.com> | 2016-11-16 15:56:13 +0800 |
| commit | 226e82aa28c59a36d8534ad05015aff486e6899c (patch) | |
| tree | 8411425ee37cbfecbecc2fed31d9bb6856a04c39 | |
| parent | 2d27021fc115edcb1389a6d06180f75f1696c134 (diff) | |
MLK-13439 ARM: dts: imx6sll: correct clock property for pwm
PWM driver expects two clocks, so correct it to meet this requirement.
Otherwise pwm can not work properly, neither does the backlight (using pwm1).
Signed-off-by: Robby Cai <robby.cai@nxp.com>
(cherry picked from commit d34b1681dc3d25c0bd95d9ce6f2c00b8d0940c12)
| -rw-r--r-- | arch/arm/boot/dts/imx6sll.dtsi | 16 |
1 files changed, 12 insertions, 4 deletions
diff --git a/arch/arm/boot/dts/imx6sll.dtsi b/arch/arm/boot/dts/imx6sll.dtsi index dd5a38fb0506..93764272b8b4 100644 --- a/arch/arm/boot/dts/imx6sll.dtsi +++ b/arch/arm/boot/dts/imx6sll.dtsi @@ -354,7 +354,9 @@ compatible = "fsl,imx6sll-pwm", "fsl,imx27-pwm"; reg = <0x02080000 0x4000>; interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks IMX6SLL_CLK_PWM1>; + clocks = <&clks IMX6SLL_CLK_PWM1>, + <&clks IMX6SLL_CLK_PWM1>; + clock-names = "ipg", "per"; #pwm-cells = <2>; }; @@ -362,7 +364,9 @@ compatible = "fsl,imx6sll-pwm", "fsl,imx27-pwm"; reg = <0x02084000 0x4000>; interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks IMX6SLL_CLK_PWM2>; + clocks = <&clks IMX6SLL_CLK_PWM2>, + <&clks IMX6SLL_CLK_PWM2>; + clock-names = "ipg", "per"; #pwm-cells = <2>; }; @@ -370,7 +374,9 @@ compatible = "fsl,imx6sll-pwm", "fsl,imx27-pwm"; reg = <0x02088000 0x4000>; interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks IMX6SLL_CLK_PWM3>; + clocks = <&clks IMX6SLL_CLK_PWM3>, + <&clks IMX6SLL_CLK_PWM3>; + clock-names = "ipg", "per"; #pwm-cells = <2>; }; @@ -378,7 +384,9 @@ compatible = "fsl,imx6sll-pwm", "fsl,imx27-pwm"; reg = <0x0208c000 0x4000>; interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks IMX6SLL_CLK_PWM4>; + clocks = <&clks IMX6SLL_CLK_PWM4>, + <&clks IMX6SLL_CLK_PWM4>; + clock-names = "ipg", "per"; #pwm-cells = <2>; }; |