diff options
| author | Axel Lin <axel.lin@ingics.com> | 2016-04-26 07:31:15 +0800 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2016-04-26 11:14:35 +0100 |
| commit | 2452ee25255af95d122ff66ea390facb67a61fc3 (patch) | |
| tree | e9e883355365be9bc176b4949b689503dfe3117d | |
| parent | 1bcb9f8ceb67803960871ecf4ed2d365a2a919c8 (diff) | |
spi: pic32: Set proper bits_per_word_mask
This driver only supports 8/16/32 bits_per_word, so set
master->bits_per_word_mask accordingly. With this change, we can remove
the spi->bits_per_word checking in pic32_spi_setup as it's done by spi
core.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
| -rw-r--r-- | drivers/spi/spi-pic32.c | 13 |
1 files changed, 2 insertions, 11 deletions
diff --git a/drivers/spi/spi-pic32.c b/drivers/spi/spi-pic32.c index f8313ea11a34..4eeb8a85b030 100644 --- a/drivers/spi/spi-pic32.c +++ b/drivers/spi/spi-pic32.c @@ -592,16 +592,6 @@ static int pic32_spi_setup(struct spi_device *spi) return -EINVAL; } - switch (spi->bits_per_word) { - case 8: - case 16: - case 32: - break; - default: - dev_err(&spi->dev, "Invalid bits_per_word defined\n"); - return -EINVAL; - } - /* PIC32 spi controller can drive /CS during transfer depending * on tx fifo fill-level. /CS will stay asserted as long as TX * fifo is non-empty, else will be deasserted indicating @@ -791,7 +781,8 @@ static int pic32_spi_probe(struct platform_device *pdev) master->setup = pic32_spi_setup; master->cleanup = pic32_spi_cleanup; master->flags = SPI_MASTER_MUST_TX | SPI_MASTER_MUST_RX; - master->bits_per_word_mask = SPI_BPW_RANGE_MASK(8, 32); + master->bits_per_word_mask = SPI_BPW_MASK(8) | SPI_BPW_MASK(16) | + SPI_BPW_MASK(32); master->transfer_one = pic32_spi_one_transfer; master->prepare_message = pic32_spi_prepare_message; master->unprepare_message = pic32_spi_unprepare_message; |