diff options
| author | Amit Kamath <akamath@nvidia.com> | 2011-01-20 12:47:06 +0530 |
|---|---|---|
| committer | Dan Willemsen <dwillemsen@nvidia.com> | 2011-11-30 21:46:11 -0800 |
| commit | 3f76d6a804793571b6202e64439bdcf8f4c74555 (patch) | |
| tree | dc8c0ded15256fade00c359bf7d33e3154c75fbf | |
| parent | addd14cc7d78a207dced6fb15cf5987073714912 (diff) | |
[ARM] tegra: ventana: add frequencies to emc table
frequencies 50Mhz and 100Mhz for 333mhz elpida memory
bug 775764
Original-Change-Id: I74cf8081fecd721ce8d23202263ac1cfb34df8f8
Reviewed-on: http://git-master/r/16116
Reviewed-by: Amit Kamath <akamath@nvidia.com>
Tested-by: Amit Kamath <akamath@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Rebase-Id: Race9856fe78dd9a4a581023bd6103fe66bc20daa
| -rw-r--r-- | arch/arm/mach-tegra/board-ventana-memory.c | 106 |
1 files changed, 104 insertions, 2 deletions
diff --git a/arch/arm/mach-tegra/board-ventana-memory.c b/arch/arm/mach-tegra/board-ventana-memory.c index 98b605655bf2..ba0a0c0ec960 100644 --- a/arch/arm/mach-tegra/board-ventana-memory.c +++ b/arch/arm/mach-tegra/board-ventana-memory.c @@ -25,7 +25,109 @@ static const struct tegra_emc_table ventana_emc_tables_elpida[] = { { - .rate = 150000, /* SDRAM frquency */ + .rate = 50000, /* SDRAM frequency */ + .regs = { + 0x00000003, /* RC */ + 0x00000007, /* RFC */ + 0x00000003, /* RAS */ + 0x00000003, /* RP */ + 0x00000006, /* R2W */ + 0x00000004, /* W2R */ + 0x00000002, /* R2P */ + 0x00000009, /* W2P */ + 0x00000003, /* RD_RCD */ + 0x00000003, /* WR_RCD */ + 0x00000002, /* RRD */ + 0x00000002, /* REXT */ + 0x00000002, /* WDV */ + 0x00000005, /* QUSE */ + 0x00000003, /* QRST */ + 0x00000008, /* QSAFE */ + 0x0000000b, /* RDV */ + 0x0000009f, /* REFRESH */ + 0x00000000, /* BURST_REFRESH_NUM */ + 0x00000003, /* PDEX2WR */ + 0x00000003, /* PDEX2RD */ + 0x00000003, /* PCHG2PDEN */ + 0x00000008, /* ACT2PDEN */ + 0x00000001, /* AR2PDEN */ + 0x0000000a, /* RW2PDEN */ + 0x00000007, /* TXSR */ + 0x00000003, /* TCKE */ + 0x00000008, /* TFAW */ + 0x00000004, /* TRPAB */ + 0x00000006, /* TCLKSTABLE */ + 0x00000002, /* TCLKSTOP */ + 0x000000d0, /* TREFBW */ + 0x00000004, /* QUSE_EXTRA */ + 0x00000000, /* FBIO_CFG6 */ + 0x00000000, /* ODT_WRITE */ + 0x00000000, /* ODT_READ */ + 0x00000082, /* FBIO_CFG5 */ + 0xa06a04ae, /* CFG_DIG_DLL */ + 0x0001f000, /* DLL_XFORM_DQS */ + 0x00000000, /* DLL_XFORM_QUSE */ + 0x00000000, /* ZCAL_REF_CNT */ + 0x00000005, /* ZCAL_WAIT_CNT */ + 0x00000000, /* AUTO_CAL_INTERVAL */ + 0x00000000, /* CFG_CLKTRIM_0 */ + 0x00000000, /* CFG_CLKTRIM_1 */ + 0x00000000, /* CFG_CLKTRIM_2 */ + } + }, + { + .rate = 75000, /* SDRAM frequency */ + .regs = { + 0x00000005, /* RC */ + 0x0000000a, /* RFC */ + 0x00000004, /* RAS */ + 0x00000003, /* RP */ + 0x00000006, /* R2W */ + 0x00000004, /* W2R */ + 0x00000002, /* R2P */ + 0x00000009, /* W2P */ + 0x00000003, /* RD_RCD */ + 0x00000003, /* WR_RCD */ + 0x00000002, /* RRD */ + 0x00000002, /* REXT */ + 0x00000002, /* WDV */ + 0x00000005, /* QUSE */ + 0x00000003, /* QRST */ + 0x00000008, /* QSAFE */ + 0x0000000b, /* RDV */ + 0x000000ff, /* REFRESH */ + 0x00000000, /* BURST_REFRESH_NUM */ + 0x00000003, /* PDEX2WR */ + 0x00000003, /* PDEX2RD */ + 0x00000003, /* PCHG2PDEN */ + 0x00000008, /* ACT2PDEN */ + 0x00000001, /* AR2PDEN */ + 0x0000000a, /* RW2PDEN */ + 0x0000000b, /* TXSR */ + 0x00000003, /* TCKE */ + 0x00000008, /* TFAW */ + 0x00000004, /* TRPAB */ + 0x00000006, /* TCLKSTABLE */ + 0x00000002, /* TCLKSTOP */ + 0x00000138, /* TREFBW */ + 0x00000004, /* QUSE_EXTRA */ + 0x00000000, /* FBIO_CFG6 */ + 0x00000000, /* ODT_WRITE */ + 0x00000000, /* ODT_READ */ + 0x00000082, /* FBIO_CFG5 */ + 0xa06a04ae, /* CFG_DIG_DLL */ + 0x0001f000, /* DLL_XFORM_DQS */ + 0x00000000, /* DLL_XFORM_QUSE */ + 0x00000000, /* ZCAL_REF_CNT */ + 0x00000007, /* ZCAL_WAIT_CNT */ + 0x00000000, /* AUTO_CAL_INTERVAL */ + 0x00000000, /* CFG_CLKTRIM_0 */ + 0x00000000, /* CFG_CLKTRIM_1 */ + 0x00000000, /* CFG_CLKTRIM_2 */ + } + }, + { + .rate = 150000, /* SDRAM frequency */ .regs = { 0x00000009, /* RC */ 0x00000014, /* RFC */ @@ -76,7 +178,7 @@ static const struct tegra_emc_table ventana_emc_tables_elpida[] = { } }, { - .rate = 300000, /* SDRAM frquency */ + .rate = 300000, /* SDRAM frequency */ .regs = { 0x00000012, /* RC */ 0x00000027, /* RFC */ |