diff options
| author | Max Krummenacher <max.krummenacher@toradex.com> | 2018-09-26 17:12:08 +0200 |
|---|---|---|
| committer | Philippe Schenker <philippe.schenker@toradex.com> | 2020-08-13 16:05:17 +0200 |
| commit | 41328107c1e7060709af88f0b63c98c6362e5e70 (patch) | |
| tree | f27fd8e13044550253577c83401587eb03faf5cf | |
| parent | cefbcb68f9d80b5bc675477a9e691eeebbbe51e7 (diff) | |
ARM: dts: imx6ull-colibri-aster: Follow pinctrl naming from mainline
While at it, add the dtbs for Aster Carrier Board to the Makefile.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
(cherry picked from commit 48d236e07b708f9cf9332d568f4ef02b8bbd31d6)
| -rw-r--r-- | arch/arm/boot/dts/Makefile | 2 | ||||
| -rw-r--r-- | arch/arm/boot/dts/imx6ull-colibri-aster.dtsi | 12 | ||||
| -rw-r--r-- | arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi | 10 | ||||
| -rw-r--r-- | arch/arm/boot/dts/imx6ull-colibri.dtsi | 2 |
4 files changed, 14 insertions, 12 deletions
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 79a8783d9206..f9562662ca97 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -643,7 +643,9 @@ dtb-$(CONFIG_SOC_IMX6UL) += \ imx6ull-9x9-evk-ldo.dtb \ imx6ull-9x9-evk-btwifi.dtb \ imx6ull-9x9-evk-btwifi-oob.dtb \ + imx6ull-colibri-aster.dtb \ imx6ull-colibri-eval-v3.dtb \ + imx6ull-colibri-wifi-aster.dtb \ imx6ull-colibri-wifi-eval-v3.dtb \ imx6ull-phytec-segin-ff-rdk-nand.dtb \ imx6ull-phytec-segin-ff-rdk-emmc.dtb \ diff --git a/arch/arm/boot/dts/imx6ull-colibri-aster.dtsi b/arch/arm/boot/dts/imx6ull-colibri-aster.dtsi index ba69ef18e8a8..b6c34d53b2ff 100644 --- a/arch/arm/boot/dts/imx6ull-colibri-aster.dtsi +++ b/arch/arm/boot/dts/imx6ull-colibri-aster.dtsi @@ -54,7 +54,7 @@ reg_usbh_vbus: regulator-usbh-vbus { compatible = "regulator-fixed"; pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usbh1_reg>; + pinctrl-0 = <&pinctrl_usbh_reg>; regulator-name = "VCC_USB[1-4]"; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; @@ -297,14 +297,14 @@ &usdhc1 { #ifdef SD_1_8 pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep"; - pinctrl-0 = <&pinctrl_usdhc1 &pinctrl_snvs_cd_usdhc1>; - pinctrl-1 = <&pinctrl_usdhc1_100mhz &pinctrl_snvs_cd_usdhc1>; - pinctrl-2 = <&pinctrl_usdhc1_200mhz &pinctrl_snvs_cd_usdhc1>; - pinctrl-3 = <&pinctrl_usdhc1 &pinctrl_snvs_cd_usdhc1_sleep>; + pinctrl-0 = <&pinctrl_usdhc1 &pinctrl_snvs_usdhc1_cd>; + pinctrl-1 = <&pinctrl_usdhc1_100mhz &pinctrl_snvs_usdhc1_cd>; + pinctrl-2 = <&pinctrl_usdhc1_200mhz &pinctrl_snvs_usdhc1_cd>; + pinctrl-3 = <&pinctrl_usdhc1 &pinctrl_snvs_usdhc1_cd_sleep>; vqmmc-supply = <®_sd1_vmmc>; #else pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usdhc1 &pinctrl_snvs_cd_usdhc1>; + pinctrl-0 = <&pinctrl_usdhc1 &pinctrl_snvs_usdhc1_cd>; no-1-8-v; #endif cd-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>; diff --git a/arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi b/arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi index c51cf75adea0..0e82827a2ca5 100644 --- a/arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi +++ b/arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi @@ -322,15 +322,15 @@ &usdhc1 { #ifdef SD_1_8 pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep"; - pinctrl-0 = <&pinctrl_usdhc1 &pinctrl_snvs_cd_usdhc1>; - pinctrl-1 = <&pinctrl_usdhc1_100mhz &pinctrl_snvs_cd_usdhc1>; - pinctrl-2 = <&pinctrl_usdhc1_200mhz &pinctrl_snvs_cd_usdhc1>; - pinctrl-3 = <&pinctrl_usdhc1 &pinctrl_snvs_cd_usdhc1_sleep>; + pinctrl-0 = <&pinctrl_usdhc1 &pinctrl_snvs_usdhc1_cd>; + pinctrl-1 = <&pinctrl_usdhc1_100mhz &pinctrl_snvs_usdhc1_cd>; + pinctrl-2 = <&pinctrl_usdhc1_200mhz &pinctrl_snvs_usdhc1_cd>; + pinctrl-3 = <&pinctrl_usdhc1 &pinctrl_snvs_usdhc1_cd_sleep>; vqmmc-supply = <®_sd1_vmmc>; #else pinctrl-names = "default", "sleep"; pinctrl-0 = <&pinctrl_usdhc1 &pinctrl_snvs_usdhc1_cd>; - pinctrl-1 = <&pinctrl_usdhc1 &pinctrl_snvs_cd_usdhc1_sleep>; + pinctrl-1 = <&pinctrl_usdhc1 &pinctrl_snvs_usdhc1_cd_sleep>; no-1-8-v; #endif cd-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>; diff --git a/arch/arm/boot/dts/imx6ull-colibri.dtsi b/arch/arm/boot/dts/imx6ull-colibri.dtsi index 17a28fdfd5d2..d4a388645278 100644 --- a/arch/arm/boot/dts/imx6ull-colibri.dtsi +++ b/arch/arm/boot/dts/imx6ull-colibri.dtsi @@ -651,7 +651,7 @@ >; }; - pinctrl_snvs_cd_usdhc1_sleep: snvs-usdhc1-cd-grp-slp { + pinctrl_snvs_usdhc1_cd_sleep: snvs-usdhc1-cd-slp-grp { fsl,pins = < MX6ULL_PAD_SNVS_TAMPER0__GPIO5_IO00 0x0 >; |