diff options
| author | Dinh Nguyen <dinguyen@kernel.org> | 2016-12-13 16:52:11 -0600 |
|---|---|---|
| committer | Dinh Nguyen <dinguyen@kernel.org> | 2017-01-04 18:11:51 -0600 |
| commit | 4d3e72b1198bff5de939379d23c20d90e632b287 (patch) | |
| tree | 24e398901da7a61022ba1a1d19a0c113a7f810dc | |
| parent | 55b0f44cc2895460c7a244384b08e9d744894de8 (diff) | |
ARM: dts: socfpga: set desired i2c clock on Cyclone5 and Arria5 devkits
The I2C LCD display on the Cyclone5 and Arria5 devkits is only capable of
the standard 100 kHz clock. Set the "clock-frequency" of the I2C node
to be 100000.
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
| -rw-r--r-- | arch/arm/boot/dts/socfpga_arria5_socdk.dts | 8 | ||||
| -rw-r--r-- | arch/arm/boot/dts/socfpga_cyclone5_socdk.dts | 8 |
2 files changed, 16 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/socfpga_arria5_socdk.dts b/arch/arm/boot/dts/socfpga_arria5_socdk.dts index fa70c394dcfe..8672edf9ba4e 100644 --- a/arch/arm/boot/dts/socfpga_arria5_socdk.dts +++ b/arch/arm/boot/dts/socfpga_arria5_socdk.dts @@ -98,6 +98,14 @@ &i2c0 { status = "okay"; + clock-frequency = <100000>; + + /* + * adjust the falling times to decrease the i2c frequency to 50Khz + * because the LCD module does not work at the standard 100Khz + */ + i2c-sda-falling-time-ns = <5000>; + i2c-scl-falling-time-ns = <5000>; eeprom@51 { compatible = "atmel,24c32"; diff --git a/arch/arm/boot/dts/socfpga_cyclone5_socdk.dts b/arch/arm/boot/dts/socfpga_cyclone5_socdk.dts index 6d3188bfefd8..24650bafcef4 100644 --- a/arch/arm/boot/dts/socfpga_cyclone5_socdk.dts +++ b/arch/arm/boot/dts/socfpga_cyclone5_socdk.dts @@ -98,6 +98,14 @@ &i2c0 { status = "okay"; + clock-frequency = <100000>; + + /* + * adjust the falling times to decrease the i2c frequency to 50Khz + * because the LCD module does not work at the standard 100Khz + */ + i2c-sda-falling-time-ns = <5000>; + i2c-scl-falling-time-ns = <5000>; eeprom@51 { compatible = "atmel,24c32"; |