diff options
| author | Christian Lamparter <chunkeey@googlemail.com> | 2017-05-02 21:19:24 +0200 |
|---|---|---|
| committer | Andy Gross <andy.gross@linaro.org> | 2017-06-05 21:26:37 -0500 |
| commit | 650df439cfb96c303328935559b2d06127a5a0b0 (patch) | |
| tree | 7224530a76ab6d99f4478bed889c27213757d3c7 | |
| parent | 5533b0cda3bf8b17e3688cce4b66bd5448d6cd1e (diff) | |
ARM: dts: qcom: ipq4019: fix i2c_0 node
This patch fixes two typos in the i2c_0 node for the ipq4019.
The reg property length is just 0x600. The core clock is
GCC_BLSP1_QUP1_I2C_APPS_CLK. GCC_BLSP1_QUP2_I2C_APPS_CLK is
used by the second i2c.
Fixes: e76b4284b520ba3 ("qcom: ipq4019: add i2c node to ipq4019 SoC and DK01 device tree")
Signed-off-by: Christian Lamparter <chunkeey@googlemail.com>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
| -rw-r--r-- | arch/arm/boot/dts/qcom-ipq4019.dtsi | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/qcom-ipq4019.dtsi b/arch/arm/boot/dts/qcom-ipq4019.dtsi index b7a24af8f47b..4b7d97275c62 100644 --- a/arch/arm/boot/dts/qcom-ipq4019.dtsi +++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi @@ -154,10 +154,10 @@ i2c_0: i2c@78b7000 { compatible = "qcom,i2c-qup-v2.2.1"; - reg = <0x78b7000 0x6000>; + reg = <0x78b7000 0x600>; interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>; clocks = <&gcc GCC_BLSP1_AHB_CLK>, - <&gcc GCC_BLSP1_QUP2_I2C_APPS_CLK>; + <&gcc GCC_BLSP1_QUP1_I2C_APPS_CLK>; clock-names = "iface", "core"; #address-cells = <1>; #size-cells = <0>; |