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authorNicolas Ferre <nicolas.ferre@microchip.com>2018-08-20 12:20:41 +0200
committerAlexandre Belloni <alexandre.belloni@bootlin.com>2018-08-27 17:27:21 +0200
commit67458e543eb7c2d4290a51e9607998da5d0e5464 (patch)
tree486c302483a39dcd8571de022e1fc4476b86d009
parent10af10db8c76fa5b9bf1f52a895c1cb2c0ac24da (diff)
ARM: dts: at91/trivial: remove old NAND bindings leftover in sama5d2
As the new bindings are already in place in sama5d2.dtsi and that it's used in the only Mainline board for this product (at91-sama5d2_ptc_ek.dts), we can safely remove the old bindings. Cc: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
-rw-r--r--arch/arm/boot/dts/sama5d2.dtsi38
1 files changed, 0 insertions, 38 deletions
diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi
index ea5fb26ac74a..ce786b8a4b0f 100644
--- a/arch/arm/boot/dts/sama5d2.dtsi
+++ b/arch/arm/boot/dts/sama5d2.dtsi
@@ -326,44 +326,6 @@
};
};
- nand0: nand@80000000 {
- compatible = "atmel,sama5d2-nand";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
- reg = < /* EBI CS3 */
- 0x80000000 0x08000000
- /* SMC PMECC regs */
- 0xf8014070 0x00000490
- /* SMC PMECC Error Location regs */
- 0xf8014500 0x00000200
- /* ROM Galois tables */
- 0x00040000 0x00018000
- >;
- interrupts = <17 IRQ_TYPE_LEVEL_HIGH 6>;
- atmel,nand-addr-offset = <21>;
- atmel,nand-cmd-offset = <22>;
- atmel,nand-has-dma;
- atmel,has-pmecc;
- atmel,pmecc-lookup-table-offset = <0x0 0x8000>;
- status = "disabled";
-
- nfc@c0000000 {
- compatible = "atmel,sama5d3-nfc";
- #address-cells = <1>;
- #size-cells = <1>;
- reg = < /* NFC Command Registers */
- 0xc0000000 0x08000000
- /* NFC HSMC regs */
- 0xf8014000 0x00000070
- /* NFC SRAM banks */
- 0x00100000 0x00100000
- >;
- clocks = <&hsmc_clk>;
- atmel,write-by-sram;
- };
- };
-
sdmmc0: sdio-host@a0000000 {
compatible = "atmel,sama5d2-sdhci";
reg = <0xa0000000 0x300>;