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authorBenoit Goby <benoit@android.com>2010-08-31 16:36:14 -0700
committerColin Cross <ccross@android.com>2010-10-06 16:28:21 -0700
commit6e9b65b7d1cfc9d560f1431a862b636acad4d430 (patch)
treee0c19d92b4bfa0f82356f8184cd2aeb4f93c2a94
parentf9559ba01f174f60fcdf4035b910b813a7ceb781 (diff)
usb: host: ehci-hub: Add port_reset_no_wait quirk
Tegra quirk: The PORT_RESET bit in PORTSC1 does not need to be cleared and there is no need to wait for it to clear. The bit will automatically change to 0 when the bus-reset sequence is done and an interrupt will be generated. Change-Id: I645417013af46785a249096ebc06a1f688228d94 Signed-off-by: Benoit Goby <benoit@android.com>
-rw-r--r--drivers/usb/host/ehci-hub.c1
-rw-r--r--drivers/usb/host/ehci.h1
2 files changed, 2 insertions, 0 deletions
diff --git a/drivers/usb/host/ehci-hub.c b/drivers/usb/host/ehci-hub.c
index 796ea0c8900f..e33e78cbde00 100644
--- a/drivers/usb/host/ehci-hub.c
+++ b/drivers/usb/host/ehci-hub.c
@@ -900,6 +900,7 @@ static int ehci_hub_control (
/* whoever resets must GetPortStatus to complete it!! */
if ((temp & PORT_RESET)
+ && !ehci->port_reset_no_wait
&& time_after_eq(jiffies,
ehci->reset_done[wIndex])) {
status |= USB_PORT_STAT_C_RESET << 16;
diff --git a/drivers/usb/host/ehci.h b/drivers/usb/host/ehci.h
index 3de86c1debd2..9dd486abd621 100644
--- a/drivers/usb/host/ehci.h
+++ b/drivers/usb/host/ehci.h
@@ -132,6 +132,7 @@ struct ehci_hcd { /* one per controller */
unsigned broken_periodic:1;
unsigned fs_i_thresh:1; /* Intel iso scheduling */
unsigned controller_resets_phy:1;
+ unsigned port_reset_no_wait:1;
/* required for usb32 quirk */
#define OHCI_CTRL_HCFS (3 << 6)