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authorRobin Gong <yibin.gong@nxp.com>2018-08-18 00:51:33 +0800
committerJason Liu <jason.hui.liu@nxp.com>2019-02-12 10:33:29 +0800
commit73d5003076b3c1a5b46d558cf71e17796140c7a6 (patch)
tree6f9dce2f395eefa09ad71be9839a51bff937f556
parentd64ff2b2f669e0a075078062ee38b93c024cbd03 (diff)
MLK-19260-1: spi: spi-imx: fix tx dma timeout
Upstreaming code already support dynamically adjust watermark with the transfer count, so in case 'wml=1', tx wml will be set to 0 after divided by 2, which cause tx dma never start.Actually, don't need promise tx_wml=rx_wml/2 any more, because the max wml for tx/rx is half of fifo size and sdma script have already check the data count in RXFIFO, if more than half of rxfifo data remain in rxfifo, tx dma will never start transfer next 'watermark'(the max count maybe the half of fifo size) data until the data in rxfifo less than half of rxfifo. So never any data loss happen. Remove 'wml/2'. Signed-off-by: Robin Gong <yibin.gong@nxp.com> Reviewed-by: Han Xu <han.xu@nxp.com>
-rw-r--r--drivers/spi/spi-imx.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/spi/spi-imx.c b/drivers/spi/spi-imx.c
index 4095df956cd4..ac5ff8d33fa2 100644
--- a/drivers/spi/spi-imx.c
+++ b/drivers/spi/spi-imx.c
@@ -536,7 +536,7 @@ static int mx51_ecspi_config(struct spi_device *spi)
* and enable DMA request.
*/
if (spi_imx->devtype_data->devtype == IMX6UL_ECSPI)
- tx_wml = spi_imx->wml / 2;
+ tx_wml = spi_imx->wml;
if (spi_imx->usedma)
writel(MX51_ECSPI_DMA_RX_WML(spi_imx->wml) |
@@ -1030,7 +1030,7 @@ static int spi_imx_dma_configure(struct spi_master *master)
tx.direction = DMA_MEM_TO_DEV;
tx.dst_addr = spi_imx->base_phys + MXC_CSPITXDATA;
tx.dst_addr_width = buswidth;
- tx.dst_maxburst = spi_imx->wml / 2;
+ tx.dst_maxburst = spi_imx->wml;
ret = dmaengine_slave_config(master->dma_tx, &tx);
if (ret) {
dev_err(spi_imx->dev, "TX dma configuration failed with %d\n", ret);