diff options
author | Sandor Yu <R01008@freescale.com> | 2015-01-20 16:04:58 +0800 |
---|---|---|
committer | Sandor Yu <R01008@freescale.com> | 2015-01-22 11:15:52 +0800 |
commit | 75f869063a16dc306674ba0420592522db9195f3 (patch) | |
tree | 75976f0e6036d5bf79a56277a7f1e3570ac84ab1 | |
parent | bafd7fe196396715179d14e69b33f83f3bf6f100 (diff) |
MLK-10117-5:dts: Enable dispmix power management in imx6sx/sl dts
Add disp mix power management clocks to gpc item.
Add disp mix power management to lcdif, pxp and csi module.
Signed-off-by: Sandor Yu <R01008@freescale.com>
-rw-r--r-- | arch/arm/boot/dts/imx6sl.dtsi | 12 | ||||
-rw-r--r-- | arch/arm/boot/dts/imx6sx.dtsi | 12 |
2 files changed, 21 insertions, 3 deletions
diff --git a/arch/arm/boot/dts/imx6sl.dtsi b/arch/arm/boot/dts/imx6sl.dtsi index 2e4e49d08a62..93082ad2cd34 100644 --- a/arch/arm/boot/dts/imx6sl.dtsi +++ b/arch/arm/boot/dts/imx6sl.dtsi @@ -656,8 +656,12 @@ reg = <0x020dc000 0x4000>; interrupts = <0 89 IRQ_TYPE_LEVEL_HIGH>; pu-supply = <®_pu>; - clocks = <&clks IMX6SL_CLK_GPU2D_OVG>, - <&clks IMX6SL_CLK_GPU2D_PODF>; + clocks = <&clks IMX6SL_CLK_GPU2D_PODF>, <&clks IMX6SL_CLK_GPU2D_OVG>, + <&clks IMX6SL_CLK_IPG>, <&clks IMX6SL_CLK_LCDIF_AXI>, + <&clks IMX6SL_CLK_LCDIF_PIX>, <&clks IMX6SL_CLK_EPDC_AXI>, + <&clks IMX6SL_CLK_EPDC_PIX>, <&clks IMX6SL_CLK_PXP_AXI>; + clock-names = "gpu2d_podf", "gpu2d_ovg", "ipg", "lcd_axi", + "lcd_pix", "epdc_axi", "epdc_pix", "pxp_axi"; #power-domain-cells = <1>; }; @@ -680,6 +684,7 @@ <&clks IMX6SL_CLK_DUMMY>, <&clks IMX6SL_CLK_DUMMY>; clock-names = "disp-axi", "csi_mclk", "disp_dcic"; + power-domains = <&gpc 2>; status = "disabled"; }; @@ -707,6 +712,7 @@ interrupts = <0 98 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clks IMX6SL_CLK_PXP_AXI>, <&clks IMX6SL_CLK_DUMMY>; clock-names = "pxp-axi", "disp-axi"; + power-domains = <&gpc 2>; status = "disabled"; }; @@ -716,6 +722,7 @@ interrupts = <0 97 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clks IMX6SL_CLK_EPDC_AXI>, <&clks IMX6SL_CLK_EPDC_PIX>; clock-names = "epdc_axi", "epdc_pix"; + power-domains = <&gpc 2>; }; lcdif: lcdif@020f8000 { @@ -726,6 +733,7 @@ <&clks IMX6SL_CLK_LCDIF_AXI>, <&clks IMX6SL_CLK_DUMMY>; clock-names = "pix", "axi", "disp_axi"; + power-domains = <&gpc 2>; status = "disabled"; }; diff --git a/arch/arm/boot/dts/imx6sx.dtsi b/arch/arm/boot/dts/imx6sx.dtsi index 61a551e5c6f7..3e689cb23141 100644 --- a/arch/arm/boot/dts/imx6sx.dtsi +++ b/arch/arm/boot/dts/imx6sx.dtsi @@ -807,7 +807,12 @@ reg = <0x020dc000 0x4000>; interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>; fsl,mf-mix-wakeup-irq = <0x7c00000 0x3d00 0x0 0x400240>; - clocks = <&clks IMX6SX_CLK_GPU>; + clocks = <&clks IMX6SX_CLK_GPU>, <&clks IMX6SX_CLK_IPG>, + <&clks IMX6SX_CLK_PXP_AXI>, <&clks IMX6SX_CLK_DISPLAY_AXI>, + <&clks IMX6SX_CLK_LCDIF1_PIX>, <&clks IMX6SX_CLK_LCDIF_APB>, + <&clks IMX6SX_CLK_LCDIF2_PIX>, <&clks IMX6SX_CLK_CSI>; + clock-names = "gpu3d_core", "ipg", "pxp_axi", "disp_axi", "lcdif1_pix", + "lcdif_axi", "lcdif2_pix", "csi_mclk"; pcie-phy-supply = <®_pcie_phy>; #power-domain-cells = <1>; }; @@ -1255,6 +1260,7 @@ <&clks IMX6SX_CLK_CSI>, <&clks IMX6SX_CLK_DCIC1>; clock-names = "disp-axi", "csi_mclk", "disp_dcic"; + power-domains = <&gpc 2>; status = "disabled"; }; @@ -1265,6 +1271,7 @@ clocks = <&clks IMX6SX_CLK_PXP_AXI>, <&clks IMX6SX_CLK_DISPLAY_AXI>; clock-names = "pxp-axi", "disp-axi"; + power-domains = <&gpc 2>; status = "disabled"; }; @@ -1276,6 +1283,7 @@ <&clks IMX6SX_CLK_CSI>, <&clks IMX6SX_CLK_DCIC2>; clock-names = "disp-axi", "csi_mclk", "disp_dcic"; + power-domains = <&gpc 2>; status = "disabled"; }; @@ -1287,6 +1295,7 @@ <&clks IMX6SX_CLK_LCDIF_APB>, <&clks IMX6SX_CLK_DISPLAY_AXI>; clock-names = "pix", "axi", "disp_axi"; + power-domains = <&gpc 2>; status = "disabled"; }; @@ -1298,6 +1307,7 @@ <&clks IMX6SX_CLK_LCDIF_APB>, <&clks IMX6SX_CLK_DISPLAY_AXI>; clock-names = "pix", "axi", "disp_axi"; + power-domains = <&gpc 2>; status = "disabled"; }; |