diff options
author | Anson Huang <b20788@freescale.com> | 2015-07-22 00:40:00 +0800 |
---|---|---|
committer | Leonard Crestez <leonard.crestez@nxp.com> | 2018-08-24 12:20:42 +0300 |
commit | a815040a068271dde0a93afb4e40949535e7961c (patch) | |
tree | 8e82a3696ea56a39833200da33f3aa947494fab0 | |
parent | a4253ffbb940b221bd439c5829cc8678cc1c69a1 (diff) |
MLK-11268-2 ARM: imx: disconnect vddhigh and vddsnvs in dsm for imx6ul
Same as i.MX6SX, need to disconnect vddhigh and vddsnvs
in DSM on i.MX6UL, they have same design.
Signed-off-by: Anson Huang <b20788@freescale.com>
(cherry picked from commit f0c63b894a60512318481cb8a7b0777cdb7c46ab)
-rw-r--r-- | arch/arm/mach-imx/anatop.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm/mach-imx/anatop.c b/arch/arm/mach-imx/anatop.c index 9a1a1c354a50..3a88c73d55a9 100644 --- a/arch/arm/mach-imx/anatop.c +++ b/arch/arm/mach-imx/anatop.c @@ -45,7 +45,7 @@ #define BM_ANADIG_ANA_MISC0_V3_STOP_MODE_CONFIG 0xc00 /* Below MISC0_DISCON_HIGH_SNVS is only for i.MX6SL */ #define BM_ANADIG_ANA_MISC0_DISCON_HIGH_SNVS 0x2000 -/* i.MX6SX DISCON_HIGH_SNVS is changed to bit 12 */ +/* Since i.MX6SX, DISCON_HIGH_SNVS is changed to bit 12 */ #define BM_ANADIG_ANA_MISC0_V2_DISCON_HIGH_SNVS 0x1000 #define BM_ANADIG_USB_CHRG_DETECT_CHK_CHRG_B 0x80000 #define BM_ANADIG_USB_CHRG_DETECT_EN_B 0x100000 @@ -85,7 +85,7 @@ static inline void imx_anatop_enable_2p5_pulldown(bool enable) static inline void imx_anatop_disconnect_high_snvs(bool enable) { - if (cpu_is_imx6sx()) + if (cpu_is_imx6sx() || cpu_is_imx6ul()) regmap_write(anatop, ANADIG_ANA_MISC0 + (enable ? REG_SET : REG_CLR), BM_ANADIG_ANA_MISC0_V2_DISCON_HIGH_SNVS); @@ -115,7 +115,7 @@ void imx_anatop_pre_suspend(void) imx_anatop_enable_fet_odrive(true); - if (cpu_is_imx6sl() || cpu_is_imx6sx()) + if (cpu_is_imx6sl() || cpu_is_imx6sx() || cpu_is_imx6ul()) imx_anatop_disconnect_high_snvs(true); } @@ -139,7 +139,7 @@ void imx_anatop_post_resume(void) imx_anatop_enable_fet_odrive(false); - if (cpu_is_imx6sl() || cpu_is_imx6sx()) + if (cpu_is_imx6sl() || cpu_is_imx6sx() || cpu_is_imx6ul()) imx_anatop_disconnect_high_snvs(false); } |