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authorYong Goo Yi <yyi@nvidia.com>2013-05-22 14:29:18 +0900
committerHarshada Kale <hkale@nvidia.com>2013-05-29 00:30:46 -0700
commitb358d326f6ffa7a036407ddc2461921e34a105d7 (patch)
tree643062e8496e969754fb4343e22f799d99ff0bfc
parente3487db6b4064797f2ebcb38296f5b2a651b1a83 (diff)
arm: tegra: tegratab: correct ldo controls
1. Set roof_floor of ldo2/ldo3/ldo4/ldo5/ldo7/ldo9/ldoln to 0. These rails' ON/OFF should be controlled by drivers. External control(roof_floor) should be only used for the power rails which require to be on during system idle/active and do not require to be on when it is in sleep/lp0. 2. Disable always on for ldo6 so that it can be turn off when lp0. 3. Set apply_uV for ldo has min_uV = max_uV Bug 1285809 Change-Id: Icf434890cc387b102845fff83e9a5722d10bcd0d Signed-off-by: Yong Goo Yi <yyi@nvidia.com> Reviewed-on: http://git-master/r/231422 Reviewed-by: Harshada Kale <hkale@nvidia.com> Tested-by: Harshada Kale <hkale@nvidia.com>
-rw-r--r--arch/arm/mach-tegra/board-tegratab-power.c20
1 files changed, 10 insertions, 10 deletions
diff --git a/arch/arm/mach-tegra/board-tegratab-power.c b/arch/arm/mach-tegra/board-tegratab-power.c
index 8f5b26ce1e7c..15972f1da729 100644
--- a/arch/arm/mach-tegra/board-tegratab-power.c
+++ b/arch/arm/mach-tegra/board-tegratab-power.c
@@ -281,23 +281,23 @@ PALMAS_REGS_PDATA(smps10, 5000, 5000, NULL, 0, 0, 0, 0,
PALMAS_REGS_PDATA(ldo1, 1050, 1050, palmas_rails(smps7), 1, 0, 1, 0,
0, PALMAS_EXT_CONTROL_NSLEEP, 0, 0, 0);
PALMAS_REGS_PDATA(ldo2, 1200, 1200, palmas_rails(smps7), 0, 1, 1, 0,
- 0, PALMAS_EXT_CONTROL_NSLEEP, 0, 0, 0);
-PALMAS_REGS_PDATA(ldo3, 1800, 1800, NULL, 0, 0, 0, 0,
- 0, PALMAS_EXT_CONTROL_NSLEEP, 0, 0, 0);
-PALMAS_REGS_PDATA(ldo4, 1200, 1200, palmas_rails(smps8), 0, 0, 0, 0,
- 0, PALMAS_EXT_CONTROL_NSLEEP, 0, 0, 0);
+ 0, 0, 0, 0, 0);
+PALMAS_REGS_PDATA(ldo3, 1800, 1800, NULL, 0, 0, 1, 0,
+ 0, 0, 0, 0, 0);
+PALMAS_REGS_PDATA(ldo4, 1200, 1200, palmas_rails(smps8), 0, 0, 1, 0,
+ 0, 0, 0, 0, 0);
PALMAS_REGS_PDATA(ldo5, 2700, 2700, palmas_rails(smps9), 0, 0, 1, 0,
- 0, PALMAS_EXT_CONTROL_NSLEEP, 0, 0, 0);
-PALMAS_REGS_PDATA(ldo6, 2850, 2850, palmas_rails(smps9), 1, 1, 1, 0,
+ 0, 0, 0, 0, 0);
+PALMAS_REGS_PDATA(ldo6, 2850, 2850, palmas_rails(smps9), 0, 1, 1, 0,
0, 0, 0, 0, 0);
PALMAS_REGS_PDATA(ldo7, 2700, 2700, palmas_rails(smps9), 0, 0, 1, 0,
- 0, PALMAS_EXT_CONTROL_NSLEEP, 0, 0, 0);
+ 0, 0, 0, 0, 0);
PALMAS_REGS_PDATA(ldo8, 950, 950, NULL, 1, 1, 1, 0,
0, 0, 0, 0, 0);
PALMAS_REGS_PDATA(ldo9, 1800, 2900, palmas_rails(smps9), 0, 0, 1, 0,
- 0, PALMAS_EXT_CONTROL_NSLEEP, 0, 0, 0);
+ 0, 0, 0, 0, 0);
PALMAS_REGS_PDATA(ldoln, 3300, 3300, NULL, 0, 0, 1, 0,
- 0, PALMAS_EXT_CONTROL_NSLEEP, 0, 0, 0);
+ 0, 0, 0, 0, 0);
PALMAS_REGS_PDATA(ldousb, 3300, 3300, NULL, 0, 0, 1, 0,
0, PALMAS_EXT_CONTROL_NSLEEP, 0, 0, 0);
PALMAS_REGS_PDATA(regen1, 4200, 4200, NULL, 0, 0, 0, 0,