diff options
| author | Olof Johansson <olof@lixom.net> | 2014-07-12 21:20:47 -0700 |
|---|---|---|
| committer | Olof Johansson <olof@lixom.net> | 2014-07-12 21:20:47 -0700 |
| commit | db6d842b8443ebac7b7b37264f992ce49dfb5208 (patch) | |
| tree | 302e771043ca9fda2a5f7dc50cc54f26faa2d441 | |
| parent | c3df51333444b7404a5b62f3e96f7a5d5b4fd2db (diff) | |
| parent | f86e0add813a3cc0e338089fa6c0928f5f6dc52d (diff) | |
Merge tag 's5p-cleanup-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/cleanup
Merge "Samsung cleanup 2nd version for S5P SoCs for 3.17" from Kukjin Kim:
Cleanup S5P SoCs for 3.17
- removing s5p64x0 SoCs and s5pc100 SoC in mainline because
no more user and if it is required next time, it will be
supported with DT.
* tag 's5p-cleanup-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
video: fbdev: s3c-fb: remove s5pc100 related fimd and fb codes
mtd: onenand: remove s5pc100 related onenand codes
spi: s3c64xx: remove s5pc100 related spi codes
gpio: samsung: remov s5pc100 related gpio codes
ARM: S5PC100: no more support S5PC100 SoC
video: fbdev: s3c-fb: remove s5p64x0 related fimd codes
spi: s3c64xx: remove s5p64x0 related spi codes
gpio: samsung: remove s5p64x0 related gpio codes
ARM: S5P64X0: no more support S5P6440 and S5P6450 SoCs
Signed-off-by: Olof Johansson <olof@lixom.net>
80 files changed, 15 insertions, 8962 deletions
diff --git a/Documentation/arm/Samsung/Overview.txt b/Documentation/arm/Samsung/Overview.txt index 658abb258cef..8f7309bad460 100644 --- a/Documentation/arm/Samsung/Overview.txt +++ b/Documentation/arm/Samsung/Overview.txt @@ -13,8 +13,6 @@ Introduction - S3C24XX: See Documentation/arm/Samsung-S3C24XX/Overview.txt for full list - S3C64XX: S3C6400 and S3C6410 - - S5P6440 - - S5PC100 - S5PC110 / S5PV210 @@ -34,8 +32,6 @@ Configuration A number of configurations are supplied, as there is no current way of unifying all the SoCs into one kernel. - s5p6440_defconfig - S5P6440 specific default configuration - s5pc100_defconfig - S5PC100 specific default configuration s5pc110_defconfig - S5PC110 specific default configuration s5pv210_defconfig - S5PV210 specific default configuration @@ -67,13 +63,6 @@ Layout changes where to simplify the include and dependency issues involved with having so many different platform directories. - It was decided to remove plat-s5pc1xx as some of the support was already - in plat-s5p or plat-samsung, with the S5PC110 support added with S5PV210 - the only user was the S5PC100. The S5PC100 specific items where moved to - arch/arm/mach-s5pc100. - - - Port Contributors ----------------- diff --git a/Documentation/arm/Samsung/clksrc-change-registers.awk b/Documentation/arm/Samsung/clksrc-change-registers.awk index 0c50220851fb..d9174fabe37e 100755 --- a/Documentation/arm/Samsung/clksrc-change-registers.awk +++ b/Documentation/arm/Samsung/clksrc-change-registers.awk @@ -68,7 +68,6 @@ BEGIN { while (getline line < ARGV[1] > 0) { if (line ~ /\#define.*_MASK/ && - !(line ~ /S5PC100_EPLL_MASK/) && !(line ~ /USB_SIG_MASK/)) { splitdefine(line, fields) name = fields[0] diff --git a/Documentation/devicetree/bindings/spi/spi-samsung.txt b/Documentation/devicetree/bindings/spi/spi-samsung.txt index 86aa061f069f..fe6f9037b561 100644 --- a/Documentation/devicetree/bindings/spi/spi-samsung.txt +++ b/Documentation/devicetree/bindings/spi/spi-samsung.txt @@ -8,7 +8,6 @@ Required SoC Specific Properties: - compatible: should be one of the following. - samsung,s3c2443-spi: for s3c2443, s3c2416 and s3c2450 platforms - samsung,s3c6410-spi: for s3c6410 platforms - - samsung,s5p6440-spi: for s5p6440 and s5p6450 platforms - samsung,s5pv210-spi: for s5pv210 and s5pc110 platforms - samsung,exynos4210-spi: for exynos4 and exynos5 platforms diff --git a/Documentation/devicetree/bindings/video/samsung-fimd.txt b/Documentation/devicetree/bindings/video/samsung-fimd.txt index 2dad41b689af..77942607f77f 100644 --- a/Documentation/devicetree/bindings/video/samsung-fimd.txt +++ b/Documentation/devicetree/bindings/video/samsung-fimd.txt @@ -8,8 +8,6 @@ Required properties: - compatible: value should be one of the following "samsung,s3c2443-fimd"; /* for S3C24XX SoCs */ "samsung,s3c6400-fimd"; /* for S3C64XX SoCs */ - "samsung,s5p6440-fimd"; /* for S5P64X0 SoCs */ - "samsung,s5pc100-fimd"; /* for S5PC100 SoC */ "samsung,s5pv210-fimd"; /* for S5PV210 SoC */ "samsung,exynos4210-fimd"; /* for Exynos4 SoCs */ "samsung,exynos5250-fimd"; /* for Exynos5 SoCs */ diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 06aab1024305..ea73acc1280d 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -757,42 +757,6 @@ config ARCH_S3C64XX help Samsung S3C64XX series based systems -config ARCH_S5P64X0 - bool "Samsung S5P6440 S5P6450" - select ATAGS - select CLKDEV_LOOKUP - select CLKSRC_SAMSUNG_PWM - select CPU_V6 - select GENERIC_CLOCKEVENTS - select GPIO_SAMSUNG - select HAVE_S3C2410_I2C if I2C - select HAVE_S3C2410_WATCHDOG if WATCHDOG - select HAVE_S3C_RTC if RTC_CLASS - select NEED_MACH_GPIO_H - select SAMSUNG_ATAGS - select SAMSUNG_WDT_RESET - help - Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440, - SMDK6450. - -config ARCH_S5PC100 - bool "Samsung S5PC100" - select ARCH_REQUIRE_GPIOLIB - select ATAGS - select CLKDEV_LOOKUP - select CLKSRC_SAMSUNG_PWM - select CPU_V7 - select GENERIC_CLOCKEVENTS - select GPIO_SAMSUNG - select HAVE_S3C2410_I2C if I2C - select HAVE_S3C2410_WATCHDOG if WATCHDOG - select HAVE_S3C_RTC if RTC_CLASS - select NEED_MACH_GPIO_H - select SAMSUNG_ATAGS - select SAMSUNG_WDT_RESET - help - Samsung S5PC100 series based systems - config ARCH_S5PV210 bool "Samsung S5PV210/S5PC110" select ARCH_HAS_HOLES_MEMORYMODEL @@ -1003,10 +967,6 @@ source "arch/arm/mach-s3c24xx/Kconfig" source "arch/arm/mach-s3c64xx/Kconfig" -source "arch/arm/mach-s5p64x0/Kconfig" - -source "arch/arm/mach-s5pc100/Kconfig" - source "arch/arm/mach-s5pv210/Kconfig" source "arch/arm/mach-exynos/Kconfig" @@ -1568,7 +1528,7 @@ source kernel/Kconfig.preempt config HZ_FIXED int - default 200 if ARCH_EBSA110 || ARCH_S3C24XX || ARCH_S5P64X0 || \ + default 200 if ARCH_EBSA110 || ARCH_S3C24XX || \ ARCH_S5PV210 || ARCH_EXYNOS4 default AT91_TIMER_HZ if ARCH_AT91 default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE_LEGACY @@ -2193,7 +2153,6 @@ menu "Power management options" source "kernel/power/Kconfig" config ARCH_SUSPEND_POSSIBLE - depends on !ARCH_S5PC100 depends on CPU_ARM920T || CPU_ARM926T || CPU_FEROCEON || CPU_SA1100 || \ CPU_V6 || CPU_V6K || CPU_V7 || CPU_V7M || CPU_XSC3 || CPU_XSCALE || CPU_MOHAWK def_bool y diff --git a/arch/arm/Makefile b/arch/arm/Makefile index 6721fab13734..d3f470c2201b 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -187,8 +187,6 @@ machine-$(CONFIG_ARCH_ROCKCHIP) += rockchip machine-$(CONFIG_ARCH_RPC) += rpc machine-$(CONFIG_ARCH_S3C24XX) += s3c24xx machine-$(CONFIG_ARCH_S3C64XX) += s3c64xx -machine-$(CONFIG_ARCH_S5P64X0) += s5p64x0 -machine-$(CONFIG_ARCH_S5PC100) += s5pc100 machine-$(CONFIG_ARCH_S5PV210) += s5pv210 machine-$(CONFIG_ARCH_SA1100) += sa1100 machine-$(CONFIG_ARCH_SHMOBILE) += shmobile diff --git a/arch/arm/configs/s5p64x0_defconfig b/arch/arm/configs/s5p64x0_defconfig deleted file mode 100644 index ad6b61b0bd11..000000000000 --- a/arch/arm/configs/s5p64x0_defconfig +++ /dev/null @@ -1,68 +0,0 @@ -CONFIG_EXPERIMENTAL=y -CONFIG_SYSFS_DEPRECATED_V2=y -CONFIG_BLK_DEV_INITRD=y -CONFIG_KALLSYMS_ALL=y -CONFIG_MODULES=y -CONFIG_MODULE_UNLOAD=y -# CONFIG_BLK_DEV_BSG is not set -CONFIG_ARCH_S5P64X0=y -CONFIG_S3C_BOOT_ERROR_RESET=y -CONFIG_S3C_LOWLEVEL_UART_PORT=1 -CONFIG_MACH_SMDK6440=y -CONFIG_MACH_SMDK6450=y -CONFIG_NO_HZ=y -CONFIG_HIGH_RES_TIMERS=y -CONFIG_CPU_32v6K=y -CONFIG_AEABI=y -CONFIG_CMDLINE="root=/dev/ram0 rw ramdisk=8192 initrd=0x20800000,8M console=ttySAC1,115200 init=/linuxrc" -CONFIG_FPE_NWFPE=y -CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" -# CONFIG_PREVENT_FIRMWARE_BUILD is not set -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_SIZE=8192 -# CONFIG_MISC_DEVICES is not set -CONFIG_SCSI=y -CONFIG_BLK_DEV_SD=y -CONFIG_CHR_DEV_SG=y -CONFIG_INPUT_EVDEV=y -CONFIG_INPUT_TOUCHSCREEN=y -CONFIG_SERIAL_8250=y -CONFIG_SERIAL_8250_NR_UARTS=3 -CONFIG_SERIAL_SAMSUNG=y -CONFIG_SERIAL_SAMSUNG_CONSOLE=y -CONFIG_HW_RANDOM=y -# CONFIG_HWMON is not set -CONFIG_DISPLAY_SUPPORT=y -# CONFIG_VGA_CONSOLE is not set -# CONFIG_HID_SUPPORT is not set -# CONFIG_USB_SUPPORT is not set -CONFIG_EXT2_FS=y -CONFIG_EXT3_FS=y -CONFIG_EXT3_FS_POSIX_ACL=y -CONFIG_EXT3_FS_SECURITY=y -CONFIG_INOTIFY=y -CONFIG_MSDOS_FS=y -CONFIG_VFAT_FS=y -CONFIG_TMPFS=y -CONFIG_TMPFS_POSIX_ACL=y -CONFIG_CRAMFS=y -CONFIG_ROMFS_FS=y -CONFIG_NLS_CODEPAGE_437=y -CONFIG_NLS_ASCII=y -CONFIG_NLS_ISO8859_1=y -CONFIG_MAGIC_SYSRQ=y -CONFIG_DEBUG_KERNEL=y -CONFIG_DEBUG_RT_MUTEXES=y -CONFIG_DEBUG_SPINLOCK=y -CONFIG_DEBUG_MUTEXES=y -CONFIG_DEBUG_SPINLOCK_SLEEP=y -CONFIG_DEBUG_INFO=y -# CONFIG_RCU_CPU_STALL_DETECTOR is not set -CONFIG_SYSCTL_SYSCALL_CHECK=y -CONFIG_DEBUG_USER=y -CONFIG_DEBUG_ERRORS=y -CONFIG_DEBUG_LL=y -CONFIG_DEBUG_S3C_UART=1 -CONFIG_CRYPTO=y -# CONFIG_CRYPTO_ANSI_CPRNG is not set -CONFIG_CRC_CCITT=y diff --git a/arch/arm/configs/s5pc100_defconfig b/arch/arm/configs/s5pc100_defconfig deleted file mode 100644 index 41bafc94dd85..000000000000 --- a/arch/arm/configs/s5pc100_defconfig +++ /dev/null @@ -1,49 +0,0 @@ -CONFIG_EXPERIMENTAL=y -CONFIG_SYSFS_DEPRECATED_V2=y -CONFIG_BLK_DEV_INITRD=y -CONFIG_KALLSYMS_ALL=y -CONFIG_MODULES=y -CONFIG_MODULE_UNLOAD=y -# CONFIG_BLK_DEV_BSG is not set -CONFIG_ARCH_S5PC100=y -CONFIG_MACH_SMDKC100=y -CONFIG_AEABI=y -CONFIG_CMDLINE="root=/dev/mtdblock2 rootfstype=cramfs init=/linuxrc console=ttySAC2,115200 mem=128M" -CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" -CONFIG_BLK_DEV_LOOP=y -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_SIZE=8192 -CONFIG_EEPROM_AT24=y -CONFIG_SERIAL_8250=y -CONFIG_SERIAL_SAMSUNG=y -CONFIG_SERIAL_SAMSUNG_CONSOLE=y -CONFIG_HW_RANDOM=y -CONFIG_I2C=y -CONFIG_I2C_CHARDEV=y -# CONFIG_VGA_CONSOLE is not set -CONFIG_MMC=y -CONFIG_MMC_DEBUG=y -CONFIG_MMC_UNSAFE_RESUME=y -CONFIG_SDIO_UART=y -CONFIG_MMC_SDHCI=y -CONFIG_EXT2_FS=y -CONFIG_EXT3_FS=y -CONFIG_EXT3_FS_POSIX_ACL=y -CONFIG_EXT3_FS_SECURITY=y -CONFIG_INOTIFY=y -CONFIG_TMPFS=y -CONFIG_TMPFS_POSIX_ACL=y -CONFIG_CRAMFS=y -CONFIG_ROMFS_FS=y -CONFIG_MAGIC_SYSRQ=y -CONFIG_DEBUG_KERNEL=y -CONFIG_DEBUG_RT_MUTEXES=y -CONFIG_DEBUG_SPINLOCK=y -CONFIG_DEBUG_MUTEXES=y -CONFIG_DEBUG_SPINLOCK_SLEEP=y -CONFIG_DEBUG_INFO=y -# CONFIG_RCU_CPU_STALL_DETECTOR is not set -CONFIG_SYSCTL_SYSCALL_CHECK=y -CONFIG_DEBUG_USER=y -CONFIG_DEBUG_ERRORS=y -CONFIG_DEBUG_LL=y diff --git a/arch/arm/mach-s5p64x0/Kconfig b/arch/arm/mach-s5p64x0/Kconfig deleted file mode 100644 index 26003e23796d..000000000000 --- a/arch/arm/mach-s5p64x0/Kconfig +++ /dev/null @@ -1,102 +0,0 @@ -# arch/arm/mach-s5p64x0/Kconfig -# -# Copyright (c) 2009-2010 Samsung Electronics Co., Ltd. -# http://www.samsung.com/ -# -# Licensed under GPLv2 - -if ARCH_S5P64X0 - -config CPU_S5P6440 - bool - select ARM_AMBA - select PL330_DMA if DMADEVICES - select S5P_SLEEP if PM - select SAMSUNG_WAKEMASK if PM - help - Enable S5P6440 CPU support - -config CPU_S5P6450 - bool - select ARM_AMBA - select PL330_DMA if DMADEVICES - select S5P_SLEEP if PM - select SAMSUNG_WAKEMASK if PM - help - Enable S5P6450 CPU support - -config S5P64X0_SETUP_FB_24BPP - bool - help - Common setup code for S5P64X0 based boards with a LCD display - through RGB interface. - -config S5P64X0_SETUP_I2C1 - bool - help - Common setup code for i2c bus 1. - -config S5P64X0_SETUP_SPI - bool - help - Common setup code for SPI GPIO configurations - -config S5P64X0_SETUP_SDHCI_GPIO - bool - help - Common setup code for SDHCI gpio. - -# machine support - -config MACH_SMDK6440 - bool "SMDK6440" - select CPU_S5P6440 - select S3C_DEV_FB - select S3C_DEV_HSMMC - select S3C_DEV_HSMMC1 - select S3C_DEV_HSMMC2 - select S3C_DEV_I2C1 - select S3C_DEV_RTC - select S3C_DEV_WDT - select S5P64X0_SETUP_FB_24BPP - select S5P64X0_SETUP_I2C1 - select S5P64X0_SETUP_SDHCI_GPIO - select SAMSUNG_DEV_ADC - select SAMSUNG_DEV_BACKLIGHT - select SAMSUNG_DEV_PWM - select SAMSUNG_DEV_TS - help - Machine support for the Samsung SMDK6440 - -config MACH_SMDK6450 - bool "SMDK6450" - select CPU_S5P6450 - select S3C_DEV_FB - select S3C_DEV_HSMMC - select S3C_DEV_HSMMC1 - select S3C_DEV_HSMMC2 - select S3C_DEV_I2C1 - select S3C_DEV_RTC - select S3C_DEV_WDT - select S5P64X0_SETUP_FB_24BPP - select S5P64X0_SETUP_I2C1 - select S5P64X0_SETUP_SDHCI_GPIO - select SAMSUNG_DEV_ADC - select SAMSUNG_DEV_BACKLIGHT - select SAMSUNG_DEV_PWM - select SAMSUNG_DEV_TS - help - Machine support for the Samsung SMDK6450 - -menu "Use 8-bit SDHCI bus width" - -config S5P64X0_SD_CH1_8BIT - bool "SDHCI Channel 1 (Slot 1)" - depends on MACH_SMDK6450 || MACH_SMDK6440 - help - Support SDHCI Channel 1 8-bit bus. - If selected, Channel 2 is disabled. - -endmenu - -endif diff --git a/arch/arm/mach-s5p64x0/Makefile b/arch/arm/mach-s5p64x0/Makefile deleted file mode 100644 index 12bb951187a4..000000000000 --- a/arch/arm/mach-s5p64x0/Makefile +++ /dev/null @@ -1,36 +0,0 @@ -# arch/arm/mach-s5p64x0/Makefile -# -# Copyright (c) 2009-2010 Samsung Electronics Co., Ltd. -# http://www.samsung.com -# -# Licensed under GPLv2 - -obj-y := -obj-m := -obj-n := -obj- := - -# Core - -obj-y += common.o clock.o -obj-$(CONFIG_CPU_S5P6440) += clock-s5p6440.o -obj-$(CONFIG_CPU_S5P6450) += clock-s5p6450.o - -obj-$(CONFIG_PM) += pm.o irq-pm.o - -obj-y += dma.o - -# machine support - -obj-$(CONFIG_MACH_SMDK6440) += mach-smdk6440.o -obj-$(CONFIG_MACH_SMDK6450) += mach-smdk6450.o - -# device support - -obj-y += dev-audio.o - -obj-y += setup-i2c0.o -obj-$(CONFIG_S5P64X0_SETUP_I2C1) += setup-i2c1.o -obj-$(CONFIG_S5P64X0_SETUP_FB_24BPP) += setup-fb-24bpp.o -obj-$(CONFIG_S5P64X0_SETUP_SPI) += setup-spi.o -obj-$(CONFIG_S5P64X0_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o diff --git a/arch/arm/mach-s5p64x0/Makefile.boot b/arch/arm/mach-s5p64x0/Makefile.boot deleted file mode 100644 index 79ece4055b02..000000000000 --- a/arch/arm/mach-s5p64x0/Makefile.boot +++ /dev/null @@ -1,2 +0,0 @@ - zreladdr-y += 0x20008000 -params_phys-y := 0x20000100 diff --git a/arch/arm/mach-s5p64x0/clock-s5p6440.c b/arch/arm/mach-s5p64x0/clock-s5p6440.c deleted file mode 100644 index ae34a1d5e10a..000000000000 --- a/arch/arm/mach-s5p64x0/clock-s5p6440.c +++ /dev/null @@ -1,632 +0,0 @@ -/* linux/arch/arm/mach-s5p64x0/clock-s5p6440.c - * - * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * S5P6440 - Clock support - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#include <linux/init.h> -#include <linux/module.h> -#include <linux/kernel.h> -#include <linux/list.h> -#include <linux/errno.h> -#include <linux/err.h> -#include <linux/clk.h> -#include <linux/device.h> -#include <linux/io.h> - -#include <mach/hardware.h> -#include <mach/map.h> -#include <mach/regs-clock.h> - -#include <plat/cpu-freq.h> -#include <plat/clock.h> -#include <plat/cpu.h> -#include <plat/pll.h> -#include <plat/s5p-clock.h> -#include <plat/clock-clksrc.h> - -#include "clock.h" -#include "common.h" - -static u32 epll_div[][5] = { - { 36000000, 0, 48, 1, 4 }, - { 48000000, 0, 32, 1, 3 }, - { 60000000, 0, 40, 1, 3 }, - { 72000000, 0, 48, 1, 3 }, - { 84000000, 0, 28, 1, 2 }, - { 96000000, 0, 32, 1, 2 }, - { 32768000, 45264, 43, 1, 4 }, - { 45158000, 6903, 30, 1, 3 }, - { 49152000, 50332, 32, 1, 3 }, - { 67738000, 10398, 45, 1, 3 }, - { 73728000, 9961, 49, 1, 3 } -}; - -static int s5p6440_epll_set_rate(struct clk *clk, unsigned long rate) -{ - unsigned int epll_con, epll_con_k; - unsigned int i; - - if (clk->rate == rate) /* Return if nothing changed */ - return 0; - - epll_con = __raw_readl(S5P64X0_EPLL_CON); - epll_con_k = __raw_readl(S5P64X0_EPLL_CON_K); - - epll_con_k &= ~(PLL90XX_KDIV_MASK); - epll_con &= ~(PLL90XX_MDIV_MASK | PLL90XX_PDIV_MASK | PLL90XX_SDIV_MASK); - - for (i = 0; i < ARRAY_SIZE(epll_div); i++) { - if (epll_div[i][0] == rate) { - epll_con_k |= (epll_div[i][1] << PLL90XX_KDIV_SHIFT); - epll_con |= (epll_div[i][2] << PLL90XX_MDIV_SHIFT) | - (epll_div[i][3] << PLL90XX_PDIV_SHIFT) | - (epll_div[i][4] << PLL90XX_SDIV_SHIFT); - break; - } - } - - if (i == ARRAY_SIZE(epll_div)) { - printk(KERN_ERR "%s: Invalid Clock EPLL Frequency\n", __func__); - return -EINVAL; - } - - __raw_writel(epll_con, S5P64X0_EPLL_CON); - __raw_writel(epll_con_k, S5P64X0_EPLL_CON_K); - - printk(KERN_WARNING "EPLL Rate changes from %lu to %lu\n", - clk->rate, rate); - - clk->rate = rate; - - return 0; -} - -static struct clk_ops s5p6440_epll_ops = { - .get_rate = s5p_epll_get_rate, - .set_rate = s5p6440_epll_set_rate, -}; - -static struct clksrc_clk clk_hclk = { - .clk = { - .name = "clk_hclk", - .parent = &clk_armclk.clk, - }, - .reg_div = { .reg = S5P64X0_CLK_DIV0, .shift = 8, .size = 4 }, -}; - -static struct clksrc_clk clk_pclk = { - .clk = { - .name = "clk_pclk", - .parent = &clk_hclk.clk, - }, - .reg_div = { .reg = S5P64X0_CLK_DIV0, .shift = 12, .size = 4 }, -}; -static struct clksrc_clk clk_hclk_low = { - .clk = { - .name = "clk_hclk_low", - }, - .sources = &clkset_hclk_low, - .reg_src = { .reg = S5P64X0_SYS_OTHERS, .shift = 6, .size = 1 }, - .reg_div = { .reg = S5P64X0_CLK_DIV3, .shift = 8, .size = 4 }, -}; - -static struct clksrc_clk clk_pclk_low = { - .clk = { - .name = "clk_pclk_low", - .parent = &clk_hclk_low.clk, - }, - .reg_div = { .reg = S5P64X0_CLK_DIV3, .shift = 12, .size = 4 }, -}; - -/* - * The following clocks will be disabled during clock initialization. It is - * recommended to keep the following clocks disabled until the driver requests - * for enabling the clock. - */ -static struct clk init_clocks_off[] = { - { - .name = "nand", - .parent = &clk_hclk.clk, - .enable = s5p64x0_mem_ctrl, - .ctrlbit = (1 << 2), - }, { - .name = "post", - .parent = &clk_hclk_low.clk, - .enable = s5p64x0_hclk0_ctrl, - .ctrlbit = (1 << 5) - }, { - .name = "2d", - .parent = &clk_hclk.clk, - .enable = s5p64x0_hclk0_ctrl, - .ctrlbit = (1 << 8), - }, { - .name = "dma", - .devname = "dma-pl330", - .parent = &clk_hclk_low.clk, - .enable = s5p64x0_hclk0_ctrl, - .ctrlbit = (1 << 12), - }, { - .name = "hsmmc", - .devname = "s3c-sdhci.0", - .parent = &clk_hclk_low.clk, - .enable = s5p64x0_hclk0_ctrl, - .ctrlbit = (1 << 17), - }, { - .name = "hsmmc", - .devname = "s3c-sdhci.1", - .parent = &clk_hclk_low.clk, - .enable = s5p64x0_hclk0_ctrl, - .ctrlbit = (1 << 18), - }, { - .name = "hsmmc", - .devname = "s3c-sdhci.2", - .parent = &clk_hclk_low.clk, - .enable = s5p64x0_hclk0_ctrl, - .ctrlbit = (1 << 19), - }, { - .name = "otg", - .parent = &clk_hclk_low.clk, - .enable = s5p64x0_hclk0_ctrl, - .ctrlbit = (1 << 20) - }, { - .name = "irom", - .parent = &clk_hclk.clk, - .enable = s5p64x0_hclk0_ctrl, - .ctrlbit = (1 << 25), - }, { - .name = "lcd", - .parent = &clk_hclk_low.clk, - .enable = s5p64x0_hclk1_ctrl, - .ctrlbit = (1 << 1), - }, { - .name = "hclk_fimgvg", - .parent = &clk_hclk.clk, - .enable = s5p64x0_hclk1_ctrl, - .ctrlbit = (1 << 2), - }, { - .name = "tsi", - .parent = &clk_hclk_low.clk, - .enable = s5p64x0_hclk1_ctrl, - .ctrlbit = (1 << 0), - }, { - .name = "watchdog", - .parent = &clk_pclk_low.clk, - .enable = s5p64x0_pclk_ctrl, - .ctrlbit = (1 << 5), - }, { - .name = "rtc", - .parent = &clk_pclk_low.clk, - .enable = s5p64x0_pclk_ctrl, - .ctrlbit = (1 << 6), - }, { - .name = "timers", - .parent = &clk_pclk_low.clk, - .enable = s5p64x0_pclk_ctrl, - .ctrlbit = (1 << 7), - }, { - .name = "pcm", - .parent = &clk_pclk_low.clk, - .enable = s5p64x0_pclk_ctrl, - .ctrlbit = (1 << 8), - }, { - .name = "adc", - .parent = &clk_pclk_low.clk, - .enable = s5p64x0_pclk_ctrl, - .ctrlbit = (1 << 12), - }, { - .name = "i2c", - .parent = &clk_pclk_low.clk, - .enable = s5p64x0_pclk_ctrl, - .ctrlbit = (1 << 17), - }, { - .name = "spi", - .devname = "s5p64x0-spi.0", - .parent = &clk_pclk_low.clk, - .enable = s5p64x0_pclk_ctrl, - .ctrlbit = (1 << 21), - }, { - .name = "spi", - .devname = "s5p64x0-spi.1", - .parent = &clk_pclk_low.clk, - .enable = s5p64x0_pclk_ctrl, - .ctrlbit = (1 << 22), - }, { - .name = "gps", - .parent = &clk_pclk_low.clk, - .enable = s5p64x0_pclk_ctrl, - .ctrlbit = (1 << 25), - }, { - .name = "dsim", - .parent = &clk_pclk_low.clk, - .enable = s5p64x0_pclk_ctrl, - .ctrlbit = (1 << 28), - }, { - .name = "etm", - .parent = &clk_pclk.clk, - .enable = s5p64x0_pclk_ctrl, - .ctrlbit = (1 << 29), - }, { - .name = "dmc0", - .parent = &clk_pclk.clk, - .enable = s5p64x0_pclk_ctrl, - .ctrlbit = (1 << 30), - }, { - .name = "pclk_fimgvg", - .parent = &clk_pclk.clk, - .enable = s5p64x0_pclk_ctrl, - .ctrlbit = (1 << 31), - }, { - .name = "mmc_48m", - .devname = "s3c-sdhci.0", - .parent = &clk_48m, - .enable = s5p64x0_sclk_ctrl, - .ctrlbit = (1 << 27), - }, { - .name = "mmc_48m", - .devname = "s3c-sdhci.1", - .parent = &clk_48m, - .enable = s5p64x0_sclk_ctrl, - .ctrlbit = (1 << 28), - }, { - .name = "mmc_48m", - .devname = "s3c-sdhci.2", - .parent = &clk_48m, - .enable = s5p64x0_sclk_ctrl, - .ctrlbit = (1 << 29), - }, -}; - -/* - * The following clocks will be enabled during clock initialization. - */ -static struct clk init_clocks[] = { - { - .name = "intc", - .parent = &clk_hclk.clk, - .enable = s5p64x0_hclk0_ctrl, - .ctrlbit = (1 << 1), - }, { - .name = "mem", - .parent = &clk_hclk.clk, - .enable = s5p64x0_hclk0_ctrl, - .ctrlbit = (1 << 21), - }, { - .name = "uart", - .devname = "s3c6400-uart.0", - .parent = &clk_pclk_low.clk, - .enable = s5p64x0_pclk_ctrl, - .ctrlbit = (1 << 1), - }, { - .name = "uart", - .devname = "s3c6400-uart.1", - .parent = &clk_pclk_low.clk, - .enable = s5p64x0_pclk_ctrl, - .ctrlbit = (1 << 2), - }, { - .name = "uart", - .devname = "s3c6400-uart.2", - .parent = &clk_pclk_low.clk, - .enable = s5p64x0_pclk_ctrl, - .ctrlbit = (1 << 3), - }, { - .name = "uart", - .devname = "s3c6400-uart.3", - .parent = &clk_pclk_low.clk, - .enable = s5p64x0_pclk_ctrl, - .ctrlbit = (1 << 4), - }, { - .name = "gpio", - .parent = &clk_pclk_low.clk, - .enable = s5p64x0_pclk_ctrl, - .ctrlbit = (1 << 18), - }, -}; - -static struct clk clk_iis_cd_v40 = { - .name = "iis_cdclk_v40", -}; - -static struct clk clk_pcm_cd = { - .name = "pcm_cdclk", -}; - -static struct clk *clkset_group1_list[] = { - &clk_mout_epll.clk, - &clk_dout_mpll.clk, - &clk_fin_epll, -}; - -static struct clksrc_sources clkset_group1 = { - .sources = clkset_group1_list, - .nr_sources = ARRAY_SIZE(clkset_group1_list), -}; - -static struct clk *clkset_uart_list[] = { - &clk_mout_epll.clk, - &clk_dout_mpll.clk, -}; - -static struct clksrc_sources clkset_uart = { - .sources = clkset_uart_list, - .nr_sources = ARRAY_SIZE(clkset_uart_list), -}; - -static struct clk *clkset_audio_list[] = { - &clk_mout_epll.clk, - &clk_dout_mpll.clk, - &clk_fin_epll, - &clk_iis_cd_v40, - &clk_pcm_cd, -}; - -static struct clksrc_sources clkset_audio = { - .sources = clkset_audio_list, - .nr_sources = ARRAY_SIZE(clkset_audio_list), -}; - -static struct clksrc_clk clksrcs[] = { - { - .clk = { - .name = "sclk_post", - .ctrlbit = (1 << 10), - .enable = s5p64x0_sclk_ctrl, - }, - .sources = &clkset_group1, - .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 26, .size = 2 }, - .reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 12, .size = 4 }, - }, { - .clk = { - .name = "sclk_dispcon", - .ctrlbit = (1 << 1), - .enable = s5p64x0_sclk1_ctrl, - }, - .sources = &clkset_group1, - .reg_src = { .reg = S5P64X0_CLK_SRC1, .shift = 4, .size = 2 }, - .reg_div = { .reg = S5P64X0_CLK_DIV3, .shift = 0, .size = 4 }, - }, { - .clk = { - .name = "sclk_fimgvg", - .ctrlbit = (1 << 2), - .enable = s5p64x0_sclk1_ctrl, - }, - .sources = &clkset_group1, - .reg_src = { .reg = S5P64X0_CLK_SRC1, .shift = 8, .size = 2 }, - .reg_div = { .reg = S5P64X0_CLK_DIV3, .shift = 4, .size = 4 }, - }, -}; - -static struct clksrc_clk clk_sclk_mmc0 = { - .clk = { - .name = "sclk_mmc", - .devname = "s3c-sdhci.0", - .ctrlbit = (1 << 24), - .enable = s5p64x0_sclk_ctrl, - }, - .sources = &clkset_group1, - .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 18, .size = 2 }, - .reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 0, .size = 4 }, -}; - -static struct clksrc_clk clk_sclk_mmc1 = { - .clk = { - .name = "sclk_mmc", - .devname = "s3c-sdhci.1", - .ctrlbit = (1 << 25), - .enable = s5p64x0_sclk_ctrl, - }, - .sources = &clkset_group1, - .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 20, .size = 2 }, - .reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 4, .size = 4 }, -}; - -static struct clksrc_clk clk_sclk_mmc2 = { - .clk = { - .name = "sclk_mmc", - .devname = "s3c-sdhci.2", - .ctrlbit = (1 << 26), - .enable = s5p64x0_sclk_ctrl, - }, - .sources = &clkset_group1, - .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 22, .size = 2 }, - .reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 8, .size = 4 }, -}; - -static struct clksrc_clk clk_sclk_uclk = { - .clk = { - .name = "uclk1", - .ctrlbit = (1 << 5), - .enable = s5p64x0_sclk_ctrl, - }, - .sources = &clkset_uart, - .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 13, .size = 1 }, - .reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 16, .size = 4 }, -}; - -static struct clk clk_i2s0 = { - .name = "iis", - .devname = "samsung-i2s.0", - .parent = &clk_pclk_low.clk, - .enable = s5p64x0_pclk_ctrl, - .ctrlbit = (1 << 26), -}; - -static struct clksrc_clk clk_audio_bus2 = { - .clk = { - .name = "sclk_audio2", - .devname = "samsung-i2s.0", - .ctrlbit = (1 << 11), - .enable = s5p64x0_sclk_ctrl, - }, - .sources = &clkset_audio, - .reg_src = { .reg = S5P64X0_CLK_SRC1, .shift = 0, .size = 3 }, - .reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 24, .size = 4 }, -}; - -static struct clksrc_clk clk_sclk_spi0 = { - .clk = { - .name = "sclk_spi", - .devname = "s5p64x0-spi.0", - .ctrlbit = (1 << 20), - .enable = s5p64x0_sclk_ctrl, - }, - .sources = &clkset_group1, - .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 14, .size = 2 }, - .reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 0, .size = 4 }, -}; - -static struct clksrc_clk clk_sclk_spi1 = { - .clk = { - .name = "sclk_spi", - .devname = "s5p64x0-spi.1", - .ctrlbit = (1 << 21), - .enable = s5p64x0_sclk_ctrl, - }, - .sources = &clkset_group1, - .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 16, .size = 2 }, - .reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 4, .size = 4 }, -}; - -/* Clock initialization code */ -static struct clksrc_clk *sysclks[] = { - &clk_mout_apll, - &clk_mout_epll, - &clk_mout_mpll, - &clk_dout_mpll, - &clk_armclk, - &clk_hclk, - &clk_pclk, - &clk_hclk_low, - &clk_pclk_low, -}; - -static struct clk dummy_apb_pclk = { - .name = "apb_pclk", - .id = -1, -}; - -static struct clk *clk_cdev[] = { - &clk_i2s0, -}; - -static struct clksrc_clk *clksrc_cdev[] = { - &clk_sclk_uclk, - &clk_sclk_spi0, - &clk_sclk_spi1, - &clk_sclk_mmc0, - &clk_sclk_mmc1, - &clk_sclk_mmc2, - &clk_audio_bus2, -}; - -static struct clk_lookup s5p6440_clk_lookup[] = { - CLKDEV_INIT(NULL, "clk_uart_baud2", &clk_pclk_low.clk), - CLKDEV_INIT(NULL, "clk_uart_baud3", &clk_sclk_uclk.clk), - CLKDEV_INIT(NULL, "spi_busclk0", &clk_p), - CLKDEV_INIT("s5p64x0-spi.0", "spi_busclk1", &clk_sclk_spi0.clk), - CLKDEV_INIT("s5p64x0-spi.1", "spi_busclk1", &clk_sclk_spi1.clk), - CLKDEV_INIT("s3c-sdhci.0", "mmc_busclk.2", &clk_sclk_mmc0.clk), - CLKDEV_INIT("s3c-sdhci.1", "mmc_busclk.2", &clk_sclk_mmc1.clk), - CLKDEV_INIT("s3c-sdhci.2", "mmc_busclk.2", &clk_sclk_mmc2.clk), - CLKDEV_INIT("samsung-i2s.0", "i2s_opclk0", &clk_i2s0), - CLKDEV_INIT("samsung-i2s.0", "i2s_opclk1", &clk_audio_bus2.clk), -}; - -void __init_or_cpufreq s5p6440_setup_clocks(void) -{ - struct clk *xtal_clk; - - unsigned long xtal; - unsigned long fclk; - unsigned long hclk; - unsigned long hclk_low; - unsigned long pclk; - unsigned long pclk_low; - - unsigned long apll; - unsigned long mpll; - unsigned long epll; - unsigned int ptr; - - /* Set S5P6440 functions for clk_fout_epll */ - - clk_fout_epll.enable = s5p_epll_enable; - clk_fout_epll.ops = &s5p6440_epll_ops; - - clk_48m.enable = s5p64x0_clk48m_ctrl; - - xtal_clk = clk_get(NULL, "ext_xtal"); - BUG_ON(IS_ERR(xtal_clk)); - - xtal = clk_get_rate(xtal_clk); - clk_put(xtal_clk); - - apll = s5p_get_pll45xx(xtal, __raw_readl(S5P64X0_APLL_CON), pll_4502); - mpll = s5p_get_pll45xx(xtal, __raw_readl(S5P64X0_MPLL_CON), pll_4502); - epll = s5p_get_pll90xx(xtal, __raw_readl(S5P64X0_EPLL_CON), - __raw_readl(S5P64X0_EPLL_CON_K)); - - clk_fout_apll.rate = apll; - clk_fout_mpll.rate = mpll; - clk_fout_epll.rate = epll; - - printk(KERN_INFO "S5P6440: PLL settings, A=%ld.%ldMHz, M=%ld.%ldMHz," \ - " E=%ld.%ldMHz\n", - print_mhz(apll), print_mhz(mpll), print_mhz(epll)); - - fclk = clk_get_rate(&clk_armclk.clk); - hclk = clk_get_rate(&clk_hclk.clk); - pclk = clk_get_rate(&clk_pclk.clk); - hclk_low = clk_get_rate(&clk_hclk_low.clk); - pclk_low = clk_get_rate(&clk_pclk_low.clk); - - printk(KERN_INFO "S5P6440: HCLK=%ld.%ldMHz, HCLK_LOW=%ld.%ldMHz," \ - " PCLK=%ld.%ldMHz, PCLK_LOW=%ld.%ldMHz\n", - print_mhz(hclk), print_mhz(hclk_low), - print_mhz(pclk), print_mhz(pclk_low)); - - clk_f.rate = fclk; - clk_h.rate = hclk; - clk_p.rate = pclk; - - for (ptr = 0; ptr < ARRAY_SIZE(clksrcs); ptr++) - s3c_set_clksrc(&clksrcs[ptr], true); -} - -static struct clk *clks[] __initdata = { - &clk_ext, - &clk_iis_cd_v40, - &clk_pcm_cd, -}; - -void __init s5p6440_register_clocks(void) -{ - int ptr; - unsigned int cnt; - - s3c24xx_register_clocks(clks, ARRAY_SIZE(clks)); - - for (ptr = 0; ptr < ARRAY_SIZE(sysclks); ptr++) - s3c_register_clksrc(sysclks[ptr], 1); - - s3c24xx_register_clocks(clk_cdev, ARRAY_SIZE(clk_cdev)); - for (cnt = 0; cnt < ARRAY_SIZE(clk_cdev); cnt++) - s3c_disable_clocks(clk_cdev[cnt], 1); - - s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs)); - s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks)); - for (ptr = 0; ptr < ARRAY_SIZE(clksrc_cdev); ptr++) - s3c_register_clksrc(clksrc_cdev[ptr], 1); - - s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); - s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); - clkdev_add_table(s5p6440_clk_lookup, ARRAY_SIZE(s5p6440_clk_lookup)); - - s3c24xx_register_clock(&dummy_apb_pclk); -} diff --git a/arch/arm/mach-s5p64x0/clock-s5p6450.c b/arch/arm/mach-s5p64x0/clock-s5p6450.c deleted file mode 100644 index 0b3ca2ed53e9..000000000000 --- a/arch/arm/mach-s5p64x0/clock-s5p6450.c +++ /dev/null @@ -1,701 +0,0 @@ -/* linux/arch/arm/mach-s5p64x0/clock-s5p6450.c - * - * Copyright (c) 2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * S5P6450 - Clock support - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#include <linux/init.h> -#include <linux/module.h> -#include <linux/kernel.h> -#include <linux/list.h> -#include <linux/errno.h> -#include <linux/err.h> -#include <linux/clk.h> -#include <linux/device.h> -#include <linux/io.h> - -#include <mach/hardware.h> -#include <mach/map.h> -#include <mach/regs-clock.h> - -#include <plat/cpu-freq.h> -#include <plat/clock.h> -#include <plat/cpu.h> -#include <plat/pll.h> -#include <plat/s5p-clock.h> -#include <plat/clock-clksrc.h> - -#include "clock.h" -#include "common.h" - -static struct clksrc_clk clk_mout_dpll = { - .clk = { - .name = "mout_dpll", - }, - .sources = &clk_src_dpll, - .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 5, .size = 1 }, -}; - -static u32 epll_div[][5] = { - { 133000000, 27307, 55, 2, 2 }, - { 100000000, 43691, 41, 2, 2 }, - { 480000000, 0, 80, 2, 0 }, -}; - -static int s5p6450_epll_set_rate(struct clk *clk, unsigned long rate) -{ - unsigned int epll_con, epll_con_k; - unsigned int i; - - if (clk->rate == rate) /* Return if nothing changed */ - return 0; - - epll_con = __raw_readl(S5P64X0_EPLL_CON); - epll_con_k = __raw_readl(S5P64X0_EPLL_CON_K); - - epll_con_k &= ~(PLL90XX_KDIV_MASK); - epll_con &= ~(PLL90XX_MDIV_MASK | PLL90XX_PDIV_MASK | PLL90XX_SDIV_MASK); - - for (i = 0; i < ARRAY_SIZE(epll_div); i++) { - if (epll_div[i][0] == rate) { - epll_con_k |= (epll_div[i][1] << PLL90XX_KDIV_SHIFT); - epll_con |= (epll_div[i][2] << PLL90XX_MDIV_SHIFT) | - (epll_div[i][3] << PLL90XX_PDIV_SHIFT) | - (epll_div[i][4] << PLL90XX_SDIV_SHIFT); - break; - } - } - - if (i == ARRAY_SIZE(epll_div)) { - printk(KERN_ERR "%s: Invalid Clock EPLL Frequency\n", __func__); - return -EINVAL; - } - - __raw_writel(epll_con, S5P64X0_EPLL_CON); - __raw_writel(epll_con_k, S5P64X0_EPLL_CON_K); - - printk(KERN_WARNING "EPLL Rate changes from %lu to %lu\n", - clk->rate, rate); - - clk->rate = rate; - - return 0; -} - -static struct clk_ops s5p6450_epll_ops = { - .get_rate = s5p_epll_get_rate, - .set_rate = s5p6450_epll_set_rate, -}; - -static struct clksrc_clk clk_dout_epll = { - .clk = { - .name = "dout_epll", - .parent = &clk_mout_epll.clk, - }, - .reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 24, .size = 4 }, -}; - -static struct clksrc_clk clk_mout_hclk_sel = { - .clk = { - .name = "mout_hclk_sel", - }, - .sources = &clkset_hclk_low, - .reg_src = { .reg = S5P64X0_OTHERS, .shift = 15, .size = 1 }, -}; - -static struct clk *clkset_hclk_list[] = { - &clk_mout_hclk_sel.clk, - &clk_armclk.clk, -}; - -static struct clksrc_sources clkset_hclk = { - .sources = clkset_hclk_list, - .nr_sources = ARRAY_SIZE(clkset_hclk_list), -}; - -static struct clksrc_clk clk_hclk = { - .clk = { - .name = "clk_hclk", - }, - .sources = &clkset_hclk, - .reg_src = { .reg = S5P64X0_OTHERS, .shift = 14, .size = 1 }, - .reg_div = { .reg = S5P64X0_CLK_DIV0, .shift = 8, .size = 4 }, -}; - -static struct clksrc_clk clk_pclk = { - .clk = { - .name = "clk_pclk", - .parent = &clk_hclk.clk, - }, - .reg_div = { .reg = S5P64X0_CLK_DIV0, .shift = 12, .size = 4 }, -}; -static struct clksrc_clk clk_dout_pwm_ratio0 = { - .clk = { - .name = "clk_dout_pwm_ratio0", - .parent = &clk_mout_hclk_sel.clk, - }, - .reg_div = { .reg = S5P64X0_CLK_DIV3, .shift = 16, .size = 4 }, -}; - -static struct clksrc_clk clk_pclk_to_wdt_pwm = { - .clk = { - .name = "clk_pclk_to_wdt_pwm", - .parent = &clk_dout_pwm_ratio0.clk, - }, - .reg_div = { .reg = S5P64X0_CLK_DIV3, .shift = 20, .size = 4 }, -}; - -static struct clksrc_clk clk_hclk_low = { - .clk = { - .name = "clk_hclk_low", - }, - .sources = &clkset_hclk_low, - .reg_src = { .reg = S5P64X0_OTHERS, .shift = 6, .size = 1 }, - .reg_div = { .reg = S5P64X0_CLK_DIV3, .shift = 8, .size = 4 }, -}; - -static struct clksrc_clk clk_pclk_low = { - .clk = { - .name = "clk_pclk_low", - .parent = &clk_hclk_low.clk, - }, - .reg_div = { .reg = S5P64X0_CLK_DIV3, .shift = 12, .size = 4 }, -}; - -/* - * The following clocks will be disabled during clock initialization. It is - * recommended to keep the following clocks disabled until the driver requests - * for enabling the clock. - */ -static struct clk init_clocks_off[] = { - { - .name = "usbhost", - .parent = &clk_hclk_low.clk, - .enable = s5p64x0_hclk0_ctrl, - .ctrlbit = (1 << 3), - }, { - .name = "dma", - .devname = "dma-pl330", - .parent = &clk_hclk_low.clk, - .enable = s5p64x0_hclk0_ctrl, - .ctrlbit = (1 << 12), - }, { - .name = "hsmmc", - .devname = "s3c-sdhci.0", - .parent = &clk_hclk_low.clk, - .enable = s5p64x0_hclk0_ctrl, - .ctrlbit = (1 << 17), - }, { - .name = "hsmmc", - .devname = "s3c-sdhci.1", - .parent = &clk_hclk_low.clk, - .enable = s5p64x0_hclk0_ctrl, - .ctrlbit = (1 << 18), - }, { - .name = "hsmmc", - .devname = "s3c-sdhci.2", - .parent = &clk_hclk_low.clk, - .enable = s5p64x0_hclk0_ctrl, - .ctrlbit = (1 << 19), - }, { - .name = "usbotg", - .parent = &clk_hclk_low.clk, - .enable = s5p64x0_hclk0_ctrl, - .ctrlbit = (1 << 20), - }, { - .name = "lcd", - .parent = &clk_h, - .enable = s5p64x0_hclk1_ctrl, - .ctrlbit = (1 << 1), - }, { - .name = "watchdog", - .parent = &clk_pclk_low.clk, - .enable = s5p64x0_pclk_ctrl, - .ctrlbit = (1 << 5), - }, { - .name = "rtc", - .parent = &clk_pclk_low.clk, - .enable = s5p64x0_pclk_ctrl, - .ctrlbit = (1 << 6), - }, { - .name = "adc", - .parent = &clk_pclk_low.clk, - .enable = s5p64x0_pclk_ctrl, - .ctrlbit = (1 << 12), - }, { - .name = "i2c", - .devname = "s3c2440-i2c.0", - .parent = &clk_pclk_low.clk, - .enable = s5p64x0_pclk_ctrl, - .ctrlbit = (1 << 17), - }, { - .name = "spi", - .devname = "s5p64x0-spi.0", - .parent = &clk_pclk_low.clk, - .enable = s5p64x0_pclk_ctrl, - .ctrlbit = (1 << 21), - }, { - .name = "spi", - .devname = "s5p64x0-spi.1", - .parent = &clk_pclk_low.clk, - .enable = s5p64x0_pclk_ctrl, - .ctrlbit = (1 << 22), - }, { - .name = "i2c", - .devname = "s3c2440-i2c.1", - .parent = &clk_pclk_low.clk, - .enable = s5p64x0_pclk_ctrl, - .ctrlbit = (1 << 27), - }, { - .name = "dmc0", - .parent = &clk_pclk.clk, - .enable = s5p64x0_pclk_ctrl, - .ctrlbit = (1 << 30), - } -}; - -/* - * The following clocks will be enabled during clock initialization. - */ -static struct clk init_clocks[] = { - { - .name = "intc", - .parent = &clk_hclk.clk, - .enable = s5p64x0_hclk0_ctrl, - .ctrlbit = (1 << 1), - }, { - .name = "mem", - .parent = &clk_hclk.clk, - .enable = s5p64x0_hclk0_ctrl, - .ctrlbit = (1 << 21), - }, { - .name = "uart", - .devname = "s3c6400-uart.0", - .parent = &clk_pclk_low.clk, - .enable = s5p64x0_pclk_ctrl, - .ctrlbit = (1 << 1), - }, { - .name = "uart", - .devname = "s3c6400-uart.1", - .parent = &clk_pclk_low.clk, - .enable = s5p64x0_pclk_ctrl, - .ctrlbit = (1 << 2), - }, { - .name = "uart", - .devname = "s3c6400-uart.2", - .parent = &clk_pclk_low.clk, - .enable = s5p64x0_pclk_ctrl, - .ctrlbit = (1 << 3), - }, { - .name = "uart", - .devname = "s3c6400-uart.3", - .parent = &clk_pclk_low.clk, - .enable = s5p64x0_pclk_ctrl, - .ctrlbit = (1 << 4), - }, { - .name = "timers", - .parent = &clk_pclk_to_wdt_pwm.clk, - .enable = s5p64x0_pclk_ctrl, - .ctrlbit = (1 << 7), - }, { - .name = "gpio", - .parent = &clk_pclk_low.clk, - .enable = s5p64x0_pclk_ctrl, - .ctrlbit = (1 << 18), - }, -}; - -static struct clk *clkset_uart_list[] = { - &clk_dout_epll.clk, - &clk_dout_mpll.clk, -}; - -static struct clksrc_sources clkset_uart = { - .sources = clkset_uart_list, - .nr_sources = ARRAY_SIZE(clkset_uart_list), -}; - -static struct clk *clkset_mali_list[] = { - &clk_mout_epll.clk, - &clk_mout_apll.clk, - &clk_mout_mpll.clk, -}; - -static struct clksrc_sources clkset_mali = { - .sources = clkset_mali_list, - .nr_sources = ARRAY_SIZE(clkset_mali_list), -}; - -static struct clk *clkset_group2_list[] = { - &clk_dout_epll.clk, - &clk_dout_mpll.clk, - &clk_ext_xtal_mux, -}; - -static struct clksrc_sources clkset_group2 = { - .sources = clkset_group2_list, - .nr_sources = ARRAY_SIZE(clkset_group2_list), -}; - -static struct clk *clkset_dispcon_list[] = { - &clk_dout_epll.clk, - &clk_dout_mpll.clk, - &clk_ext_xtal_mux, - &clk_mout_dpll.clk, -}; - -static struct clksrc_sources clkset_dispcon = { - .sources = clkset_dispcon_list, - .nr_sources = ARRAY_SIZE(clkset_dispcon_list), -}; - -static struct clk *clkset_hsmmc44_list[] = { - &clk_dout_epll.clk, - &clk_dout_mpll.clk, - &clk_ext_xtal_mux, - &s5p_clk_27m, - &clk_48m, -}; - -static struct clksrc_sources clkset_hsmmc44 = { - .sources = clkset_hsmmc44_list, - .nr_sources = ARRAY_SIZE(clkset_hsmmc44_list), -}; - -static struct clk *clkset_sclk_audio0_list[] = { - [0] = &clk_dout_epll.clk, - [1] = &clk_dout_mpll.clk, - [2] = &clk_ext_xtal_mux, - [3] = NULL, - [4] = NULL, -}; - -static struct clksrc_sources clkset_sclk_audio0 = { - .sources = clkset_sclk_audio0_list, - .nr_sources = ARRAY_SIZE(clkset_sclk_audio0_list), -}; - -static struct clksrc_clk clk_sclk_audio0 = { - .clk = { - .name = "audio-bus", - .devname = "samsung-i2s.0", - .enable = s5p64x0_sclk_ctrl, - .ctrlbit = (1 << 8), - .parent = &clk_dout_epll.clk, - }, - .sources = &clkset_sclk_audio0, - .reg_src = { .reg = S5P64X0_CLK_SRC1, .shift = 10, .size = 3 }, - .reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 8, .size = 4 }, -}; - -static struct clksrc_clk clksrcs[] = { - { - .clk = { - .name = "sclk_fimc", - .ctrlbit = (1 << 10), - .enable = s5p64x0_sclk_ctrl, - }, - .sources = &clkset_group2, - .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 26, .size = 2 }, - .reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 12, .size = 4 }, - }, { - .clk = { - .name = "aclk_mali", - .ctrlbit = (1 << 2), - .enable = s5p64x0_sclk1_ctrl, - }, - .sources = &clkset_mali, - .reg_src = { .reg = S5P64X0_CLK_SRC1, .shift = 8, .size = 2 }, - .reg_div = { .reg = S5P64X0_CLK_DIV3, .shift = 4, .size = 4 }, - }, { - .clk = { - .name = "sclk_2d", - .ctrlbit = (1 << 12), - .enable = s5p64x0_sclk_ctrl, - }, - .sources = &clkset_mali, - .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 30, .size = 2 }, - .reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 20, .size = 4 }, - }, { - .clk = { - .name = "sclk_usi", - .ctrlbit = (1 << 7), - .enable = s5p64x0_sclk_ctrl, - }, - .sources = &clkset_group2, - .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 10, .size = 2 }, - .reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 16, .size = 4 }, - }, { - .clk = { - .name = "sclk_camif", - .ctrlbit = (1 << 6), - .enable = s5p64x0_sclk_ctrl, - }, - .sources = &clkset_group2, - .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 28, .size = 2 }, - .reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 20, .size = 4 }, - }, { - .clk = { - .name = "sclk_dispcon", - .ctrlbit = (1 << 1), - .enable = s5p64x0_sclk1_ctrl, - }, - .sources = &clkset_dispcon, - .reg_src = { .reg = S5P64X0_CLK_SRC1, .shift = 4, .size = 2 }, - .reg_div = { .reg = S5P64X0_CLK_DIV3, .shift = 0, .size = 4 }, - }, { - .clk = { - .name = "sclk_hsmmc44", - .ctrlbit = (1 << 30), - .enable = s5p64x0_sclk_ctrl, - }, - .sources = &clkset_hsmmc44, - .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 6, .size = 3 }, - .reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 28, .size = 4 }, - }, -}; - -static struct clksrc_clk clk_sclk_mmc0 = { - .clk = { - .name = "sclk_mmc", - .devname = "s3c-sdhci.0", - .ctrlbit = (1 << 24), - .enable = s5p64x0_sclk_ctrl, - }, - .sources = &clkset_group2, - .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 18, .size = 2 }, - .reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 0, .size = 4 }, -}; - -static struct clksrc_clk clk_sclk_mmc1 = { - .clk = { - .name = "sclk_mmc", - .devname = "s3c-sdhci.1", - .ctrlbit = (1 << 25), - .enable = s5p64x0_sclk_ctrl, - }, - .sources = &clkset_group2, - .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 20, .size = 2 }, - .reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 4, .size = 4 }, -}; - -static struct clksrc_clk clk_sclk_mmc2 = { - .clk = { - .name = "sclk_mmc", - .devname = "s3c-sdhci.2", - .ctrlbit = (1 << 26), - .enable = s5p64x0_sclk_ctrl, - }, - .sources = &clkset_group2, - .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 22, .size = 2 }, - .reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 8, .size = 4 }, -}; - -static struct clksrc_clk clk_sclk_uclk = { - .clk = { - .name = "uclk1", - .ctrlbit = (1 << 5), - .enable = s5p64x0_sclk_ctrl, - }, - .sources = &clkset_uart, - .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 13, .size = 1 }, - .reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 16, .size = 4 }, -}; - -static struct clksrc_clk clk_sclk_spi0 = { - .clk = { - .name = "sclk_spi", - .devname = "s5p64x0-spi.0", - .ctrlbit = (1 << 20), - .enable = s5p64x0_sclk_ctrl, - }, - .sources = &clkset_group2, - .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 14, .size = 2 }, - .reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 0, .size = 4 }, -}; - -static struct clksrc_clk clk_sclk_spi1 = { - .clk = { - .name = "sclk_spi", - .devname = "s5p64x0-spi.1", - .ctrlbit = (1 << 21), - .enable = s5p64x0_sclk_ctrl, - }, - .sources = &clkset_group2, - .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 16, .size = 2 }, - .reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 4, .size = 4 }, -}; - -static struct clk clk_i2s0 = { - .name = "iis", - .devname = "samsung-i2s.0", - .parent = &clk_pclk_low.clk, - .enable = s5p64x0_pclk_ctrl, - .ctrlbit = (1 << 26), -}; - -static struct clk clk_i2s1 = { - .name = "iis", - .devname = "samsung-i2s.1", - .parent = &clk_pclk_low.clk, - .enable = s5p64x0_pclk_ctrl, - .ctrlbit = (1 << 15), -}; - -static struct clk clk_i2s2 = { - .name = "iis", - .devname = "samsung-i2s.2", - .parent = &clk_pclk_low.clk, - .enable = s5p64x0_pclk_ctrl, - .ctrlbit = (1 << 16), -}; - -static struct clk *clk_cdev[] = { - &clk_i2s0, - &clk_i2s1, - &clk_i2s2, -}; - -static struct clksrc_clk *clksrc_cdev[] = { - &clk_sclk_uclk, - &clk_sclk_spi0, - &clk_sclk_spi1, - &clk_sclk_mmc0, - &clk_sclk_mmc1, - &clk_sclk_mmc2, - &clk_sclk_audio0, -}; - -static struct clk_lookup s5p6450_clk_lookup[] = { - CLKDEV_INIT(NULL, "clk_uart_baud2", &clk_pclk_low.clk), - CLKDEV_INIT(NULL, "clk_uart_baud3", &clk_sclk_uclk.clk), - CLKDEV_INIT(NULL, "spi_busclk0", &clk_p), - CLKDEV_INIT("s5p64x0-spi.0", "spi_busclk1", &clk_sclk_spi0.clk), - CLKDEV_INIT("s5p64x0-spi.1", "spi_busclk1", &clk_sclk_spi1.clk), - CLKDEV_INIT("s3c-sdhci.0", "mmc_busclk.2", &clk_sclk_mmc0.clk), - CLKDEV_INIT("s3c-sdhci.1", "mmc_busclk.2", &clk_sclk_mmc1.clk), - CLKDEV_INIT("s3c-sdhci.2", "mmc_busclk.2", &clk_sclk_mmc2.clk), - CLKDEV_INIT("samsung-i2s.0", "i2s_opclk0", &clk_i2s0), - CLKDEV_INIT("samsung-i2s.0", "i2s_opclk1", &clk_sclk_audio0.clk), - CLKDEV_INIT("samsung-i2s.1", "i2s_opclk0", &clk_i2s1), - CLKDEV_INIT("samsung-i2s.2", "i2s_opclk0", &clk_i2s2), -}; - -/* Clock initialization code */ -static struct clksrc_clk *sysclks[] = { - &clk_mout_apll, - &clk_mout_epll, - &clk_dout_epll, - &clk_mout_mpll, - &clk_dout_mpll, - &clk_armclk, - &clk_mout_hclk_sel, - &clk_dout_pwm_ratio0, - &clk_pclk_to_wdt_pwm, - &clk_hclk, - &clk_pclk, - &clk_hclk_low, - &clk_pclk_low, -}; - -static struct clk dummy_apb_pclk = { - .name = "apb_pclk", - .id = -1, -}; - -void __init_or_cpufreq s5p6450_setup_clocks(void) -{ - struct clk *xtal_clk; - - unsigned long xtal; - unsigned long fclk; - unsigned long hclk; - unsigned long hclk_low; - unsigned long pclk; - unsigned long pclk_low; - - unsigned long apll; - unsigned long mpll; - unsigned long epll; - unsigned long dpll; - unsigned int ptr; - - /* Set S5P6450 functions for clk_fout_epll */ - - clk_fout_epll.enable = s5p_epll_enable; - clk_fout_epll.ops = &s5p6450_epll_ops; - - clk_48m.enable = s5p64x0_clk48m_ctrl; - - xtal_clk = clk_get(NULL, "ext_xtal"); - BUG_ON(IS_ERR(xtal_clk)); - - xtal = clk_get_rate(xtal_clk); - clk_put(xtal_clk); - - apll = s5p_get_pll45xx(xtal, __raw_readl(S5P64X0_APLL_CON), pll_4502); - mpll = s5p_get_pll45xx(xtal, __raw_readl(S5P64X0_MPLL_CON), pll_4502); - epll = s5p_get_pll90xx(xtal, __raw_readl(S5P64X0_EPLL_CON), - __raw_readl(S5P64X0_EPLL_CON_K)); - dpll = s5p_get_pll46xx(xtal, __raw_readl(S5P6450_DPLL_CON), - __raw_readl(S5P6450_DPLL_CON_K), pll_4650c); - - clk_fout_apll.rate = apll; - clk_fout_mpll.rate = mpll; - clk_fout_epll.rate = epll; - clk_fout_dpll.rate = dpll; - - printk(KERN_INFO "S5P6450: PLL settings, A=%ld.%ldMHz, M=%ld.%ldMHz," \ - " E=%ld.%ldMHz, D=%ld.%ldMHz\n", - print_mhz(apll), print_mhz(mpll), print_mhz(epll), - print_mhz(dpll)); - - fclk = clk_get_rate(&clk_armclk.clk); - hclk = clk_get_rate(&clk_hclk.clk); - pclk = clk_get_rate(&clk_pclk.clk); - hclk_low = clk_get_rate(&clk_hclk_low.clk); - pclk_low = clk_get_rate(&clk_pclk_low.clk); - - printk(KERN_INFO "S5P6450: HCLK=%ld.%ldMHz, HCLK_LOW=%ld.%ldMHz," \ - " PCLK=%ld.%ldMHz, PCLK_LOW=%ld.%ldMHz\n", - print_mhz(hclk), print_mhz(hclk_low), - print_mhz(pclk), print_mhz(pclk_low)); - - clk_f.rate = fclk; - clk_h.rate = hclk; - clk_p.rate = pclk; - - for (ptr = 0; ptr < ARRAY_SIZE(clksrcs); ptr++) - s3c_set_clksrc(&clksrcs[ptr], true); -} - -void __init s5p6450_register_clocks(void) -{ - int ptr; - unsigned int cnt; - - for (ptr = 0; ptr < ARRAY_SIZE(sysclks); ptr++) - s3c_register_clksrc(sysclks[ptr], 1); - - - s3c24xx_register_clocks(clk_cdev, ARRAY_SIZE(clk_cdev)); - for (cnt = 0; cnt < ARRAY_SIZE(clk_cdev); cnt++) - s3c_disable_clocks(clk_cdev[cnt], 1); - - s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs)); - s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks)); - for (ptr = 0; ptr < ARRAY_SIZE(clksrc_cdev); ptr++) - s3c_register_clksrc(clksrc_cdev[ptr], 1); - - s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); - s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); - clkdev_add_table(s5p6450_clk_lookup, ARRAY_SIZE(s5p6450_clk_lookup)); - - s3c24xx_register_clock(&dummy_apb_pclk); -} diff --git a/arch/arm/mach-s5p64x0/clock.c b/arch/arm/mach-s5p64x0/clock.c deleted file mode 100644 index 57e718957ef3..000000000000 --- a/arch/arm/mach-s5p64x0/clock.c +++ /dev/null @@ -1,236 +0,0 @@ -/* linux/arch/arm/mach-s5p64x0/clock.c - * - * Copyright (c) 2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * S5P64X0 - Clock support - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#include <linux/init.h> -#include <linux/module.h> -#include <linux/kernel.h> -#include <linux/list.h> -#include <linux/errno.h> -#include <linux/err.h> -#include <linux/clk.h> -#include <linux/device.h> -#include <linux/io.h> - -#include <mach/hardware.h> -#include <mach/map.h> -#include <mach/regs-clock.h> - -#include <plat/cpu-freq.h> -#include <plat/clock.h> -#include <plat/cpu.h> -#include <plat/pll.h> -#include <plat/s5p-clock.h> -#include <plat/clock-clksrc.h> - -#include "common.h" - -struct clksrc_clk clk_mout_apll = { - .clk = { - .name = "mout_apll", - .id = -1, - }, - .sources = &clk_src_apll, - .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 0, .size = 1 }, -}; - -struct clksrc_clk clk_mout_mpll = { - .clk = { - .name = "mout_mpll", - .id = -1, - }, - .sources = &clk_src_mpll, - .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 1, .size = 1 }, -}; - -struct clksrc_clk clk_mout_epll = { - .clk = { - .name = "mout_epll", - .id = -1, - }, - .sources = &clk_src_epll, - .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 2, .size = 1 }, -}; - -enum perf_level { - L0 = 532*1000, - L1 = 266*1000, - L2 = 133*1000, -}; - -static const u32 clock_table[][3] = { - /*{ARM_CLK, DIVarm, DIVhclk}*/ - {L0 * 1000, (0 << ARM_DIV_RATIO_SHIFT), (3 << S5P64X0_CLKDIV0_HCLK_SHIFT)}, - {L1 * 1000, (1 << ARM_DIV_RATIO_SHIFT), (1 << S5P64X0_CLKDIV0_HCLK_SHIFT)}, - {L2 * 1000, (3 << ARM_DIV_RATIO_SHIFT), (0 << S5P64X0_CLKDIV0_HCLK_SHIFT)}, -}; - -static unsigned long s5p64x0_armclk_get_rate(struct clk *clk) -{ - unsigned long rate = clk_get_rate(clk->parent); - u32 clkdiv; - - /* divisor mask starts at bit0, so no need to shift */ - clkdiv = __raw_readl(ARM_CLK_DIV) & ARM_DIV_MASK; - - return rate / (clkdiv + 1); -} - -static unsigned long s5p64x0_armclk_round_rate(struct clk *clk, - unsigned long rate) -{ - u32 iter; - - for (iter = 1 ; iter < ARRAY_SIZE(clock_table) ; iter++) { - if (rate > clock_table[iter][0]) - return clock_table[iter-1][0]; - } - - return clock_table[ARRAY_SIZE(clock_table) - 1][0]; -} - -static int s5p64x0_armclk_set_rate(struct clk *clk, unsigned long rate) -{ - u32 round_tmp; - u32 iter; - u32 clk_div0_tmp; - u32 cur_rate = clk->ops->get_rate(clk); - unsigned long flags; - - round_tmp = clk->ops->round_rate(clk, rate); - if (round_tmp == cur_rate) - return 0; - - - for (iter = 0 ; iter < ARRAY_SIZE(clock_table) ; iter++) { - if (round_tmp == clock_table[iter][0]) - break; - } - - if (iter >= ARRAY_SIZE(clock_table)) - iter = ARRAY_SIZE(clock_table) - 1; - - local_irq_save(flags); - if (cur_rate > round_tmp) { - /* Frequency Down */ - clk_div0_tmp = __raw_readl(ARM_CLK_DIV) & ~(ARM_DIV_MASK); - clk_div0_tmp |= clock_table[iter][1]; - __raw_writel(clk_div0_tmp, ARM_CLK_DIV); - - clk_div0_tmp = __raw_readl(ARM_CLK_DIV) & - ~(S5P64X0_CLKDIV0_HCLK_MASK); - clk_div0_tmp |= clock_table[iter][2]; - __raw_writel(clk_div0_tmp, ARM_CLK_DIV); - - - } else { - /* Frequency Up */ - clk_div0_tmp = __raw_readl(ARM_CLK_DIV) & - ~(S5P64X0_CLKDIV0_HCLK_MASK); - clk_div0_tmp |= clock_table[iter][2]; - __raw_writel(clk_div0_tmp, ARM_CLK_DIV); - - clk_div0_tmp = __raw_readl(ARM_CLK_DIV) & ~(ARM_DIV_MASK); - clk_div0_tmp |= clock_table[iter][1]; - __raw_writel(clk_div0_tmp, ARM_CLK_DIV); - } - local_irq_restore(flags); - - clk->rate = clock_table[iter][0]; - - return 0; -} - -static struct clk_ops s5p64x0_clkarm_ops = { - .get_rate = s5p64x0_armclk_get_rate, - .set_rate = s5p64x0_armclk_set_rate, - .round_rate = s5p64x0_armclk_round_rate, -}; - -struct clksrc_clk clk_armclk = { - .clk = { - .name = "armclk", - .id = 1, - .parent = &clk_mout_apll.clk, - .ops = &s5p64x0_clkarm_ops, - }, - .reg_div = { .reg = S5P64X0_CLK_DIV0, .shift = 0, .size = 4 }, -}; - -struct clksrc_clk clk_dout_mpll = { - .clk = { - .name = "dout_mpll", - .id = -1, - .parent = &clk_mout_mpll.clk, - }, - .reg_div = { .reg = S5P64X0_CLK_DIV0, .shift = 4, .size = 1 }, -}; - -static struct clk *clkset_hclk_low_list[] = { - &clk_mout_apll.clk, - &clk_mout_mpll.clk, -}; - -struct clksrc_sources clkset_hclk_low = { - .sources = clkset_hclk_low_list, - .nr_sources = ARRAY_SIZE(clkset_hclk_low_list), -}; - -int s5p64x0_pclk_ctrl(struct clk *clk, int enable) -{ - return s5p_gatectrl(S5P64X0_CLK_GATE_PCLK, clk, enable); -} - -int s5p64x0_hclk0_ctrl(struct clk *clk, int enable) -{ - return s5p_gatectrl(S5P64X0_CLK_GATE_HCLK0, clk, enable); -} - -int s5p64x0_hclk1_ctrl(struct clk *clk, int enable) -{ - return s5p_gatectrl(S5P64X0_CLK_GATE_HCLK1, clk, enable); -} - -int s5p64x0_sclk_ctrl(struct clk *clk, int enable) -{ - return s5p_gatectrl(S5P64X0_CLK_GATE_SCLK0, clk, enable); -} - -int s5p64x0_sclk1_ctrl(struct clk *clk, int enable) -{ - return s5p_gatectrl(S5P64X0_CLK_GATE_SCLK1, clk, enable); -} - -int s5p64x0_mem_ctrl(struct clk *clk, int enable) -{ - return s5p_gatectrl(S5P64X0_CLK_GATE_MEM0, clk, enable); -} - -int s5p64x0_clk48m_ctrl(struct clk *clk, int enable) -{ - unsigned long flags; - u32 val; - - /* can't rely on clock lock, this register has other usages */ - local_irq_save(flags); - - val = __raw_readl(S5P64X0_OTHERS); - if (enable) - val |= S5P64X0_OTHERS_USB_SIG_MASK; - else - val &= ~S5P64X0_OTHERS_USB_SIG_MASK; - - __raw_writel(val, S5P64X0_OTHERS); - - local_irq_restore(flags); - - return 0; -} diff --git a/arch/arm/mach-s5p64x0/clock.h b/arch/arm/mach-s5p64x0/clock.h deleted file mode 100644 index 28b8e3c6bd24..000000000000 --- a/arch/arm/mach-s5p64x0/clock.h +++ /dev/null @@ -1,38 +0,0 @@ -/* - * Copyright (c) 2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * Header file for s5p64x0 clock support - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __MACH_S5P64X0_CLOCK_H -#define __MACH_S5P64X0_CLOCK_H __FILE__ - -#include <linux/clk.h> - -extern struct clksrc_clk clk_mout_apll; -extern struct clksrc_clk clk_mout_mpll; -extern struct clksrc_clk clk_mout_epll; - -extern int s5p64x0_epll_enable(struct clk *clk, int enable); -extern unsigned long s5p64x0_epll_get_rate(struct clk *clk); - -extern struct clksrc_clk clk_armclk; -extern struct clksrc_clk clk_dout_mpll; - -extern struct clksrc_sources clkset_hclk_low; - -extern int s5p64x0_pclk_ctrl(struct clk *clk, int enable); -extern int s5p64x0_hclk0_ctrl(struct clk *clk, int enable); -extern int s5p64x0_hclk1_ctrl(struct clk *clk, int enable); -extern int s5p64x0_sclk_ctrl(struct clk *clk, int enable); -extern int s5p64x0_sclk1_ctrl(struct clk *clk, int enable); -extern int s5p64x0_mem_ctrl(struct clk *clk, int enable); - -extern int s5p64x0_clk48m_ctrl(struct clk *clk, int enable); - -#endif /* __MACH_S5P64X0_CLOCK_H */ diff --git a/arch/arm/mach-s5p64x0/common.c b/arch/arm/mach-s5p64x0/common.c deleted file mode 100644 index 9a43be002d78..000000000000 --- a/arch/arm/mach-s5p64x0/common.c +++ /dev/null @@ -1,490 +0,0 @@ -/* - * Copyright (c) 2009-2011 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * Common Codes for S5P64X0 machines - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include <linux/kernel.h> -#include <linux/types.h> -#include <linux/interrupt.h> -#include <linux/list.h> -#include <linux/timer.h> -#include <linux/init.h> -#include <linux/clk.h> -#include <linux/io.h> -#include <linux/device.h> -#include <linux/serial_core.h> -#include <linux/serial_s3c.h> -#include <clocksource/samsung_pwm.h> -#include <linux/platform_device.h> -#include <linux/sched.h> -#include <linux/dma-mapping.h> -#include <linux/gpio.h> -#include <linux/irq.h> -#include <linux/reboot.h> - -#include <asm/irq.h> -#include <asm/proc-fns.h> -#include <asm/system_misc.h> -#include <asm/mach/arch.h> -#include <asm/mach/map.h> -#include <asm/mach/irq.h> - -#include <mach/map.h> -#include <mach/hardware.h> -#include <mach/regs-clock.h> -#include <mach/regs-gpio.h> - -#include <plat/cpu.h> -#include <plat/clock.h> -#include <plat/devs.h> -#include <plat/pm.h> -#include <plat/sdhci.h> -#include <plat/adc-core.h> -#include <plat/fb-core.h> -#include <plat/spi-core.h> -#include <plat/gpio-cfg.h> -#include <plat/pwm-core.h> -#include <plat/regs-irqtype.h> -#include <plat/watchdog-reset.h> - -#include "common.h" - -static const char name_s5p6440[] = "S5P6440"; -static const char name_s5p6450[] = "S5P6450"; - -static struct cpu_table cpu_ids[] __initdata = { - { - .idcode = S5P6440_CPU_ID, - .idmask = S5P64XX_CPU_MASK, - .map_io = s5p6440_map_io, - .init_clocks = s5p6440_init_clocks, - .init_uarts = s5p6440_init_uarts, - .init = s5p64x0_init, - .name = name_s5p6440, - }, { - .idcode = S5P6450_CPU_ID, - .idmask = S5P64XX_CPU_MASK, - .map_io = s5p6450_map_io, - .init_clocks = s5p6450_init_clocks, - .init_uarts = s5p6450_init_uarts, - .init = s5p64x0_init, - .name = name_s5p6450, - }, -}; - -/* Initial IO mappings */ - -static struct map_desc s5p64x0_iodesc[] __initdata = { - { - .virtual = (unsigned long)S5P_VA_CHIPID, - .pfn = __phys_to_pfn(S5P64X0_PA_CHIPID), - .length = SZ_4K, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)S3C_VA_SYS, - .pfn = __phys_to_pfn(S5P64X0_PA_SYSCON), - .length = SZ_64K, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)S3C_VA_TIMER, - .pfn = __phys_to_pfn(S5P64X0_PA_TIMER), - .length = SZ_16K, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)S3C_VA_WATCHDOG, - .pfn = __phys_to_pfn(S5P64X0_PA_WDT), - .length = SZ_4K, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)S5P_VA_SROMC, - .pfn = __phys_to_pfn(S5P64X0_PA_SROMC), - .length = SZ_4K, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)S5P_VA_GPIO, - .pfn = __phys_to_pfn(S5P64X0_PA_GPIO), - .length = SZ_4K, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)VA_VIC0, - .pfn = __phys_to_pfn(S5P64X0_PA_VIC0), - .length = SZ_16K, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)VA_VIC1, - .pfn = __phys_to_pfn(S5P64X0_PA_VIC1), - .length = SZ_16K, - .type = MT_DEVICE, - }, -}; - -static struct map_desc s5p6440_iodesc[] __initdata = { - { - .virtual = (unsigned long)S3C_VA_UART, - .pfn = __phys_to_pfn(S5P6440_PA_UART(0)), - .length = SZ_4K, - .type = MT_DEVICE, - }, -}; - -static struct map_desc s5p6450_iodesc[] __initdata = { - { - .virtual = (unsigned long)S3C_VA_UART, - .pfn = __phys_to_pfn(S5P6450_PA_UART(0)), - .length = SZ_512K, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)S3C_VA_UART + SZ_512K, - .pfn = __phys_to_pfn(S5P6450_PA_UART(5)), - .length = SZ_4K, - .type = MT_DEVICE, - }, -}; - -static void s5p64x0_idle(void) -{ - unsigned long val; - - val = __raw_readl(S5P64X0_PWR_CFG); - val &= ~(0x3 << 5); - val |= (0x1 << 5); - __raw_writel(val, S5P64X0_PWR_CFG); - - cpu_do_idle(); -} - -static struct samsung_pwm_variant s5p64x0_pwm_variant = { - .bits = 32, - .div_base = 0, - .has_tint_cstat = true, - .tclk_mask = 0, -}; - -void __init samsung_set_timer_source(unsigned int event, unsigned int source) -{ - s5p64x0_pwm_variant.output_mask = BIT(SAMSUNG_PWM_NUM) - 1; - s5p64x0_pwm_variant.output_mask &= ~(BIT(event) | BIT(source)); -} - -void __init samsung_timer_init(void) -{ - unsigned int timer_irqs[SAMSUNG_PWM_NUM] = { - IRQ_TIMER0_VIC, IRQ_TIMER1_VIC, IRQ_TIMER2_VIC, - IRQ_TIMER3_VIC, IRQ_TIMER4_VIC, - }; - - samsung_pwm_clocksource_init(S3C_VA_TIMER, - timer_irqs, &s5p64x0_pwm_variant); -} - -/* - * s5p64x0_map_io - * - * register the standard CPU IO areas - */ - -void __init s5p64x0_init_io(struct map_desc *mach_desc, int size) -{ - /* initialize the io descriptors we need for initialization */ - iotable_init(s5p64x0_iodesc, ARRAY_SIZE(s5p64x0_iodesc)); - if (mach_desc) - iotable_init(mach_desc, size); - - /* detect cpu id and rev. */ - s5p_init_cpu(S5P64X0_SYS_ID); - - s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids)); - samsung_wdt_reset_init(S3C_VA_WATCHDOG); - - samsung_pwm_set_platdata(&s5p64x0_pwm_variant); -} - -#ifdef CONFIG_CPU_S5P6440 -void __init s5p6440_map_io(void) -{ - /* initialize any device information early */ - s3c_adc_setname("s3c64xx-adc"); - s3c_fb_setname("s5p64x0-fb"); - s3c64xx_spi_setname("s5p64x0-spi"); - - s5p64x0_default_sdhci0(); - s5p64x0_default_sdhci1(); - s5p6440_default_sdhci2(); - - iotable_init(s5p6440_iodesc, ARRAY_SIZE(s5p6440_iodesc)); -} -#endif - -#ifdef CONFIG_CPU_S5P6450 -void __init s5p6450_map_io(void) -{ - /* initialize any device information early */ - s3c_adc_setname("s3c64xx-adc"); - s3c_fb_setname("s5p64x0-fb"); - s3c64xx_spi_setname("s5p64x0-spi"); - - s5p64x0_default_sdhci0(); - s5p64x0_default_sdhci1(); - s5p6450_default_sdhci2(); - - iotable_init(s5p6450_iodesc, ARRAY_SIZE(s5p6450_iodesc)); -} -#endif - -/* - * s5p64x0_init_clocks - * - * register and setup the CPU clocks - */ -#ifdef CONFIG_CPU_S5P6440 -void __init s5p6440_init_clocks(int xtal) -{ - printk(KERN_DEBUG "%s: initializing clocks\n", __func__); - - s3c24xx_register_baseclocks(xtal); - s5p_register_clocks(xtal); - s5p6440_register_clocks(); - s5p6440_setup_clocks(); -} -#endif - -#ifdef CONFIG_CPU_S5P6450 -void __init s5p6450_init_clocks(int xtal) -{ - printk(KERN_DEBUG "%s: initializing clocks\n", __func__); - - s3c24xx_register_baseclocks(xtal); - s5p_register_clocks(xtal); - s5p6450_register_clocks(); - s5p6450_setup_clocks(); -} -#endif - -/* - * s5p64x0_init_irq - * - * register the CPU interrupts - */ -#ifdef CONFIG_CPU_S5P6440 -void __init s5p6440_init_irq(void) -{ - /* S5P6440 supports 2 VIC */ - u32 vic[2]; - - /* - * VIC0 is missing IRQ_VIC0[3, 4, 8, 10, (12-22)] - * VIC1 is missing IRQ VIC1[1, 3, 4, 10, 11, 12, 14, 15, 22] - */ - vic[0] = 0xff800ae7; - vic[1] = 0xffbf23e5; - - s5p_init_irq(vic, ARRAY_SIZE(vic)); -} -#endif - -#ifdef CONFIG_CPU_S5P6450 -void __init s5p6450_init_irq(void) -{ - /* S5P6450 supports only 2 VIC */ - u32 vic[2]; - - /* - * VIC0 is missing IRQ_VIC0[(13-15), (21-22)] - * VIC1 is missing IRQ VIC1[12, 14, 23] - */ - vic[0] = 0xff9f1fff; - vic[1] = 0xff7fafff; - - s5p_init_irq(vic, ARRAY_SIZE(vic)); -} -#endif - -struct bus_type s5p64x0_subsys = { - .name = "s5p64x0-core", - .dev_name = "s5p64x0-core", -}; - -static struct device s5p64x0_dev = { - .bus = &s5p64x0_subsys, -}; - -static int __init s5p64x0_core_init(void) -{ - return subsys_system_register(&s5p64x0_subsys, NULL); -} -core_initcall(s5p64x0_core_init); - -int __init s5p64x0_init(void) -{ - printk(KERN_INFO "S5P64X0(S5P6440/S5P6450): Initializing architecture\n"); - - /* set idle function */ - arm_pm_idle = s5p64x0_idle; - - return device_register(&s5p64x0_dev); -} - -/* uart registration process */ -#ifdef CONFIG_CPU_S5P6440 -void __init s5p6440_init_uarts(struct s3c2410_uartcfg *cfg, int no) -{ - int uart; - - for (uart = 0; uart < no; uart++) { - s5p_uart_resources[uart].resources->start = S5P6440_PA_UART(uart); - s5p_uart_resources[uart].resources->end = S5P6440_PA_UART(uart) + S5P_SZ_UART; - } - - s3c24xx_init_uartdevs("s3c6400-uart", s5p_uart_resources, cfg, no); -} -#endif - -#ifdef CONFIG_CPU_S5P6450 -void __init s5p6450_init_uarts(struct s3c2410_uartcfg *cfg, int no) -{ - s3c24xx_init_uartdevs("s3c6400-uart", s5p_uart_resources, cfg, no); -} -#endif - -#define eint_offset(irq) ((irq) - IRQ_EINT(0)) - -static int s5p64x0_irq_eint_set_type(struct irq_data *data, unsigned int type) -{ - int offs = eint_offset(data->irq); - int shift; - u32 ctrl, mask; - u32 newvalue = 0; - - if (offs > 15) - return -EINVAL; - - switch (type) { - case IRQ_TYPE_NONE: - printk(KERN_WARNING "No edge setting!\n"); - break; - case IRQ_TYPE_EDGE_RISING: - newvalue = S3C2410_EXTINT_RISEEDGE; - break; - case IRQ_TYPE_EDGE_FALLING: - newvalue = S3C2410_EXTINT_FALLEDGE; - break; - case IRQ_TYPE_EDGE_BOTH: - newvalue = S3C2410_EXTINT_BOTHEDGE; - break; - case IRQ_TYPE_LEVEL_LOW: - newvalue = S3C2410_EXTINT_LOWLEV; - break; - case IRQ_TYPE_LEVEL_HIGH: - newvalue = S3C2410_EXTINT_HILEV; - break; - default: - printk(KERN_ERR "No such irq type %d", type); - return -EINVAL; - } - - shift = (offs / 2) * 4; - mask = 0x7 << shift; - - ctrl = __raw_readl(S5P64X0_EINT0CON0) & ~mask; - ctrl |= newvalue << shift; - __raw_writel(ctrl, S5P64X0_EINT0CON0); - - /* Configure the GPIO pin for 6450 or 6440 based on CPU ID */ - if (soc_is_s5p6450()) - s3c_gpio_cfgpin(S5P6450_GPN(offs), S3C_GPIO_SFN(2)); - else - s3c_gpio_cfgpin(S5P6440_GPN(offs), S3C_GPIO_SFN(2)); - - return 0; -} - -/* - * s5p64x0_irq_demux_eint - * - * This function demuxes the IRQ from the group0 external interrupts, - * from IRQ_EINT(0) to IRQ_EINT(15). It is designed to be inlined into - * the specific handlers s5p64x0_irq_demux_eintX_Y. - */ -static inline void s5p64x0_irq_demux_eint(unsigned int start, unsigned int end) -{ - u32 status = __raw_readl(S5P64X0_EINT0PEND); - u32 mask = __raw_readl(S5P64X0_EINT0MASK); - unsigned int irq; - - status &= ~mask; - status >>= start; - status &= (1 << (end - start + 1)) - 1; - - for (irq = IRQ_EINT(start); irq <= IRQ_EINT(end); irq++) { - if (status & 1) - generic_handle_irq(irq); - status >>= 1; - } -} - -static void s5p64x0_irq_demux_eint0_3(unsigned int irq, struct irq_desc *desc) -{ - s5p64x0_irq_demux_eint(0, 3); -} - -static void s5p64x0_irq_demux_eint4_11(unsigned int irq, struct irq_desc *desc) -{ - s5p64x0_irq_demux_eint(4, 11); -} - -static void s5p64x0_irq_demux_eint12_15(unsigned int irq, - struct irq_desc *desc) -{ - s5p64x0_irq_demux_eint(12, 15); -} - -static int s5p64x0_alloc_gc(void) -{ - struct irq_chip_generic *gc; - struct irq_chip_type *ct; - - gc = irq_alloc_generic_chip("s5p64x0-eint", 1, S5P_IRQ_EINT_BASE, - S5P_VA_GPIO, handle_level_irq); - if (!gc) { - printk(KERN_ERR "%s: irq_alloc_generic_chip for group 0" - "external interrupts failed\n", __func__); - return -EINVAL; - } - - ct = gc->chip_types; - ct->chip.irq_ack = irq_gc_ack_set_bit; - ct->chip.irq_mask = irq_gc_mask_set_bit; - ct->chip.irq_unmask = irq_gc_mask_clr_bit; - ct->chip.irq_set_type = s5p64x0_irq_eint_set_type; - ct->chip.irq_set_wake = s3c_irqext_wake; - ct->regs.ack = EINT0PEND_OFFSET; - ct->regs.mask = EINT0MASK_OFFSET; - irq_setup_generic_chip(gc, IRQ_MSK(16), IRQ_GC_INIT_MASK_CACHE, - IRQ_NOREQUEST | IRQ_NOPROBE, 0); - return 0; -} - -static int __init s5p64x0_init_irq_eint(void) -{ - int ret = s5p64x0_alloc_gc(); - irq_set_chained_handler(IRQ_EINT0_3, s5p64x0_irq_demux_eint0_3); - irq_set_chained_handler(IRQ_EINT4_11, s5p64x0_irq_demux_eint4_11); - irq_set_chained_handler(IRQ_EINT12_15, s5p64x0_irq_demux_eint12_15); - - return ret; -} -arch_initcall(s5p64x0_init_irq_eint); - -void s5p64x0_restart(enum reboot_mode mode, const char *cmd) -{ - if (mode != REBOOT_SOFT) - samsung_wdt_reset(); - - soft_restart(0); -} diff --git a/arch/arm/mach-s5p64x0/common.h b/arch/arm/mach-s5p64x0/common.h deleted file mode 100644 index cbe7f3d731d0..000000000000 --- a/arch/arm/mach-s5p64x0/common.h +++ /dev/null @@ -1,56 +0,0 @@ -/* - * Copyright (c) 2011 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * Common Header for S5P64X0 machines - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __ARCH_ARM_MACH_S5P64X0_COMMON_H -#define __ARCH_ARM_MACH_S5P64X0_COMMON_H - -#include <linux/reboot.h> - -void s5p6440_init_irq(void); -void s5p6450_init_irq(void); -void s5p64x0_init_io(struct map_desc *mach_desc, int size); - -void s5p6440_register_clocks(void); -void s5p6440_setup_clocks(void); - -void s5p6450_register_clocks(void); -void s5p6450_setup_clocks(void); - -void s5p64x0_restart(enum reboot_mode mode, const char *cmd); -extern int s5p64x0_init(void); - -#ifdef CONFIG_CPU_S5P6440 - -extern void s5p6440_map_io(void); -extern void s5p6440_init_clocks(int xtal); - -extern void s5p6440_init_uarts(struct s3c2410_uartcfg *cfg, int no); - -#else -#define s5p6440_init_clocks NULL -#define s5p6440_init_uarts NULL -#define s5p6440_map_io NULL -#endif - -#ifdef CONFIG_CPU_S5P6450 - -extern void s5p6450_map_io(void); -extern void s5p6450_init_clocks(int xtal); - -extern void s5p6450_init_uarts(struct s3c2410_uartcfg *cfg, int no); - -#else -#define s5p6450_init_clocks NULL -#define s5p6450_init_uarts NULL -#define s5p6450_map_io NULL -#endif - -#endif /* __ARCH_ARM_MACH_S5P64X0_COMMON_H */ diff --git a/arch/arm/mach-s5p64x0/dev-audio.c b/arch/arm/mach-s5p64x0/dev-audio.c deleted file mode 100644 index 723d4773c323..000000000000 --- a/arch/arm/mach-s5p64x0/dev-audio.c +++ /dev/null @@ -1,176 +0,0 @@ -/* linux/arch/arm/mach-s5p64x0/dev-audio.c - * - * Copyright (c) 2010 Samsung Electronics Co. Ltd - * Jaswinder Singh <jassi.brar@samsung.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#include <linux/platform_device.h> -#include <linux/dma-mapping.h> -#include <linux/gpio.h> - -#include <plat/gpio-cfg.h> -#include <linux/platform_data/asoc-s3c.h> - -#include <mach/map.h> -#include <mach/dma.h> -#include <mach/irqs.h> - -static int s5p6440_cfg_i2s(struct platform_device *pdev) -{ - switch (pdev->id) { - case 0: - s3c_gpio_cfgpin_range(S5P6440_GPC(4), 2, S3C_GPIO_SFN(5)); - s3c_gpio_cfgpin(S5P6440_GPC(7), S3C_GPIO_SFN(5)); - s3c_gpio_cfgpin_range(S5P6440_GPH(6), 4, S3C_GPIO_SFN(5)); - break; - default: - printk(KERN_ERR "Invalid Device %d\n", pdev->id); - return -EINVAL; - } - - return 0; -} - -static struct s3c_audio_pdata s5p6440_i2s_pdata = { - .cfg_gpio = s5p6440_cfg_i2s, - .type = { - .i2s = { - .quirks = QUIRK_PRI_6CHAN, - }, - }, -}; - -static struct resource s5p64x0_i2s0_resource[] = { - [0] = DEFINE_RES_MEM(S5P64X0_PA_I2S, SZ_256), - [1] = DEFINE_RES_DMA(DMACH_I2S0_TX), - [2] = DEFINE_RES_DMA(DMACH_I2S0_RX), -}; - -struct platform_device s5p6440_device_iis = { - .name = "samsung-i2s", - .id = 0, - .num_resources = ARRAY_SIZE(s5p64x0_i2s0_resource), - .resource = s5p64x0_i2s0_resource, - .dev = { - .platform_data = &s5p6440_i2s_pdata, - }, -}; - -static int s5p6450_cfg_i2s(struct platform_device *pdev) -{ - switch (pdev->id) { - case 0: - s3c_gpio_cfgpin_range(S5P6450_GPR(4), 5, S3C_GPIO_SFN(5)); - s3c_gpio_cfgpin_range(S5P6450_GPR(13), 2, S3C_GPIO_SFN(5)); - break; - case 1: - s3c_gpio_cfgpin(S5P6440_GPB(4), S3C_GPIO_SFN(5)); - s3c_gpio_cfgpin_range(S5P6450_GPC(0), 4, S3C_GPIO_SFN(5)); - break; - case 2: - s3c_gpio_cfgpin_range(S5P6450_GPK(0), 5, S3C_GPIO_SFN(5)); - break; - default: - printk(KERN_ERR "Invalid Device %d\n", pdev->id); - return -EINVAL; - } - - return 0; -} - -static struct s3c_audio_pdata s5p6450_i2s0_pdata = { - .cfg_gpio = s5p6450_cfg_i2s, - .type = { - .i2s = { - .quirks = QUIRK_PRI_6CHAN, - }, - }, -}; - -struct platform_device s5p6450_device_iis0 = { - .name = "samsung-i2s", - .id = 0, - .num_resources = ARRAY_SIZE(s5p64x0_i2s0_resource), - .resource = s5p64x0_i2s0_resource, - .dev = { - .platform_data = &s5p6450_i2s0_pdata, - }, -}; - -static struct s3c_audio_pdata s5p6450_i2s_pdata = { - .cfg_gpio = s5p6450_cfg_i2s, -}; - -static struct resource s5p6450_i2s1_resource[] = { - [0] = DEFINE_RES_MEM(S5P6450_PA_I2S1, SZ_256), - [1] = DEFINE_RES_DMA(DMACH_I2S1_TX), - [2] = DEFINE_RES_DMA(DMACH_I2S1_RX), -}; - -struct platform_device s5p6450_device_iis1 = { - .name = "samsung-i2s", - .id = 1, - .num_resources = ARRAY_SIZE(s5p6450_i2s1_resource), - .resource = s5p6450_i2s1_resource, - .dev = { - .platform_data = &s5p6450_i2s_pdata, - }, -}; - -static struct resource s5p6450_i2s2_resource[] = { - [0] = DEFINE_RES_MEM(S5P6450_PA_I2S2, SZ_256), - [1] = DEFINE_RES_DMA(DMACH_I2S2_TX), - [2] = DEFINE_RES_DMA(DMACH_I2S2_RX), -}; - -struct platform_device s5p6450_device_iis2 = { - .name = "samsung-i2s", - .id = 2, - .num_resources = ARRAY_SIZE(s5p6450_i2s2_resource), - .resource = s5p6450_i2s2_resource, - .dev = { - .platform_data = &s5p6450_i2s_pdata, - }, -}; - -/* PCM Controller platform_devices */ - -static int s5p6440_pcm_cfg_gpio(struct platform_device *pdev) -{ - switch (pdev->id) { - case 0: - s3c_gpio_cfgpin_range(S5P6440_GPR(6), 3, S3C_GPIO_SFN(2)); - s3c_gpio_cfgpin_range(S5P6440_GPR(13), 2, S3C_GPIO_SFN(2)); - break; - - default: - printk(KERN_DEBUG "Invalid PCM Controller number!"); - return -EINVAL; - } - - return 0; -} - -static struct s3c_audio_pdata s5p6440_pcm_pdata = { - .cfg_gpio = s5p6440_pcm_cfg_gpio, -}; - -static struct resource s5p6440_pcm0_resource[] = { - [0] = DEFINE_RES_MEM(S5P64X0_PA_PCM, SZ_256), - [1] = DEFINE_RES_DMA(DMACH_PCM0_TX), - [2] = DEFINE_RES_DMA(DMACH_PCM0_RX), -}; - -struct platform_device s5p6440_device_pcm = { - .name = "samsung-pcm", - .id = 0, - .num_resources = ARRAY_SIZE(s5p6440_pcm0_resource), - .resource = s5p6440_pcm0_resource, - .dev = { - .platform_data = &s5p6440_pcm_pdata, - }, -}; diff --git a/arch/arm/mach-s5p64x0/dma.c b/arch/arm/mach-s5p64x0/dma.c deleted file mode 100644 index 9c4ce085f585..000000000000 --- a/arch/arm/mach-s5p64x0/dma.c +++ /dev/null @@ -1,128 +0,0 @@ -/* linux/arch/arm/mach-s5p64x0/dma.c - * - * Copyright (c) 2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * Copyright (C) 2010 Samsung Electronics Co. Ltd. - * Jaswinder Singh <jassi.brar@samsung.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. -*/ - -#include <linux/dma-mapping.h> -#include <linux/amba/bus.h> -#include <linux/amba/pl330.h> - -#include <asm/irq.h> - -#include <mach/map.h> -#include <mach/irqs.h> -#include <mach/regs-clock.h> -#include <mach/dma.h> - -#include <plat/cpu.h> -#include <plat/devs.h> -#include <plat/irqs.h> - -static u8 s5p6440_pdma_peri[] = { - DMACH_UART0_RX, - DMACH_UART0_TX, - DMACH_UART1_RX, - DMACH_UART1_TX, - DMACH_UART2_RX, - DMACH_UART2_TX, - DMACH_UART3_RX, - DMACH_UART3_TX, - DMACH_MAX, - DMACH_MAX, - DMACH_PCM0_TX, - DMACH_PCM0_RX, - DMACH_I2S0_TX, - DMACH_I2S0_RX, - DMACH_SPI0_TX, - DMACH_SPI0_RX, - DMACH_MAX, - DMACH_MAX, - DMACH_MAX, - DMACH_MAX, - DMACH_SPI1_TX, - DMACH_SPI1_RX, -}; - -static struct dma_pl330_platdata s5p6440_pdma_pdata = { - .nr_valid_peri = ARRAY_SIZE(s5p6440_pdma_peri), - .peri_id = s5p6440_pdma_peri, -}; - -static u8 s5p6450_pdma_peri[] = { - DMACH_UART0_RX, - DMACH_UART0_TX, - DMACH_UART1_RX, - DMACH_UART1_TX, - DMACH_UART2_RX, - DMACH_UART2_TX, - DMACH_UART3_RX, - DMACH_UART3_TX, - DMACH_UART4_RX, - DMACH_UART4_TX, - DMACH_PCM0_TX, - DMACH_PCM0_RX, - DMACH_I2S0_TX, - DMACH_I2S0_RX, - DMACH_SPI0_TX, - DMACH_SPI0_RX, - DMACH_PCM1_TX, - DMACH_PCM1_RX, - DMACH_PCM2_TX, - DMACH_PCM2_RX, - DMACH_SPI1_TX, - DMACH_SPI1_RX, - DMACH_USI_TX, - DMACH_USI_RX, - DMACH_MAX, - DMACH_I2S1_TX, - DMACH_I2S1_RX, - DMACH_I2S2_TX, - DMACH_I2S2_RX, - DMACH_PWM, - DMACH_UART5_RX, - DMACH_UART5_TX, -}; - -static struct dma_pl330_platdata s5p6450_pdma_pdata = { - .nr_valid_peri = ARRAY_SIZE(s5p6450_pdma_peri), - .peri_id = s5p6450_pdma_peri, -}; - -static AMBA_AHB_DEVICE(s5p64x0_pdma, "dma-pl330", 0x00041330, - S5P64X0_PA_PDMA, {IRQ_DMA0}, NULL); - -static int __init s5p64x0_dma_init(void) -{ - if (soc_is_s5p6450()) { - dma_cap_set(DMA_SLAVE, s5p6450_pdma_pdata.cap_mask); - dma_cap_set(DMA_CYCLIC, s5p6450_pdma_pdata.cap_mask); - s5p64x0_pdma_device.dev.platform_data = &s5p6450_pdma_pdata; - } else { - dma_cap_set(DMA_SLAVE, s5p6440_pdma_pdata.cap_mask); - dma_cap_set(DMA_CYCLIC, s5p6440_pdma_pdata.cap_mask); - s5p64x0_pdma_device.dev.platform_data = &s5p6440_pdma_pdata; - } - - amba_device_register(&s5p64x0_pdma_device, &iomem_resource); - - return 0; -} -arch_initcall(s5p64x0_dma_init); diff --git a/arch/arm/mach-s5p64x0/i2c.h b/arch/arm/mach-s5p64x0/i2c.h deleted file mode 100644 index 1e5bb4ea200d..000000000000 --- a/arch/arm/mach-s5p64x0/i2c.h +++ /dev/null @@ -1,16 +0,0 @@ -/* - * Copyright (c) 2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * S5P64X0 I2C configuration - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -extern void s5p6440_i2c0_cfg_gpio(struct platform_device *dev); -extern void s5p6440_i2c1_cfg_gpio(struct platform_device *dev); - -extern void s5p6450_i2c0_cfg_gpio(struct platform_device *dev); -extern void s5p6450_i2c1_cfg_gpio(struct platform_device *dev); diff --git a/arch/arm/mach-s5p64x0/include/mach/debug-macro.S b/arch/arm/mach-s5p64x0/include/mach/debug-macro.S deleted file mode 100644 index 8759e7882bcb..000000000000 --- a/arch/arm/mach-s5p64x0/include/mach/debug-macro.S +++ /dev/null @@ -1,32 +0,0 @@ -/* linux/arch/arm/mach-s5p64x0/include/mach/debug-macro.S - * - * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -/* pull in the relevant register and map files. */ - -#include <linux/serial_s3c.h> -#include <plat/map-base.h> -#include <plat/map-s5p.h> - - .macro addruart, rp, rv, tmp - mov \rp, #0xE0000000 - orr \rp, \rp, #0x00100000 - ldr \rp, [\rp, #0x118 ] - and \rp, \rp, #0xff000 - teq \rp, #0x50000 @@ S5P6450 - ldreq \rp, =0xEC800000 - movne \rp, #0xEC000000 @@ S5P6440 - ldrne \rv, = S3C_VA_UART -#if CONFIG_DEBUG_S3C_UART != 0 - add \rp, \rp, #(0x400 * CONFIG_DEBUG_S3C_UART) - add \rv, \rv, #(0x400 * CONFIG_DEBUG_S3C_UART) -#endif - .endm - -#include <debug/samsung.S> diff --git a/arch/arm/mach-s5p64x0/include/mach/dma.h b/arch/arm/mach-s5p64x0/include/mach/dma.h deleted file mode 100644 index 5a622af461d7..000000000000 --- a/arch/arm/mach-s5p64x0/include/mach/dma.h +++ /dev/null @@ -1,26 +0,0 @@ -/* - * Copyright (C) 2010 Samsung Electronics Co. Ltd. - * Jaswinder Singh <jassi.brar@samsung.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. - */ - -#ifndef __MACH_DMA_H -#define __MACH_DMA_H - -/* This platform uses the common common DMA API driver for PL330 */ -#include <plat/dma-pl330.h> - -#endif /* __MACH_DMA_H */ diff --git a/arch/arm/mach-s5p64x0/include/mach/gpio.h b/arch/arm/mach-s5p64x0/include/mach/gpio.h deleted file mode 100644 index 06cd3c9b16ac..000000000000 --- a/arch/arm/mach-s5p64x0/include/mach/gpio.h +++ /dev/null @@ -1,132 +0,0 @@ -/* linux/arch/arm/mach-s5p64x0/include/mach/gpio.h - * - * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * S5P64X0 - GPIO lib support - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARCH_GPIO_H -#define __ASM_ARCH_GPIO_H __FILE__ - -/* GPIO bank sizes */ - -#define S5P6440_GPIO_A_NR (6) -#define S5P6440_GPIO_B_NR (7) -#define S5P6440_GPIO_C_NR (8) -#define S5P6440_GPIO_F_NR (16) -#define S5P6440_GPIO_G_NR (7) -#define S5P6440_GPIO_H_NR (10) -#define S5P6440_GPIO_I_NR (16) -#define S5P6440_GPIO_J_NR (12) -#define S5P6440_GPIO_N_NR (16) -#define S5P6440_GPIO_P_NR (8) -#define S5P6440_GPIO_R_NR (15) - -#define S5P6450_GPIO_A_NR (6) -#define S5P6450_GPIO_B_NR (7) -#define S5P6450_GPIO_C_NR (8) -#define S5P6450_GPIO_D_NR (8) -#define S5P6450_GPIO_F_NR (16) -#define S5P6450_GPIO_G_NR (14) -#define S5P6450_GPIO_H_NR (10) -#define S5P6450_GPIO_I_NR (16) -#define S5P6450_GPIO_J_NR (12) -#define S5P6450_GPIO_K_NR (5) -#define S5P6450_GPIO_N_NR (16) -#define S5P6450_GPIO_P_NR (11) -#define S5P6450_GPIO_Q_NR (14) -#define S5P6450_GPIO_R_NR (15) -#define S5P6450_GPIO_S_NR (8) - -/* GPIO bank numbers */ - -/* CONFIG_S3C_GPIO_SPACE allows the user to select extra - * space for debugging purposes so that any accidental - * change from one gpio bank to another can be caught. -*/ - -#define S5P64X0_GPIO_NEXT(__gpio) \ - ((__gpio##_START) + (__gpio##_NR) + CONFIG_S3C_GPIO_SPACE + 1) - -enum s5p6440_gpio_number { - S5P6440_GPIO_A_START = 0, - S5P6440_GPIO_B_START = S5P64X0_GPIO_NEXT(S5P6440_GPIO_A), - S5P6440_GPIO_C_START = S5P64X0_GPIO_NEXT(S5P6440_GPIO_B), - S5P6440_GPIO_F_START = S5P64X0_GPIO_NEXT(S5P6440_GPIO_C), - S5P6440_GPIO_G_START = S5P64X0_GPIO_NEXT(S5P6440_GPIO_F), - S5P6440_GPIO_H_START = S5P64X0_GPIO_NEXT(S5P6440_GPIO_G), - S5P6440_GPIO_I_START = S5P64X0_GPIO_NEXT(S5P6440_GPIO_H), - S5P6440_GPIO_J_START = S5P64X0_GPIO_NEXT(S5P6440_GPIO_I), - S5P6440_GPIO_N_START = S5P64X0_GPIO_NEXT(S5P6440_GPIO_J), - S5P6440_GPIO_P_START = S5P64X0_GPIO_NEXT(S5P6440_GPIO_N), - S5P6440_GPIO_R_START = S5P64X0_GPIO_NEXT(S5P6440_GPIO_P), -}; - -enum s5p6450_gpio_number { - S5P6450_GPIO_A_START = 0, - S5P6450_GPIO_B_START = S5P64X0_GPIO_NEXT(S5P6450_GPIO_A), - S5P6450_GPIO_C_START = S5P64X0_GPIO_NEXT(S5P6450_GPIO_B), - S5P6450_GPIO_D_START = S5P64X0_GPIO_NEXT(S5P6450_GPIO_C), - S5P6450_GPIO_F_START = S5P64X0_GPIO_NEXT(S5P6450_GPIO_D), - S5P6450_GPIO_G_START = S5P64X0_GPIO_NEXT(S5P6450_GPIO_F), - S5P6450_GPIO_H_START = S5P64X0_GPIO_NEXT(S5P6450_GPIO_G), - S5P6450_GPIO_I_START = S5P64X0_GPIO_NEXT(S5P6450_GPIO_H), - S5P6450_GPIO_J_START = S5P64X0_GPIO_NEXT(S5P6450_GPIO_I), - S5P6450_GPIO_K_START = S5P64X0_GPIO_NEXT(S5P6450_GPIO_J), - S5P6450_GPIO_N_START = S5P64X0_GPIO_NEXT(S5P6450_GPIO_K), - S5P6450_GPIO_P_START = S5P64X0_GPIO_NEXT(S5P6450_GPIO_N), - S5P6450_GPIO_Q_START = S5P64X0_GPIO_NEXT(S5P6450_GPIO_P), - S5P6450_GPIO_R_START = S5P64X0_GPIO_NEXT(S5P6450_GPIO_Q), - S5P6450_GPIO_S_START = S5P64X0_GPIO_NEXT(S5P6450_GPIO_R), -}; - -/* GPIO number definitions */ - -#define S5P6440_GPA(_nr) (S5P6440_GPIO_A_START + (_nr)) -#define S5P6440_GPB(_nr) (S5P6440_GPIO_B_START + (_nr)) -#define S5P6440_GPC(_nr) (S5P6440_GPIO_C_START + (_nr)) -#define S5P6440_GPF(_nr) (S5P6440_GPIO_F_START + (_nr)) -#define S5P6440_GPG(_nr) (S5P6440_GPIO_G_START + (_nr)) -#define S5P6440_GPH(_nr) (S5P6440_GPIO_H_START + (_nr)) -#define S5P6440_GPI(_nr) (S5P6440_GPIO_I_START + (_nr)) -#define S5P6440_GPJ(_nr) (S5P6440_GPIO_J_START + (_nr)) -#define S5P6440_GPN(_nr) (S5P6440_GPIO_N_START + (_nr)) -#define S5P6440_GPP(_nr) (S5P6440_GPIO_P_START + (_nr)) -#define S5P6440_GPR(_nr) (S5P6440_GPIO_R_START + (_nr)) - -#define S5P6450_GPA(_nr) (S5P6450_GPIO_A_START + (_nr)) -#define S5P6450_GPB(_nr) (S5P6450_GPIO_B_START + (_nr)) -#define S5P6450_GPC(_nr) (S5P6450_GPIO_C_START + (_nr)) -#define S5P6450_GPD(_nr) (S5P6450_GPIO_D_START + (_nr)) -#define S5P6450_GPF(_nr) (S5P6450_GPIO_F_START + (_nr)) -#define S5P6450_GPG(_nr) (S5P6450_GPIO_G_START + (_nr)) -#define S5P6450_GPH(_nr) (S5P6450_GPIO_H_START + (_nr)) -#define S5P6450_GPI(_nr) (S5P6450_GPIO_I_START + (_nr)) -#define S5P6450_GPJ(_nr) (S5P6450_GPIO_J_START + (_nr)) -#define S5P6450_GPK(_nr) (S5P6450_GPIO_K_START + (_nr)) -#define S5P6450_GPN(_nr) (S5P6450_GPIO_N_START + (_nr)) -#define S5P6450_GPP(_nr) (S5P6450_GPIO_P_START + (_nr)) -#define S5P6450_GPQ(_nr) (S5P6450_GPIO_Q_START + (_nr)) -#define S5P6450_GPR(_nr) (S5P6450_GPIO_R_START + (_nr)) -#define S5P6450_GPS(_nr) (S5P6450_GPIO_S_START + (_nr)) - -/* the end of the S5P64X0 specific gpios */ - -#define S5P6440_GPIO_END (S5P6440_GPR(S5P6440_GPIO_R_NR) + 1) -#define S5P6450_GPIO_END (S5P6450_GPS(S5P6450_GPIO_S_NR) + 1) - -#define S5P64X0_GPIO_END (S5P6440_GPIO_END > S5P6450_GPIO_END ? \ - S5P6440_GPIO_END : S5P6450_GPIO_END) - -#define S3C_GPIO_END S5P64X0_GPIO_END - -/* define the number of gpios we need to the one after the last GPIO range */ - -#define ARCH_NR_GPIOS (S5P64X0_GPIO_END + CONFIG_SAMSUNG_GPIO_EXTRA) - -#endif /* __ASM_ARCH_GPIO_H */ diff --git a/arch/arm/mach-s5p64x0/include/mach/hardware.h b/arch/arm/mach-s5p64x0/include/mach/hardware.h deleted file mode 100644 index d3e87996dd9a..000000000000 --- a/arch/arm/mach-s5p64x0/include/mach/hardware.h +++ /dev/null @@ -1,18 +0,0 @@ -/* linux/arch/arm/mach-s5p64x0/include/mach/hardware.h - * - * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * S5P64X0 - Hardware support - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARCH_HARDWARE_H -#define __ASM_ARCH_HARDWARE_H __FILE__ - -/* currently nothing here, placeholder */ - -#endif /* __ASM_ARCH_HARDWARE_H */ diff --git a/arch/arm/mach-s5p64x0/include/mach/irqs.h b/arch/arm/mach-s5p64x0/include/mach/irqs.h deleted file mode 100644 index 53982db9d259..000000000000 --- a/arch/arm/mach-s5p64x0/include/mach/irqs.h +++ /dev/null @@ -1,148 +0,0 @@ -/* linux/arch/arm/mach-s5p64x0/include/mach/irqs.h - * - * Copyright 2009-2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * S5P64X0 - IRQ definitions - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARCH_IRQS_H -#define __ASM_ARCH_IRQS_H __FILE__ - -#include <plat/irqs.h> - -/* VIC0 */ - -#define IRQ_EINT0_3 S5P_IRQ_VIC0(0) -#define IRQ_EINT4_11 S5P_IRQ_VIC0(1) -#define IRQ_RTC_TIC S5P_IRQ_VIC0(2) -#define IRQ_IIS1 S5P_IRQ_VIC0(3) /* for only S5P6450 */ -#define IRQ_IIS2 S5P_IRQ_VIC0(4) /* for only S5P6450 */ -#define IRQ_IIC1 S5P_IRQ_VIC0(5) -#define IRQ_I2SV40 S5P_IRQ_VIC0(6) -#define IRQ_GPS S5P_IRQ_VIC0(7) /* for only S5P6450 */ - -#define IRQ_2D S5P_IRQ_VIC0(11) -#define IRQ_TIMER0_VIC S5P_IRQ_VIC0(23) -#define IRQ_TIMER1_VIC S5P_IRQ_VIC0(24) -#define IRQ_TIMER2_VIC S5P_IRQ_VIC0(25) -#define IRQ_WDT S5P_IRQ_VIC0(26) -#define IRQ_TIMER3_VIC S5P_IRQ_VIC0(27) -#define IRQ_TIMER4_VIC S5P_IRQ_VIC0(28) -#define IRQ_DISPCON0 S5P_IRQ_VIC0(29) -#define IRQ_DISPCON1 S5P_IRQ_VIC0(30) -#define IRQ_DISPCON2 S5P_IRQ_VIC0(31) - -/* VIC1 */ - -#define IRQ_EINT12_15 S5P_IRQ_VIC1(0) -#define IRQ_PCM0 S5P_IRQ_VIC1(2) -#define IRQ_PCM1 S5P_IRQ_VIC1(3) /* for only S5P6450 */ -#define IRQ_PCM2 S5P_IRQ_VIC1(4) /* for only S5P6450 */ -#define IRQ_UART0 S5P_IRQ_VIC1(5) -#define IRQ_UART1 S5P_IRQ_VIC1(6) -#define IRQ_UART2 S5P_IRQ_VIC1(7) -#define IRQ_UART3 S5P_IRQ_VIC1(8) -#define IRQ_DMA0 S5P_IRQ_VIC1(9) -#define IRQ_UART4 S5P_IRQ_VIC1(10) /* S5P6450 */ -#define IRQ_UART5 S5P_IRQ_VIC1(11) /* S5P6450 */ -#define IRQ_NFC S5P_IRQ_VIC1(13) -#define IRQ_USI S5P_IRQ_VIC1(15) /* S5P6450 */ -#define IRQ_SPI0 S5P_IRQ_VIC1(16) -#define IRQ_SPI1 S5P_IRQ_VIC1(17) -#define IRQ_HSMMC2 S5P_IRQ_VIC1(17) /* Shared */ -#define IRQ_IIC S5P_IRQ_VIC1(18) -#define IRQ_DISPCON3 S5P_IRQ_VIC1(19) -#define IRQ_EINT_GROUPS S5P_IRQ_VIC1(21) -#define IRQ_PMU S5P_IRQ_VIC1(23) /* S5P6440 */ -#define IRQ_HSMMC0 S5P_IRQ_VIC1(24) -#define IRQ_HSMMC1 S5P_IRQ_VIC1(25) -#define IRQ_OTG S5P_IRQ_VIC1(26) -#define IRQ_DSI S5P_IRQ_VIC1(27) -#define IRQ_RTC_ALARM S5P_IRQ_VIC1(28) -#define IRQ_TSI S5P_IRQ_VIC1(29) -#define IRQ_PENDN S5P_IRQ_VIC1(30) -#define IRQ_TC IRQ_PENDN -#define IRQ_ADC S5P_IRQ_VIC1(31) - -/* UART interrupts, S5P6450 has 5 UARTs */ -#define IRQ_S5P_UART_BASE4 (96) -#define IRQ_S5P_UART_BASE5 (100) - -#define IRQ_S5P_UART_RX4 (IRQ_S5P_UART_BASE4 + UART_IRQ_RXD) -#define IRQ_S5P_UART_TX4 (IRQ_S5P_UART_BASE4 + UART_IRQ_TXD) -#define IRQ_S5P_UART_ERR4 (IRQ_S5P_UART_BASE4 + UART_IRQ_ERR) - -#define IRQ_S5P_UART_RX5 (IRQ_S5P_UART_BASE5 + UART_IRQ_RXD) -#define IRQ_S5P_UART_TX5 (IRQ_S5P_UART_BASE5 + UART_IRQ_TXD) -#define IRQ_S5P_UART_ERR5 (IRQ_S5P_UART_BASE5 + UART_IRQ_ERR) - -/* S3C compatibilty defines */ -#define IRQ_S3CUART_RX4 IRQ_S5P_UART_RX4 -#define IRQ_S3CUART_RX5 IRQ_S5P_UART_RX5 - -#define IRQ_I2S0 IRQ_I2SV40 - -#define IRQ_LCD_FIFO IRQ_DISPCON0 -#define IRQ_LCD_VSYNC IRQ_DISPCON1 -#define IRQ_LCD_SYSTEM IRQ_DISPCON2 - -/* S5P6450 EINT feature will be added */ - -/* - * Since the IRQ_EINT(x) are a linear mapping on s5p6440 we just defined - * them as an IRQ_EINT(x) macro from S5P_IRQ_EINT_BASE which we place - * after the pair of VICs. - */ - -#define S5P_IRQ_EINT_BASE (S5P_IRQ_VIC1(31) + 6) - -#define S5P_EINT(x) ((x) + S5P_IRQ_EINT_BASE) - -#define S5P_EINT_BASE1 (S5P_IRQ_EINT_BASE) -/* - * S5P6440 has 0-15 external interrupts in group 0. Only these can be used - * to wake up from sleep. If request is beyond this range, by mistake, a large - * return value for an irq number should be indication of something amiss. - */ -#define S5P_EINT_BASE2 (0xf0000000) - -/* - * Next the external interrupt groups. These are similar to the IRQ_EINT(x) - * that they are sourced from the GPIO pins but with a different scheme for - * priority and source indication. - * - * The IRQ_EINT(x) can be thought of as 'group 0' of the available GPIO - * interrupts, but for historical reasons they are kept apart from these - * next interrupts. - * - * Use IRQ_EINT_GROUP(group, offset) to get the number for use in the - * machine specific support files. - */ - -/* Actually, #6 and #7 are missing in the EINT_GROUP1 */ -#define IRQ_EINT_GROUP1_NR (15) -#define IRQ_EINT_GROUP2_NR (8) -#define IRQ_EINT_GROUP5_NR (7) -#define IRQ_EINT_GROUP6_NR (10) -/* Actually, #0, #1 and #2 are missing in the EINT_GROUP8 */ -#define IRQ_EINT_GROUP8_NR (11) - -#define IRQ_EINT_GROUP_BASE S5P_EINT(16) -#define IRQ_EINT_GROUP1_BASE (IRQ_EINT_GROUP_BASE + 0) -#define IRQ_EINT_GROUP2_BASE (IRQ_EINT_GROUP1_BASE + IRQ_EINT_GROUP1_NR) -#define IRQ_EINT_GROUP5_BASE (IRQ_EINT_GROUP2_BASE + IRQ_EINT_GROUP2_NR) -#define IRQ_EINT_GROUP6_BASE (IRQ_EINT_GROUP5_BASE + IRQ_EINT_GROUP5_NR) -#define IRQ_EINT_GROUP8_BASE (IRQ_EINT_GROUP6_BASE + IRQ_EINT_GROUP6_NR) - -#define IRQ_EINT_GROUP(grp, x) (IRQ_EINT_GROUP##grp##_BASE + (x)) - -/* Set the default NR_IRQS */ - -#define NR_IRQS (IRQ_EINT_GROUP8_BASE + IRQ_EINT_GROUP8_NR + 1) - -#endif /* __ASM_ARCH_IRQS_H */ diff --git a/arch/arm/mach-s5p64x0/include/mach/map.h b/arch/arm/mach-s5p64x0/include/mach/map.h deleted file mode 100644 index 50a6e96d6389..000000000000 --- a/arch/arm/mach-s5p64x0/include/mach/map.h +++ /dev/null @@ -1,96 +0,0 @@ -/* linux/arch/arm/mach-s5p64x0/include/mach/map.h - * - * Copyright (c) 2009-2011 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * S5P64X0 - Memory map definitions - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARCH_MAP_H -#define __ASM_ARCH_MAP_H __FILE__ - -#include <plat/map-base.h> -#include <plat/map-s5p.h> - -#define S5P64X0_PA_SDRAM 0x20000000 - -#define S5P64X0_PA_CHIPID 0xE0000000 - -#define S5P64X0_PA_SYSCON 0xE0100000 - -#define S5P64X0_PA_GPIO 0xE0308000 - -#define S5P64X0_PA_VIC0 0xE4000000 -#define S5P64X0_PA_VIC1 0xE4100000 - -#define S5P64X0_PA_SROMC 0xE7000000 - -#define S5P64X0_PA_PDMA 0xE9000000 - -#define S5P64X0_PA_TIMER 0xEA000000 -#define S5P64X0_PA_RTC 0xEA100000 -#define S5P64X0_PA_WDT 0xEA200000 - -#define S5P6440_PA_IIC0 0xEC104000 -#define S5P6440_PA_IIC1 0xEC20F000 -#define S5P6450_PA_IIC0 0xEC100000 -#define S5P6450_PA_IIC1 0xEC200000 - -#define S5P64X0_PA_SPI0 0xEC400000 -#define S5P64X0_PA_SPI1 0xEC500000 - -#define S5P64X0_PA_HSOTG 0xED100000 - -#define S5P64X0_PA_HSMMC(x) (0xED800000 + ((x) * 0x100000)) - -#define S5P64X0_PA_FB 0xEE000000 - -#define S5P64X0_PA_I2S 0xF2000000 -#define S5P6450_PA_I2S1 0xF2800000 -#define S5P6450_PA_I2S2 0xF2900000 - -#define S5P64X0_PA_PCM 0xF2100000 - -#define S5P64X0_PA_ADC 0xF3000000 - -/* Compatibiltiy Defines */ - -#define S3C_PA_HSMMC0 S5P64X0_PA_HSMMC(0) -#define S3C_PA_HSMMC1 S5P64X0_PA_HSMMC(1) -#define S3C_PA_HSMMC2 S5P64X0_PA_HSMMC(2) -#define S3C_PA_IIC S5P6440_PA_IIC0 -#define S3C_PA_IIC1 S5P6440_PA_IIC1 -#define S3C_PA_RTC S5P64X0_PA_RTC -#define S3C_PA_WDT S5P64X0_PA_WDT -#define S3C_PA_FB S5P64X0_PA_FB -#define S3C_PA_SPI0 S5P64X0_PA_SPI0 -#define S3C_PA_SPI1 S5P64X0_PA_SPI1 - -#define S5P_PA_CHIPID S5P64X0_PA_CHIPID -#define S5P_PA_SROMC S5P64X0_PA_SROMC -#define S5P_PA_SYSCON S5P64X0_PA_SYSCON -#define S5P_PA_TIMER S5P64X0_PA_TIMER - -#define SAMSUNG_PA_ADC S5P64X0_PA_ADC -#define SAMSUNG_PA_TIMER S5P64X0_PA_TIMER - -/* UART */ - -#define S5P6440_PA_UART(x) (0xEC000000 + ((x) * S3C_UART_OFFSET)) -#define S5P6450_PA_UART(x) ((x < 5) ? (0xEC800000 + ((x) * S3C_UART_OFFSET)) : (0xEC000000)) - -#define S5P_PA_UART0 S5P6450_PA_UART(0) -#define S5P_PA_UART1 S5P6450_PA_UART(1) -#define S5P_PA_UART2 S5P6450_PA_UART(2) -#define S5P_PA_UART3 S5P6450_PA_UART(3) -#define S5P_PA_UART4 S5P6450_PA_UART(4) -#define S5P_PA_UART5 S5P6450_PA_UART(5) - -#define S5P_SZ_UART SZ_256 -#define S3C_VA_UARTx(x) (S3C_VA_UART + ((x) * S3C_UART_OFFSET)) - -#endif /* __ASM_ARCH_MAP_H */ diff --git a/arch/arm/mach-s5p64x0/include/mach/pm-core.h b/arch/arm/mach-s5p64x0/include/mach/pm-core.h deleted file mode 100644 index 1e0eb65b2b82..000000000000 --- a/arch/arm/mach-s5p64x0/include/mach/pm-core.h +++ /dev/null @@ -1,119 +0,0 @@ -/* linux/arch/arm/mach-s5p64x0/include/mach/pm-core.h - * - * Copyright (c) 2011 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * S5P64X0 - PM core support for arch/arm/plat-samsung/pm.c - * - * Based on PM core support for S3C64XX by Ben Dooks - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include <linux/serial_s3c.h> - -#include <mach/regs-gpio.h> - -static inline void s3c_pm_debug_init_uart(void) -{ - u32 tmp = __raw_readl(S5P64X0_CLK_GATE_PCLK); - - /* - * As a note, since the S5P64X0 UARTs generally have multiple - * clock sources, we simply enable PCLK at the moment and hope - * that the resume settings for the UART are suitable for the - * use with PCLK. - */ - tmp |= S5P64X0_CLK_GATE_PCLK_UART0; - tmp |= S5P64X0_CLK_GATE_PCLK_UART1; - tmp |= S5P64X0_CLK_GATE_PCLK_UART2; - tmp |= S5P64X0_CLK_GATE_PCLK_UART3; - - __raw_writel(tmp, S5P64X0_CLK_GATE_PCLK); - udelay(10); -} - -static inline void s3c_pm_arch_prepare_irqs(void) -{ - /* VIC should have already been taken care of */ - - /* clear any pending EINT0 interrupts */ - __raw_writel(__raw_readl(S5P64X0_EINT0PEND), S5P64X0_EINT0PEND); -} - -static inline void s3c_pm_arch_stop_clocks(void) { } -static inline void s3c_pm_arch_show_resume_irqs(void) { } - -/* - * make these defines, we currently do not have any need to change - * the IRQ wake controls depending on the CPU we are running on - */ -#define s3c_irqwake_eintallow ((1 << 16) - 1) -#define s3c_irqwake_intallow (~0) - -static inline void s3c_pm_arch_update_uart(void __iomem *regs, - struct pm_uart_save *save) -{ - u32 ucon = __raw_readl(regs + S3C2410_UCON); - u32 ucon_clk = ucon & S3C6400_UCON_CLKMASK; - u32 save_clk = save->ucon & S3C6400_UCON_CLKMASK; - u32 new_ucon; - u32 delta; - - /* - * S5P64X0 UART blocks only support level interrupts, so ensure that - * when we restore unused UART blocks we force the level interrupt - * settings. - */ - save->ucon |= S3C2410_UCON_TXILEVEL | S3C2410_UCON_RXILEVEL; - - /* - * We have a constraint on changing the clock type of the UART - * between UCLKx and PCLK, so ensure that when we restore UCON - * that the CLK field is correctly modified if the bootloader - * has changed anything. - */ - if (ucon_clk != save_clk) { - new_ucon = save->ucon; - delta = ucon_clk ^ save_clk; - - /* - * change from UCLKx => wrong PCLK, - * either UCLK can be tested for by a bit-test - * with UCLK0 - */ - if (ucon_clk & S3C6400_UCON_UCLK0 && - !(save_clk & S3C6400_UCON_UCLK0) && - delta & S3C6400_UCON_PCLK2) { - new_ucon &= ~S3C6400_UCON_UCLK0; - } else if (delta == S3C6400_UCON_PCLK2) { - /* - * as a precaution, don't change from - * PCLK2 => PCLK or vice-versa - */ - new_ucon ^= S3C6400_UCON_PCLK2; - } - - S3C_PMDBG("ucon change %04x => %04x (save=%04x)\n", - ucon, new_ucon, save->ucon); - save->ucon = new_ucon; - } -} - -static inline void s3c_pm_restored_gpios(void) -{ - /* ensure sleep mode has been cleared from the system */ - __raw_writel(0, S5P64X0_SLPEN); -} - -static inline void samsung_pm_saved_gpios(void) -{ - /* - * turn on the sleep mode and keep it there, as it seems that during - * suspend the xCON registers get re-set and thus you can end up with - * problems between going to sleep and resuming. - */ - __raw_writel(S5P64X0_SLPEN_USE_xSLP, S5P64X0_SLPEN); -} diff --git a/arch/arm/mach-s5p64x0/include/mach/regs-clock.h b/arch/arm/mach-s5p64x0/include/mach/regs-clock.h deleted file mode 100644 index bd91112c813c..000000000000 --- a/arch/arm/mach-s5p64x0/include/mach/regs-clock.h +++ /dev/null @@ -1,98 +0,0 @@ -/* linux/arch/arm/mach-s5p64x0/include/mach/regs-clock.h - * - * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * S5P64X0 - Clock register definitions - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARCH_REGS_CLOCK_H -#define __ASM_ARCH_REGS_CLOCK_H __FILE__ - -#include <mach/map.h> - -#define S5P_CLKREG(x) (S3C_VA_SYS + (x)) - -#define S5P64X0_APLL_CON S5P_CLKREG(0x0C) -#define S5P64X0_MPLL_CON S5P_CLKREG(0x10) -#define S5P64X0_EPLL_CON S5P_CLKREG(0x14) -#define S5P64X0_EPLL_CON_K S5P_CLKREG(0x18) - -#define S5P64X0_CLK_SRC0 S5P_CLKREG(0x1C) - -#define S5P64X0_CLK_DIV0 S5P_CLKREG(0x20) -#define S5P64X0_CLK_DIV1 S5P_CLKREG(0x24) -#define S5P64X0_CLK_DIV2 S5P_CLKREG(0x28) - -#define S5P64X0_CLK_GATE_HCLK0 S5P_CLKREG(0x30) -#define S5P64X0_CLK_GATE_PCLK S5P_CLKREG(0x34) -#define S5P64X0_CLK_GATE_SCLK0 S5P_CLKREG(0x38) -#define S5P64X0_CLK_GATE_MEM0 S5P_CLKREG(0x3C) - -#define S5P64X0_CLK_DIV3 S5P_CLKREG(0x40) - -#define S5P64X0_CLK_GATE_HCLK1 S5P_CLKREG(0x44) -#define S5P64X0_CLK_GATE_SCLK1 S5P_CLKREG(0x48) - -#define S5P6450_DPLL_CON S5P_CLKREG(0x50) -#define S5P6450_DPLL_CON_K S5P_CLKREG(0x54) - -#define S5P64X0_AHB_CON0 S5P_CLKREG(0x100) -#define S5P64X0_CLK_SRC1 S5P_CLKREG(0x10C) - -#define S5P64X0_SYS_ID S5P_CLKREG(0x118) -#define S5P64X0_SYS_OTHERS S5P_CLKREG(0x11C) - -#define S5P64X0_PWR_CFG S5P_CLKREG(0x804) -#define S5P64X0_EINT_WAKEUP_MASK S5P_CLKREG(0x808) -#define S5P64X0_SLEEP_CFG S5P_CLKREG(0x818) -#define S5P64X0_PWR_STABLE S5P_CLKREG(0x828) - -#define S5P64X0_OTHERS S5P_CLKREG(0x900) -#define S5P64X0_WAKEUP_STAT S5P_CLKREG(0x908) - -#define S5P64X0_INFORM0 S5P_CLKREG(0xA00) - -#define S5P64X0_CLKDIV0_HCLK_SHIFT (8) -#define S5P64X0_CLKDIV0_HCLK_MASK (0xF << S5P64X0_CLKDIV0_HCLK_SHIFT) - -/* HCLK GATE Registers */ -#define S5P64X0_CLK_GATE_HCLK1_FIMGVG (1 << 2) -#define S5P64X0_CLK_GATE_SCLK1_FIMGVG (1 << 2) - -/* PCLK GATE Registers */ -#define S5P64X0_CLK_GATE_PCLK_UART3 (1 << 4) -#define S5P64X0_CLK_GATE_PCLK_UART2 (1 << 3) -#define S5P64X0_CLK_GATE_PCLK_UART1 (1 << 2) -#define S5P64X0_CLK_GATE_PCLK_UART0 (1 << 1) - -#define S5P64X0_PWR_CFG_MMC1_DISABLE (1 << 15) -#define S5P64X0_PWR_CFG_MMC0_DISABLE (1 << 14) -#define S5P64X0_PWR_CFG_RTC_TICK_DISABLE (1 << 11) -#define S5P64X0_PWR_CFG_RTC_ALRM_DISABLE (1 << 10) -#define S5P64X0_PWR_CFG_WFI_MASK (3 << 5) -#define S5P64X0_PWR_CFG_WFI_SLEEP (3 << 5) - -#define S5P64X0_SLEEP_CFG_OSC_EN (1 << 0) - -#define S5P64X0_PWR_STABLE_PWR_CNT_VAL4 (4 << 0) - -#define S5P6450_OTHERS_DISABLE_INT (1 << 31) -#define S5P64X0_OTHERS_RET_UART (1 << 26) -#define S5P64X0_OTHERS_RET_MMC1 (1 << 25) -#define S5P64X0_OTHERS_RET_MMC0 (1 << 24) -#define S5P64X0_OTHERS_USB_SIG_MASK (1 << 16) - -/* Compatibility defines */ - -#define ARM_CLK_DIV S5P64X0_CLK_DIV0 -#define ARM_DIV_RATIO_SHIFT 0 -#define ARM_DIV_MASK (0xF << ARM_DIV_RATIO_SHIFT) - -#define S5P_EPLL_CON S5P64X0_EPLL_CON - -#endif /* __ASM_ARCH_REGS_CLOCK_H */ diff --git a/arch/arm/mach-s5p64x0/include/mach/regs-gpio.h b/arch/arm/mach-s5p64x0/include/mach/regs-gpio.h deleted file mode 100644 index cfdfa4fdadf2..000000000000 --- a/arch/arm/mach-s5p64x0/include/mach/regs-gpio.h +++ /dev/null @@ -1,68 +0,0 @@ -/* linux/arch/arm/mach-s5p64x0/include/mach/regs-gpio.h - * - * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * S5P64X0 - GPIO register definitions - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARCH_REGS_GPIO_H -#define __ASM_ARCH_REGS_GPIO_H __FILE__ - -#include <mach/map.h> - -/* Base addresses for each of the banks */ - -#define S5P64X0_GPA_BASE (S5P_VA_GPIO + 0x0000) -#define S5P64X0_GPB_BASE (S5P_VA_GPIO + 0x0020) -#define S5P64X0_GPC_BASE (S5P_VA_GPIO + 0x0040) -#define S5P64X0_GPF_BASE (S5P_VA_GPIO + 0x00A0) -#define S5P64X0_GPG_BASE (S5P_VA_GPIO + 0x00C0) -#define S5P64X0_GPH_BASE (S5P_VA_GPIO + 0x00E0) -#define S5P64X0_GPI_BASE (S5P_VA_GPIO + 0x0100) -#define S5P64X0_GPJ_BASE (S5P_VA_GPIO + 0x0120) -#define S5P64X0_GPN_BASE (S5P_VA_GPIO + 0x0830) -#define S5P64X0_GPP_BASE (S5P_VA_GPIO + 0x0160) -#define S5P64X0_GPR_BASE (S5P_VA_GPIO + 0x0290) - -#define S5P6450_GPD_BASE (S5P_VA_GPIO + 0x0060) -#define S5P6450_GPK_BASE (S5P_VA_GPIO + 0x0140) -#define S5P6450_GPQ_BASE (S5P_VA_GPIO + 0x0180) -#define S5P6450_GPS_BASE (S5P_VA_GPIO + 0x0300) - -#define S5P64X0_SPCON0 (S5P_VA_GPIO + 0x1A0) -#define S5P64X0_SPCON0_LCD_SEL_MASK (0x3 << 0) -#define S5P64X0_SPCON0_LCD_SEL_RGB (0x1 << 0) -#define S5P64X0_SPCON1 (S5P_VA_GPIO + 0x2B0) - -#define S5P64X0_MEM0CONSLP0 (S5P_VA_GPIO + 0x1C0) -#define S5P64X0_MEM0CONSLP1 (S5P_VA_GPIO + 0x1C4) -#define S5P64X0_MEM0DRVCON (S5P_VA_GPIO + 0x1D0) -#define S5P64X0_MEM1DRVCON (S5P_VA_GPIO + 0x1D4) - -#define S5P64X0_EINT12CON (S5P_VA_GPIO + 0x200) -#define S5P64X0_EINT12FLTCON (S5P_VA_GPIO + 0x220) -#define S5P64X0_EINT12MASK (S5P_VA_GPIO + 0x240) - -/* External interrupt control registers for group0 */ - -#define EINT0CON0_OFFSET (0x900) -#define EINT0FLTCON0_OFFSET (0x910) -#define EINT0FLTCON1_OFFSET (0x914) -#define EINT0MASK_OFFSET (0x920) -#define EINT0PEND_OFFSET (0x924) - -#define S5P64X0_EINT0CON0 (S5P_VA_GPIO + EINT0CON0_OFFSET) -#define S5P64X0_EINT0FLTCON0 (S5P_VA_GPIO + EINT0FLTCON0_OFFSET) -#define S5P64X0_EINT0FLTCON1 (S5P_VA_GPIO + EINT0FLTCON1_OFFSET) -#define S5P64X0_EINT0MASK (S5P_VA_GPIO + EINT0MASK_OFFSET) -#define S5P64X0_EINT0PEND (S5P_VA_GPIO + EINT0PEND_OFFSET) - -#define S5P64X0_SLPEN (S5P_VA_GPIO + 0x930) -#define S5P64X0_SLPEN_USE_xSLP (1 << 0) - -#endif /* __ASM_ARCH_REGS_GPIO_H */ diff --git a/arch/arm/mach-s5p64x0/include/mach/regs-irq.h b/arch/arm/mach-s5p64x0/include/mach/regs-irq.h deleted file mode 100644 index d60397d1ff40..000000000000 --- a/arch/arm/mach-s5p64x0/include/mach/regs-irq.h +++ /dev/null @@ -1,18 +0,0 @@ -/* linux/arch/arm/mach-s5p64x0/include/mach/regs-irq.h - * - * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * S5P64X0 - IRQ register definitions - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARCH_REGS_IRQ_H -#define __ASM_ARCH_REGS_IRQ_H __FILE__ - -#include <mach/map.h> - -#endif /* __ASM_ARCH_REGS_IRQ_H */ diff --git a/arch/arm/mach-s5p64x0/irq-pm.c b/arch/arm/mach-s5p64x0/irq-pm.c deleted file mode 100644 index 2ed921e095dc..000000000000 --- a/arch/arm/mach-s5p64x0/irq-pm.c +++ /dev/null @@ -1,98 +0,0 @@ -/* linux/arch/arm/mach-s5p64x0/irq-pm.c - * - * Copyright (c) 2011 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * S5P64X0 - Interrupt handling Power Management - * - * Based on arch/arm/mach-s3c64xx/irq-pm.c by Ben Dooks - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include <linux/syscore_ops.h> -#include <linux/serial_core.h> -#include <linux/serial_s3c.h> -#include <linux/io.h> - -#include <plat/pm.h> - -#include <mach/regs-gpio.h> - -static struct sleep_save irq_save[] = { - SAVE_ITEM(S5P64X0_EINT0CON0), - SAVE_ITEM(S5P64X0_EINT0FLTCON0), - SAVE_ITEM(S5P64X0_EINT0FLTCON1), - SAVE_ITEM(S5P64X0_EINT0MASK), -}; - -static struct irq_grp_save { - u32 con; - u32 fltcon; - u32 mask; -} eint_grp_save[4]; - -#ifdef CONFIG_SERIAL_SAMSUNG -static u32 irq_uart_mask[CONFIG_SERIAL_SAMSUNG_UARTS]; -#endif - -static int s5p64x0_irq_pm_suspend(void) -{ - struct irq_grp_save *grp = eint_grp_save; - int i; - - S3C_PMDBG("%s: suspending IRQs\n", __func__); - - s3c_pm_do_save(irq_save, ARRAY_SIZE(irq_save)); - -#ifdef CONFIG_SERIAL_SAMSUNG - for (i = 0; i < CONFIG_SERIAL_SAMSUNG_UARTS; i++) - irq_uart_mask[i] = __raw_readl(S3C_VA_UARTx(i) + S3C64XX_UINTM); -#endif - - for (i = 0; i < ARRAY_SIZE(eint_grp_save); i++, grp++) { - grp->con = __raw_readl(S5P64X0_EINT12CON + (i * 4)); - grp->mask = __raw_readl(S5P64X0_EINT12MASK + (i * 4)); - grp->fltcon = __raw_readl(S5P64X0_EINT12FLTCON + (i * 4)); - } - - return 0; -} - -static void s5p64x0_irq_pm_resume(void) -{ - struct irq_grp_save *grp = eint_grp_save; - int i; - - S3C_PMDBG("%s: resuming IRQs\n", __func__); - - s3c_pm_do_restore(irq_save, ARRAY_SIZE(irq_save)); - -#ifdef CONFIG_SERIAL_SAMSUNG - for (i = 0; i < CONFIG_SERIAL_SAMSUNG_UARTS; i++) - __raw_writel(irq_uart_mask[i], S3C_VA_UARTx(i) + S3C64XX_UINTM); -#endif - - for (i = 0; i < ARRAY_SIZE(eint_grp_save); i++, grp++) { - __raw_writel(grp->con, S5P64X0_EINT12CON + (i * 4)); - __raw_writel(grp->mask, S5P64X0_EINT12MASK + (i * 4)); - __raw_writel(grp->fltcon, S5P64X0_EINT12FLTCON + (i * 4)); - } - - S3C_PMDBG("%s: IRQ configuration restored\n", __func__); -} - -static struct syscore_ops s5p64x0_irq_syscore_ops = { - .suspend = s5p64x0_irq_pm_suspend, - .resume = s5p64x0_irq_pm_resume, -}; - -static int __init s5p64x0_syscore_init(void) -{ - register_syscore_ops(&s5p64x0_irq_syscore_ops); - - return 0; -} -core_initcall(s5p64x0_syscore_init); diff --git a/arch/arm/mach-s5p64x0/mach-smdk6440.c b/arch/arm/mach-s5p64x0/mach-smdk6440.c deleted file mode 100644 index 6840e197cb2d..000000000000 --- a/arch/arm/mach-s5p64x0/mach-smdk6440.c +++ /dev/null @@ -1,280 +0,0 @@ -/* linux/arch/arm/mach-s5p64x0/mach-smdk6440.c - * - * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#include <linux/kernel.h> -#include <linux/types.h> -#include <linux/interrupt.h> -#include <linux/list.h> -#include <linux/timer.h> -#include <linux/delay.h> -#include <linux/init.h> -#include <linux/i2c.h> -#include <linux/serial_core.h> -#include <linux/serial_s3c.h> -#include <linux/platform_device.h> -#include <linux/io.h> -#include <linux/module.h> -#include <linux/clk.h> -#include <linux/gpio.h> -#include <linux/pwm_backlight.h> -#include <linux/fb.h> -#include <linux/mmc/host.h> - -#include <video/platform_lcd.h> -#include <video/samsung_fimd.h> - -#include <asm/mach/arch.h> -#include <asm/mach/map.h> -#include <asm/irq.h> -#include <asm/mach-types.h> - -#include <mach/hardware.h> -#include <mach/map.h> -#include <mach/regs-clock.h> -#include <mach/regs-gpio.h> - -#include <plat/gpio-cfg.h> -#include <plat/clock.h> -#include <plat/devs.h> -#include <plat/cpu.h> -#include <linux/platform_data/i2c-s3c2410.h> -#include <plat/pll.h> -#include <plat/adc.h> -#include <linux/platform_data/touchscreen-s3c2410.h> -#include <plat/samsung-time.h> -#include <plat/backlight.h> -#include <plat/fb.h> -#include <plat/sdhci.h> - -#include "common.h" -#include "i2c.h" - -#define SMDK6440_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ - S3C2410_UCON_RXILEVEL | \ - S3C2410_UCON_TXIRQMODE | \ - S3C2410_UCON_RXIRQMODE | \ - S3C2410_UCON_RXFIFO_TOI | \ - S3C2443_UCON_RXERR_IRQEN) - -#define SMDK6440_ULCON_DEFAULT S3C2410_LCON_CS8 - -#define SMDK6440_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \ - S3C2440_UFCON_TXTRIG16 | \ - S3C2410_UFCON_RXTRIG8) - -static struct s3c2410_uartcfg smdk6440_uartcfgs[] __initdata = { - [0] = { - .hwport = 0, - .flags = 0, - .ucon = SMDK6440_UCON_DEFAULT, - .ulcon = SMDK6440_ULCON_DEFAULT, - .ufcon = SMDK6440_UFCON_DEFAULT, - }, - [1] = { - .hwport = 1, - .flags = 0, - .ucon = SMDK6440_UCON_DEFAULT, - .ulcon = SMDK6440_ULCON_DEFAULT, - .ufcon = SMDK6440_UFCON_DEFAULT, - }, - [2] = { - .hwport = 2, - .flags = 0, - .ucon = SMDK6440_UCON_DEFAULT, - .ulcon = SMDK6440_ULCON_DEFAULT, - .ufcon = SMDK6440_UFCON_DEFAULT, - }, - [3] = { - .hwport = 3, - .flags = 0, - .ucon = SMDK6440_UCON_DEFAULT, - .ulcon = SMDK6440_ULCON_DEFAULT, - .ufcon = SMDK6440_UFCON_DEFAULT, - }, -}; - -/* Frame Buffer */ -static struct s3c_fb_pd_win smdk6440_fb_win0 = { - .max_bpp = 32, - .default_bpp = 24, - .xres = 800, - .yres = 480, -}; - -static struct fb_videomode smdk6440_lcd_timing = { - .left_margin = 8, - .right_margin = 13, - .upper_margin = 7, - .lower_margin = 5, - .hsync_len = 3, - .vsync_len = 1, - .xres = 800, - .yres = 480, -}; - -static struct s3c_fb_platdata smdk6440_lcd_pdata __initdata = { - .win[0] = &smdk6440_fb_win0, - .vtiming = &smdk6440_lcd_timing, - .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB, - .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC, - .setup_gpio = s5p64x0_fb_gpio_setup_24bpp, -}; - -/* LCD power controller */ -static void smdk6440_lte480_reset_power(struct plat_lcd_data *pd, - unsigned int power) -{ - int err; - - if (power) { - err = gpio_request(S5P6440_GPN(5), "GPN"); - if (err) { - printk(KERN_ERR "failed to request GPN for lcd reset\n"); - return; - } - - gpio_direction_output(S5P6440_GPN(5), 1); - gpio_set_value(S5P6440_GPN(5), 0); - gpio_set_value(S5P6440_GPN(5), 1); - gpio_free(S5P6440_GPN(5)); - } -} - -static struct plat_lcd_data smdk6440_lcd_power_data = { - .set_power = smdk6440_lte480_reset_power, -}; - -static struct platform_device smdk6440_lcd_lte480wv = { - .name = "platform-lcd", - .dev.parent = &s3c_device_fb.dev, - .dev.platform_data = &smdk6440_lcd_power_data, -}; - -static struct platform_device *smdk6440_devices[] __initdata = { - &s3c_device_adc, - &s3c_device_rtc, - &s3c_device_i2c0, - &s3c_device_i2c1, - &samsung_device_pwm, - &s3c_device_ts, - &s3c_device_wdt, - &s5p6440_device_iis, - &s3c_device_fb, - &smdk6440_lcd_lte480wv, - &s3c_device_hsmmc0, - &s3c_device_hsmmc1, - &s3c_device_hsmmc2, -}; - -static struct s3c_sdhci_platdata smdk6440_hsmmc0_pdata __initdata = { - .cd_type = S3C_SDHCI_CD_NONE, -}; - -static struct s3c_sdhci_platdata smdk6440_hsmmc1_pdata __initdata = { - .cd_type = S3C_SDHCI_CD_INTERNAL, -#if defined(CONFIG_S5P64X0_SD_CH1_8BIT) - .max_width = 8, - .host_caps = MMC_CAP_8_BIT_DATA, -#endif -}; - -static struct s3c_sdhci_platdata smdk6440_hsmmc2_pdata __initdata = { - .cd_type = S3C_SDHCI_CD_NONE, -}; - -static struct s3c2410_platform_i2c s5p6440_i2c0_data __initdata = { - .flags = 0, - .slave_addr = 0x10, - .frequency = 100*1000, - .sda_delay = 100, - .cfg_gpio = s5p6440_i2c0_cfg_gpio, -}; - -static struct s3c2410_platform_i2c s5p6440_i2c1_data __initdata = { - .flags = 0, - .bus_num = 1, - .slave_addr = 0x10, - .frequency = 100*1000, - .sda_delay = 100, - .cfg_gpio = s5p6440_i2c1_cfg_gpio, -}; - -static struct i2c_board_info smdk6440_i2c_devs0[] __initdata = { - { I2C_BOARD_INFO("24c08", 0x50), }, - { I2C_BOARD_INFO("wm8580", 0x1b), }, -}; - -static struct i2c_board_info smdk6440_i2c_devs1[] __initdata = { - /* To be populated */ -}; - -/* LCD Backlight data */ -static struct samsung_bl_gpio_info smdk6440_bl_gpio_info = { - .no = S5P6440_GPF(15), - .func = S3C_GPIO_SFN(2), -}; - -static struct platform_pwm_backlight_data smdk6440_bl_data = { - .pwm_id = 1, - .enable_gpio = -1, -}; - -static void __init smdk6440_map_io(void) -{ - s5p64x0_init_io(NULL, 0); - s3c24xx_init_clocks(12000000); - s3c24xx_init_uarts(smdk6440_uartcfgs, ARRAY_SIZE(smdk6440_uartcfgs)); - samsung_set_timer_source(SAMSUNG_PWM3, SAMSUNG_PWM4); -} - -static void s5p6440_set_lcd_interface(void) -{ - unsigned int cfg; - - /* select TFT LCD type (RGB I/F) */ - cfg = __raw_readl(S5P64X0_SPCON0); - cfg &= ~S5P64X0_SPCON0_LCD_SEL_MASK; - cfg |= S5P64X0_SPCON0_LCD_SEL_RGB; - __raw_writel(cfg, S5P64X0_SPCON0); -} - -static void __init smdk6440_machine_init(void) -{ - s3c24xx_ts_set_platdata(NULL); - - s3c_i2c0_set_platdata(&s5p6440_i2c0_data); - s3c_i2c1_set_platdata(&s5p6440_i2c1_data); - i2c_register_board_info(0, smdk6440_i2c_devs0, - ARRAY_SIZE(smdk6440_i2c_devs0)); - i2c_register_board_info(1, smdk6440_i2c_devs1, - ARRAY_SIZE(smdk6440_i2c_devs1)); - - s5p6440_set_lcd_interface(); - s3c_fb_set_platdata(&smdk6440_lcd_pdata); - - s3c_sdhci0_set_platdata(&smdk6440_hsmmc0_pdata); - s3c_sdhci1_set_platdata(&smdk6440_hsmmc1_pdata); - s3c_sdhci2_set_platdata(&smdk6440_hsmmc2_pdata); - - platform_add_devices(smdk6440_devices, ARRAY_SIZE(smdk6440_devices)); - - samsung_bl_set(&smdk6440_bl_gpio_info, &smdk6440_bl_data); -} - -MACHINE_START(SMDK6440, "SMDK6440") - /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */ - .atag_offset = 0x100, - - .init_irq = s5p6440_init_irq, - .map_io = smdk6440_map_io, - .init_machine = smdk6440_machine_init, - .init_time = samsung_timer_init, - .restart = s5p64x0_restart, -MACHINE_END diff --git a/arch/arm/mach-s5p64x0/mach-smdk6450.c b/arch/arm/mach-s5p64x0/mach-smdk6450.c deleted file mode 100644 index fa1341c074ca..000000000000 --- a/arch/arm/mach-s5p64x0/mach-smdk6450.c +++ /dev/null @@ -1,299 +0,0 @@ -/* linux/arch/arm/mach-s5p64x0/mach-smdk6450.c - * - * Copyright (c) 2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#include <linux/kernel.h> -#include <linux/types.h> -#include <linux/interrupt.h> -#include <linux/list.h> -#include <linux/timer.h> -#include <linux/delay.h> -#include <linux/init.h> -#include <linux/i2c.h> -#include <linux/serial_core.h> -#include <linux/serial_s3c.h> -#include <linux/platform_device.h> -#include <linux/io.h> -#include <linux/module.h> -#include <linux/clk.h> -#include <linux/gpio.h> -#include <linux/pwm_backlight.h> -#include <linux/fb.h> -#include <linux/mmc/host.h> - -#include <video/platform_lcd.h> -#include <video/samsung_fimd.h> - -#include <asm/mach/arch.h> -#include <asm/mach/map.h> -#include <asm/irq.h> -#include <asm/mach-types.h> - -#include <mach/hardware.h> -#include <mach/map.h> -#include <mach/regs-clock.h> -#include <mach/regs-gpio.h> - -#include <plat/gpio-cfg.h> -#include <plat/clock.h> -#include <plat/devs.h> -#include <plat/cpu.h> -#include <linux/platform_data/i2c-s3c2410.h> -#include <plat/pll.h> -#include <plat/adc.h> -#include <linux/platform_data/touchscreen-s3c2410.h> -#include <plat/samsung-time.h> -#include <plat/backlight.h> -#include <plat/fb.h> -#include <plat/sdhci.h> - -#include "common.h" -#include "i2c.h" - -#define SMDK6450_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ - S3C2410_UCON_RXILEVEL | \ - S3C2410_UCON_TXIRQMODE | \ - S3C2410_UCON_RXIRQMODE | \ - S3C2410_UCON_RXFIFO_TOI | \ - S3C2443_UCON_RXERR_IRQEN) - -#define SMDK6450_ULCON_DEFAULT S3C2410_LCON_CS8 - -#define SMDK6450_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \ - S3C2440_UFCON_TXTRIG16 | \ - S3C2410_UFCON_RXTRIG8) - -static struct s3c2410_uartcfg smdk6450_uartcfgs[] __initdata = { - [0] = { - .hwport = 0, - .flags = 0, - .ucon = SMDK6450_UCON_DEFAULT, - .ulcon = SMDK6450_ULCON_DEFAULT, - .ufcon = SMDK6450_UFCON_DEFAULT, - }, - [1] = { - .hwport = 1, - .flags = 0, - .ucon = SMDK6450_UCON_DEFAULT, - .ulcon = SMDK6450_ULCON_DEFAULT, - .ufcon = SMDK6450_UFCON_DEFAULT, - }, - [2] = { - .hwport = 2, - .flags = 0, - .ucon = SMDK6450_UCON_DEFAULT, - .ulcon = SMDK6450_ULCON_DEFAULT, - .ufcon = SMDK6450_UFCON_DEFAULT, - }, - [3] = { - .hwport = 3, - .flags = 0, - .ucon = SMDK6450_UCON_DEFAULT, - .ulcon = SMDK6450_ULCON_DEFAULT, - .ufcon = SMDK6450_UFCON_DEFAULT, - }, -#if CONFIG_SERIAL_SAMSUNG_UARTS > 4 - [4] = { - .hwport = 4, - .flags = 0, - .ucon = SMDK6450_UCON_DEFAULT, - .ulcon = SMDK6450_ULCON_DEFAULT, - .ufcon = SMDK6450_UFCON_DEFAULT, - }, -#endif -#if CONFIG_SERIAL_SAMSUNG_UARTS > 5 - [5] = { - .hwport = 5, - .flags = 0, - .ucon = SMDK6450_UCON_DEFAULT, - .ulcon = SMDK6450_ULCON_DEFAULT, - .ufcon = SMDK6450_UFCON_DEFAULT, - }, -#endif -}; - -/* Frame Buffer */ -static struct s3c_fb_pd_win smdk6450_fb_win0 = { - .max_bpp = 32, - .default_bpp = 24, - .xres = 800, - .yres = 480, -}; - -static struct fb_videomode smdk6450_lcd_timing = { - .left_margin = 8, - .right_margin = 13, - .upper_margin = 7, - .lower_margin = 5, - .hsync_len = 3, - .vsync_len = 1, - .xres = 800, - .yres = 480, -}; - -static struct s3c_fb_platdata smdk6450_lcd_pdata __initdata = { - .win[0] = &smdk6450_fb_win0, - .vtiming = &smdk6450_lcd_timing, - .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB, - .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC, - .setup_gpio = s5p64x0_fb_gpio_setup_24bpp, -}; - -/* LCD power controller */ -static void smdk6450_lte480_reset_power(struct plat_lcd_data *pd, - unsigned int power) -{ - int err; - - if (power) { - err = gpio_request(S5P6450_GPN(5), "GPN"); - if (err) { - printk(KERN_ERR "failed to request GPN for lcd reset\n"); - return; - } - - gpio_direction_output(S5P6450_GPN(5), 1); - gpio_set_value(S5P6450_GPN(5), 0); - gpio_set_value(S5P6450_GPN(5), 1); - gpio_free(S5P6450_GPN(5)); - } -} - -static struct plat_lcd_data smdk6450_lcd_power_data = { - .set_power = smdk6450_lte480_reset_power, -}; - -static struct platform_device smdk6450_lcd_lte480wv = { - .name = "platform-lcd", - .dev.parent = &s3c_device_fb.dev, - .dev.platform_data = &smdk6450_lcd_power_data, -}; - -static struct platform_device *smdk6450_devices[] __initdata = { - &s3c_device_adc, - &s3c_device_rtc, - &s3c_device_i2c0, - &s3c_device_i2c1, - &samsung_device_pwm, - &s3c_device_ts, - &s3c_device_wdt, - &s5p6450_device_iis0, - &s3c_device_fb, - &smdk6450_lcd_lte480wv, - &s3c_device_hsmmc0, - &s3c_device_hsmmc1, - &s3c_device_hsmmc2, - /* s5p6450_device_spi0 will be added */ -}; - -static struct s3c_sdhci_platdata smdk6450_hsmmc0_pdata __initdata = { - .cd_type = S3C_SDHCI_CD_NONE, -}; - -static struct s3c_sdhci_platdata smdk6450_hsmmc1_pdata __initdata = { - .cd_type = S3C_SDHCI_CD_NONE, -#if defined(CONFIG_S5P64X0_SD_CH1_8BIT) - .max_width = 8, - .host_caps = MMC_CAP_8_BIT_DATA, -#endif -}; - -static struct s3c_sdhci_platdata smdk6450_hsmmc2_pdata __initdata = { - .cd_type = S3C_SDHCI_CD_NONE, -}; - -static struct s3c2410_platform_i2c s5p6450_i2c0_data __initdata = { - .flags = 0, - .slave_addr = 0x10, - .frequency = 100*1000, - .sda_delay = 100, - .cfg_gpio = s5p6450_i2c0_cfg_gpio, -}; - -static struct s3c2410_platform_i2c s5p6450_i2c1_data __initdata = { - .flags = 0, - .bus_num = 1, - .slave_addr = 0x10, - .frequency = 100*1000, - .sda_delay = 100, - .cfg_gpio = s5p6450_i2c1_cfg_gpio, -}; - -static struct i2c_board_info smdk6450_i2c_devs0[] __initdata = { - { I2C_BOARD_INFO("wm8580", 0x1b), }, - { I2C_BOARD_INFO("24c08", 0x50), }, /* Samsung KS24C080C EEPROM */ -}; - -static struct i2c_board_info smdk6450_i2c_devs1[] __initdata = { - { I2C_BOARD_INFO("24c128", 0x57), },/* Samsung S524AD0XD1 EEPROM */ -}; - -/* LCD Backlight data */ -static struct samsung_bl_gpio_info smdk6450_bl_gpio_info = { - .no = S5P6450_GPF(15), - .func = S3C_GPIO_SFN(2), -}; - -static struct platform_pwm_backlight_data smdk6450_bl_data = { - .pwm_id = 1, - .enable_gpio = -1, -}; - -static void __init smdk6450_map_io(void) -{ - s5p64x0_init_io(NULL, 0); - s3c24xx_init_clocks(19200000); - s3c24xx_init_uarts(smdk6450_uartcfgs, ARRAY_SIZE(smdk6450_uartcfgs)); - samsung_set_timer_source(SAMSUNG_PWM3, SAMSUNG_PWM4); -} - -static void s5p6450_set_lcd_interface(void) -{ - unsigned int cfg; - - /* select TFT LCD type (RGB I/F) */ - cfg = __raw_readl(S5P64X0_SPCON0); - cfg &= ~S5P64X0_SPCON0_LCD_SEL_MASK; - cfg |= S5P64X0_SPCON0_LCD_SEL_RGB; - __raw_writel(cfg, S5P64X0_SPCON0); -} - -static void __init smdk6450_machine_init(void) -{ - s3c24xx_ts_set_platdata(NULL); - - s3c_i2c0_set_platdata(&s5p6450_i2c0_data); - s3c_i2c1_set_platdata(&s5p6450_i2c1_data); - i2c_register_board_info(0, smdk6450_i2c_devs0, - ARRAY_SIZE(smdk6450_i2c_devs0)); - i2c_register_board_info(1, smdk6450_i2c_devs1, - ARRAY_SIZE(smdk6450_i2c_devs1)); - - s5p6450_set_lcd_interface(); - s3c_fb_set_platdata(&smdk6450_lcd_pdata); - - s3c_sdhci0_set_platdata(&smdk6450_hsmmc0_pdata); - s3c_sdhci1_set_platdata(&smdk6450_hsmmc1_pdata); - s3c_sdhci2_set_platdata(&smdk6450_hsmmc2_pdata); - - platform_add_devices(smdk6450_devices, ARRAY_SIZE(smdk6450_devices)); - - samsung_bl_set(&smdk6450_bl_gpio_info, &smdk6450_bl_data); -} - -MACHINE_START(SMDK6450, "SMDK6450") - /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */ - .atag_offset = 0x100, - - .init_irq = s5p6450_init_irq, - .map_io = smdk6450_map_io, - .init_machine = smdk6450_machine_init, - .init_time = samsung_timer_init, - .restart = s5p64x0_restart, -MACHINE_END diff --git a/arch/arm/mach-s5p64x0/pm.c b/arch/arm/mach-s5p64x0/pm.c deleted file mode 100644 index ec8229cee716..000000000000 --- a/arch/arm/mach-s5p64x0/pm.c +++ /dev/null @@ -1,202 +0,0 @@ -/* linux/arch/arm/mach-s5p64x0/pm.c - * - * Copyright (c) 2011 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * S5P64X0 Power Management Support - * - * Based on arch/arm/mach-s3c64xx/pm.c by Ben Dooks - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#include <linux/suspend.h> -#include <linux/syscore_ops.h> -#include <linux/io.h> - -#include <plat/cpu.h> -#include <plat/pm.h> -#include <plat/wakeup-mask.h> - -#include <mach/regs-clock.h> -#include <mach/regs-gpio.h> - -static struct sleep_save s5p64x0_core_save[] = { - SAVE_ITEM(S5P64X0_APLL_CON), - SAVE_ITEM(S5P64X0_MPLL_CON), - SAVE_ITEM(S5P64X0_EPLL_CON), - SAVE_ITEM(S5P64X0_EPLL_CON_K), - SAVE_ITEM(S5P64X0_CLK_SRC0), - SAVE_ITEM(S5P64X0_CLK_SRC1), - SAVE_ITEM(S5P64X0_CLK_DIV0), - SAVE_ITEM(S5P64X0_CLK_DIV1), - SAVE_ITEM(S5P64X0_CLK_DIV2), - SAVE_ITEM(S5P64X0_CLK_DIV3), - SAVE_ITEM(S5P64X0_CLK_GATE_MEM0), - SAVE_ITEM(S5P64X0_CLK_GATE_HCLK1), - SAVE_ITEM(S5P64X0_CLK_GATE_SCLK1), -}; - -static struct sleep_save s5p64x0_misc_save[] = { - SAVE_ITEM(S5P64X0_AHB_CON0), - SAVE_ITEM(S5P64X0_SPCON0), - SAVE_ITEM(S5P64X0_SPCON1), - SAVE_ITEM(S5P64X0_MEM0CONSLP0), - SAVE_ITEM(S5P64X0_MEM0CONSLP1), - SAVE_ITEM(S5P64X0_MEM0DRVCON), - SAVE_ITEM(S5P64X0_MEM1DRVCON), -}; - -/* DPLL is present only in S5P6450 */ -static struct sleep_save s5p6450_core_save[] = { - SAVE_ITEM(S5P6450_DPLL_CON), - SAVE_ITEM(S5P6450_DPLL_CON_K), -}; - -void s3c_pm_configure_extint(void) -{ - __raw_writel(s3c_irqwake_eintmask, S5P64X0_EINT_WAKEUP_MASK); -} - -void s3c_pm_restore_core(void) -{ - __raw_writel(0, S5P64X0_EINT_WAKEUP_MASK); - - s3c_pm_do_restore_core(s5p64x0_core_save, - ARRAY_SIZE(s5p64x0_core_save)); - - if (soc_is_s5p6450()) - s3c_pm_do_restore_core(s5p6450_core_save, - ARRAY_SIZE(s5p6450_core_save)); - - s3c_pm_do_restore(s5p64x0_misc_save, ARRAY_SIZE(s5p64x0_misc_save)); -} - -void s3c_pm_save_core(void) -{ - s3c_pm_do_save(s5p64x0_misc_save, ARRAY_SIZE(s5p64x0_misc_save)); - - if (soc_is_s5p6450()) - s3c_pm_do_save(s5p6450_core_save, - ARRAY_SIZE(s5p6450_core_save)); - - s3c_pm_do_save(s5p64x0_core_save, ARRAY_SIZE(s5p64x0_core_save)); -} - -static int s5p64x0_cpu_suspend(unsigned long arg) -{ - unsigned long tmp = 0; - - /* - * Issue the standby signal into the pm unit. Note, we - * issue a write-buffer drain just in case. - */ - asm("b 1f\n\t" - ".align 5\n\t" - "1:\n\t" - "mcr p15, 0, %0, c7, c10, 5\n\t" - "mcr p15, 0, %0, c7, c10, 4\n\t" - "mcr p15, 0, %0, c7, c0, 4" : : "r" (tmp)); - - pr_info("Failed to suspend the system\n"); - return 1; /* Aborting suspend */ -} - -/* mapping of interrupts to parts of the wakeup mask */ -static struct samsung_wakeup_mask s5p64x0_wake_irqs[] = { - { .irq = IRQ_RTC_ALARM, .bit = S5P64X0_PWR_CFG_RTC_ALRM_DISABLE, }, - { .irq = IRQ_RTC_TIC, .bit = S5P64X0_PWR_CFG_RTC_TICK_DISABLE, }, - { .irq = IRQ_HSMMC0, .bit = S5P64X0_PWR_CFG_MMC0_DISABLE, }, - { .irq = IRQ_HSMMC1, .bit = S5P64X0_PWR_CFG_MMC1_DISABLE, }, -}; - -static void s5p64x0_pm_prepare(void) -{ - u32 tmp; - - samsung_sync_wakemask(S5P64X0_PWR_CFG, - s5p64x0_wake_irqs, ARRAY_SIZE(s5p64x0_wake_irqs)); - - /* store the resume address in INFORM0 register */ - __raw_writel(virt_to_phys(s3c_cpu_resume), S5P64X0_INFORM0); - - /* setup clock gating for FIMGVG block */ - __raw_writel((__raw_readl(S5P64X0_CLK_GATE_HCLK1) | \ - (S5P64X0_CLK_GATE_HCLK1_FIMGVG)), S5P64X0_CLK_GATE_HCLK1); - __raw_writel((__raw_readl(S5P64X0_CLK_GATE_SCLK1) | \ - (S5P64X0_CLK_GATE_SCLK1_FIMGVG)), S5P64X0_CLK_GATE_SCLK1); - - /* Configure the stabilization counter with wait time required */ - __raw_writel(S5P64X0_PWR_STABLE_PWR_CNT_VAL4, S5P64X0_PWR_STABLE); - - /* set WFI to SLEEP mode configuration */ - tmp = __raw_readl(S5P64X0_SLEEP_CFG); - tmp &= ~(S5P64X0_SLEEP_CFG_OSC_EN); - __raw_writel(tmp, S5P64X0_SLEEP_CFG); - - tmp = __raw_readl(S5P64X0_PWR_CFG); - tmp &= ~(S5P64X0_PWR_CFG_WFI_MASK); - tmp |= S5P64X0_PWR_CFG_WFI_SLEEP; - __raw_writel(tmp, S5P64X0_PWR_CFG); - - /* - * set OTHERS register to disable interrupt before going to - * sleep. This bit is present only in S5P6450, it is reserved - * in S5P6440. - */ - if (soc_is_s5p6450()) { - tmp = __raw_readl(S5P64X0_OTHERS); - tmp |= S5P6450_OTHERS_DISABLE_INT; - __raw_writel(tmp, S5P64X0_OTHERS); - } - - /* ensure previous wakeup state is cleared before sleeping */ - __raw_writel(__raw_readl(S5P64X0_WAKEUP_STAT), S5P64X0_WAKEUP_STAT); - -} - -static int s5p64x0_pm_add(struct device *dev, struct subsys_interface *sif) -{ - pm_cpu_prep = s5p64x0_pm_prepare; - pm_cpu_sleep = s5p64x0_cpu_suspend; - - return 0; -} - -static struct subsys_interface s5p64x0_pm_interface = { - .name = "s5p64x0_pm", - .subsys = &s5p64x0_subsys, - .add_dev = s5p64x0_pm_add, -}; - -static __init int s5p64x0_pm_drvinit(void) -{ - s3c_pm_init(); - - return subsys_interface_register(&s5p64x0_pm_interface); -} -arch_initcall(s5p64x0_pm_drvinit); - -static void s5p64x0_pm_resume(void) -{ - u32 tmp; - - tmp = __raw_readl(S5P64X0_OTHERS); - tmp |= (S5P64X0_OTHERS_RET_MMC0 | S5P64X0_OTHERS_RET_MMC1 | \ - S5P64X0_OTHERS_RET_UART); - __raw_writel(tmp , S5P64X0_OTHERS); -} - -static struct syscore_ops s5p64x0_pm_syscore_ops = { - .resume = s5p64x0_pm_resume, -}; - -static __init int s5p64x0_pm_syscore_init(void) -{ - register_syscore_ops(&s5p64x0_pm_syscore_ops); - - return 0; -} -arch_initcall(s5p64x0_pm_syscore_init); diff --git a/arch/arm/mach-s5p64x0/setup-fb-24bpp.c b/arch/arm/mach-s5p64x0/setup-fb-24bpp.c deleted file mode 100644 index f346ee4af54d..000000000000 --- a/arch/arm/mach-s5p64x0/setup-fb-24bpp.c +++ /dev/null @@ -1,29 +0,0 @@ -/* linux/arch/arm/mach-s5p64x0/setup-fb-24bpp.c - * - * Copyright (c) 2011 Samsung Electronics Co., Ltd. - * http://www.samsung.com/ - * - * Base S5P64X0 GPIO setup information for LCD framebuffer - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#include <linux/fb.h> -#include <linux/gpio.h> - -#include <plat/cpu.h> -#include <plat/fb.h> -#include <plat/gpio-cfg.h> - -void s5p64x0_fb_gpio_setup_24bpp(void) -{ - if (soc_is_s5p6440()) { - s3c_gpio_cfgrange_nopull(S5P6440_GPI(0), 16, S3C_GPIO_SFN(2)); - s3c_gpio_cfgrange_nopull(S5P6440_GPJ(0), 12, S3C_GPIO_SFN(2)); - } else if (soc_is_s5p6450()) { - s3c_gpio_cfgrange_nopull(S5P6450_GPI(0), 16, S3C_GPIO_SFN(2)); - s3c_gpio_cfgrange_nopull(S5P6450_GPJ(0), 12, S3C_GPIO_SFN(2)); - } -} diff --git a/arch/arm/mach-s5p64x0/setup-i2c0.c b/arch/arm/mach-s5p64x0/setup-i2c0.c deleted file mode 100644 index 569b76ac98cb..000000000000 --- a/arch/arm/mach-s5p64x0/setup-i2c0.c +++ /dev/null @@ -1,38 +0,0 @@ -/* linux/arch/arm/mach-s5p64x0/setup-i2c0.c - * - * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * I2C0 GPIO configuration. - * - * Based on plat-s3c64x0/setup-i2c0.c - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#include <linux/kernel.h> -#include <linux/types.h> -#include <linux/gpio.h> - -struct platform_device; /* don't need the contents */ - -#include <plat/gpio-cfg.h> -#include <linux/platform_data/i2c-s3c2410.h> - -#include "i2c.h" - -void s5p6440_i2c0_cfg_gpio(struct platform_device *dev) -{ - s3c_gpio_cfgall_range(S5P6440_GPB(5), 2, - S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP); -} - -void s5p6450_i2c0_cfg_gpio(struct platform_device *dev) -{ - s3c_gpio_cfgall_range(S5P6450_GPB(5), 2, - S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP); -} - -void s3c_i2c0_cfg_gpio(struct platform_device *dev) { } diff --git a/arch/arm/mach-s5p64x0/setup-i2c1.c b/arch/arm/mach-s5p64x0/setup-i2c1.c deleted file mode 100644 index 867374e6d0bc..000000000000 --- a/arch/arm/mach-s5p64x0/setup-i2c1.c +++ /dev/null @@ -1,38 +0,0 @@ -/* linux/arch/arm/mach-s5p64xx/setup-i2c1.c - * - * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * I2C1 GPIO configuration. - * - * Based on plat-s3c64xx/setup-i2c0.c - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#include <linux/kernel.h> -#include <linux/types.h> -#include <linux/gpio.h> - -struct platform_device; /* don't need the contents */ - -#include <plat/gpio-cfg.h> -#include <linux/platform_data/i2c-s3c2410.h> - -#include "i2c.h" - -void s5p6440_i2c1_cfg_gpio(struct platform_device *dev) -{ - s3c_gpio_cfgall_range(S5P6440_GPR(9), 2, - S3C_GPIO_SFN(6), S3C_GPIO_PULL_UP); -} - -void s5p6450_i2c1_cfg_gpio(struct platform_device *dev) -{ - s3c_gpio_cfgall_range(S5P6450_GPR(9), 2, - S3C_GPIO_SFN(6), S3C_GPIO_PULL_UP); -} - -void s3c_i2c1_cfg_gpio(struct platform_device *dev) { } diff --git a/arch/arm/mach-s5p64x0/setup-sdhci-gpio.c b/arch/arm/mach-s5p64x0/setup-sdhci-gpio.c deleted file mode 100644 index 8410af0d12bf..000000000000 --- a/arch/arm/mach-s5p64x0/setup-sdhci-gpio.c +++ /dev/null @@ -1,104 +0,0 @@ -/* linux/arch/arm/mach-s5p64x0/setup-sdhci-gpio.c - * - * Copyright (c) 2011 Samsung Electronics Co., Ltd. - * http://www.samsung.com/ - * - * S5P64X0 - Helper functions for setting up SDHCI device(s) GPIO (HSMMC) - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#include <linux/platform_device.h> -#include <linux/io.h> -#include <linux/gpio.h> - -#include <mach/regs-gpio.h> -#include <mach/regs-clock.h> - -#include <plat/gpio-cfg.h> -#include <plat/sdhci.h> -#include <plat/cpu.h> - -void s5p64x0_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width) -{ - struct s3c_sdhci_platdata *pdata = dev->dev.platform_data; - - /* Set all the necessary GPG pins to special-function 2 */ - if (soc_is_s5p6450()) - s3c_gpio_cfgrange_nopull(S5P6450_GPG(0), 2 + width, - S3C_GPIO_SFN(2)); - else - s3c_gpio_cfgrange_nopull(S5P6440_GPG(0), 2 + width, - S3C_GPIO_SFN(2)); - - /* Set GPG[6] pin to special-function 2 - MMC0 CDn */ - if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) { - if (soc_is_s5p6450()) { - s3c_gpio_setpull(S5P6450_GPG(6), S3C_GPIO_PULL_UP); - s3c_gpio_cfgpin(S5P6450_GPG(6), S3C_GPIO_SFN(2)); - } else { - s3c_gpio_setpull(S5P6440_GPG(6), S3C_GPIO_PULL_UP); - s3c_gpio_cfgpin(S5P6440_GPG(6), S3C_GPIO_SFN(2)); - } - } -} - -void s5p64x0_setup_sdhci1_cfg_gpio(struct platform_device *dev, int width) -{ - struct s3c_sdhci_platdata *pdata = dev->dev.platform_data; - - /* Set GPH[0:1] pins to special-function 2 - CLK and CMD */ - if (soc_is_s5p6450()) - s3c_gpio_cfgrange_nopull(S5P6450_GPH(0), 2, S3C_GPIO_SFN(2)); - else - s3c_gpio_cfgrange_nopull(S5P6440_GPH(0), 2 , S3C_GPIO_SFN(2)); - - switch (width) { - case 8: - /* Set data pins GPH[6:9] special-function 2 */ - if (soc_is_s5p6450()) - s3c_gpio_cfgrange_nopull(S5P6450_GPH(6), 4, - S3C_GPIO_SFN(2)); - else - s3c_gpio_cfgrange_nopull(S5P6440_GPH(6), 4, - S3C_GPIO_SFN(2)); - case 4: - /* set data pins GPH[2:5] special-function 2 */ - if (soc_is_s5p6450()) - s3c_gpio_cfgrange_nopull(S5P6450_GPH(2), 4, - S3C_GPIO_SFN(2)); - else - s3c_gpio_cfgrange_nopull(S5P6440_GPH(2), 4, - S3C_GPIO_SFN(2)); - default: - break; - } - - /* Set GPG[6] pin to special-funtion 3 : MMC1 CDn */ - if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) { - if (soc_is_s5p6450()) { - s3c_gpio_setpull(S5P6450_GPG(6), S3C_GPIO_PULL_UP); - s3c_gpio_cfgpin(S5P6450_GPG(6), S3C_GPIO_SFN(3)); - } else { - s3c_gpio_setpull(S5P6440_GPG(6), S3C_GPIO_PULL_UP); - s3c_gpio_cfgpin(S5P6440_GPG(6), S3C_GPIO_SFN(3)); - } - } -} - -void s5p6440_setup_sdhci2_cfg_gpio(struct platform_device *dev, int width) -{ - /* Set GPC[4:5] pins to special-function 3 - CLK and CMD */ - s3c_gpio_cfgrange_nopull(S5P6440_GPC(4), 2, S3C_GPIO_SFN(3)); - - /* Set data pins GPH[6:9] pins to special-function 3 */ - s3c_gpio_cfgrange_nopull(S5P6440_GPH(6), 4, S3C_GPIO_SFN(3)); -} - -void s5p6450_setup_sdhci2_cfg_gpio(struct platform_device *dev, int width) -{ - /* Set all the necessary GPG pins to special-function 3 */ - s3c_gpio_cfgrange_nopull(S5P6450_GPG(7), 2 + width, S3C_GPIO_SFN(3)); -} diff --git a/arch/arm/mach-s5p64x0/setup-spi.c b/arch/arm/mach-s5p64x0/setup-spi.c deleted file mode 100644 index 7664356720ca..000000000000 --- a/arch/arm/mach-s5p64x0/setup-spi.c +++ /dev/null @@ -1,38 +0,0 @@ -/* linux/arch/arm/mach-s5p64x0/setup-spi.c - * - * Copyright (C) 2011 Samsung Electronics Ltd. - * http://www.samsung.com/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include <linux/gpio.h> -#include <plat/gpio-cfg.h> - -#ifdef CONFIG_S3C64XX_DEV_SPI0 -int s3c64xx_spi0_cfg_gpio(void) -{ - if (soc_is_s5p6450()) - s3c_gpio_cfgall_range(S5P6450_GPC(0), 3, - S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP); - else - s3c_gpio_cfgall_range(S5P6440_GPC(0), 3, - S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP); - return 0; -} -#endif - -#ifdef CONFIG_S3C64XX_DEV_SPI1 -int s3c64xx_spi1_cfg_gpio(void) -{ - if (soc_is_s5p6450()) - s3c_gpio_cfgall_range(S5P6450_GPC(4), 3, - S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP); - else - s3c_gpio_cfgall_range(S5P6440_GPC(4), 3, - S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP); - return 0; -} -#endif diff --git a/arch/arm/mach-s5pc100/Kconfig b/arch/arm/mach-s5pc100/Kconfig deleted file mode 100644 index c5e3a969b063..000000000000 --- a/arch/arm/mach-s5pc100/Kconfig +++ /dev/null @@ -1,81 +0,0 @@ -# Copyright 2009 Samsung Electronics Co. -# Byungho Min <bhmin@samsung.com> -# -# Licensed under GPLv2 - -# Configuration options for the S5PC100 CPU - -if ARCH_S5PC100 - -config CPU_S5PC100 - bool - select ARM_AMBA - select PL330_DMA if DMADEVICES - select S5P_EXT_INT - help - Enable S5PC100 CPU support - -config S5PC100_SETUP_FB_24BPP - bool - help - Common setup code for S5PC1XX with an 24bpp RGB display helper. - -config S5PC100_SETUP_I2C1 - bool - help - Common setup code for i2c bus 1. - -config S5PC100_SETUP_IDE - bool - help - Common setup code for S5PC100 IDE GPIO configurations - -config S5PC100_SETUP_KEYPAD - bool - help - Common setup code for KEYPAD GPIO configurations. - -config S5PC100_SETUP_SDHCI - bool - select S5PC100_SETUP_SDHCI_GPIO - help - Internal helper functions for S5PC100 based SDHCI systems - -config S5PC100_SETUP_SDHCI_GPIO - bool - help - Common setup code for SDHCI gpio. - -config S5PC100_SETUP_SPI - bool - help - Common setup code for SPI GPIO configurations. - -config MACH_SMDKC100 - bool "SMDKC100" - select CPU_S5PC100 - select S3C_DEV_FB - select S3C_DEV_HSMMC - select S3C_DEV_HSMMC1 - select S3C_DEV_HSMMC2 - select S3C_DEV_I2C1 - select S3C_DEV_RTC - select S3C_DEV_WDT - select S5PC100_SETUP_FB_24BPP - select S5PC100_SETUP_I2C1 - select S5PC100_SETUP_IDE - select S5PC100_SETUP_KEYPAD - select S5PC100_SETUP_SDHCI - select S5P_DEV_FIMC0 - select S5P_DEV_FIMC1 - select S5P_DEV_FIMC2 - select SAMSUNG_DEV_ADC - select SAMSUNG_DEV_BACKLIGHT - select SAMSUNG_DEV_IDE - select SAMSUNG_DEV_KEYPAD - select SAMSUNG_DEV_PWM - select SAMSUNG_DEV_TS - help - Machine support for the Samsung SMDKC100 - -endif diff --git a/arch/arm/mach-s5pc100/Makefile b/arch/arm/mach-s5pc100/Makefile deleted file mode 100644 index 118c711f74e8..000000000000 --- a/arch/arm/mach-s5pc100/Makefile +++ /dev/null @@ -1,32 +0,0 @@ -# arch/arm/mach-s5pc100/Makefile -# -# Copyright 2009 Samsung Electronics Co. -# -# Licensed under GPLv2 - -obj-y := -obj-m := -obj-n := -obj- := - -# Core - -obj-y += common.o clock.o - -obj-y += dma.o - -# machine support - -obj-$(CONFIG_MACH_SMDKC100) += mach-smdkc100.o - -# device support - -obj-y += dev-audio.o - -obj-y += setup-i2c0.o -obj-$(CONFIG_S5PC100_SETUP_FB_24BPP) += setup-fb-24bpp.o -obj-$(CONFIG_S5PC100_SETUP_I2C1) += setup-i2c1.o -obj-$(CONFIG_S5PC100_SETUP_IDE) += setup-ide.o -obj-$(CONFIG_S5PC100_SETUP_KEYPAD) += setup-keypad.o -obj-$(CONFIG_S5PC100_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o -obj-$(CONFIG_S5PC100_SETUP_SPI) += setup-spi.o diff --git a/arch/arm/mach-s5pc100/Makefile.boot b/arch/arm/mach-s5pc100/Makefile.boot deleted file mode 100644 index 79ece4055b02..000000000000 --- a/arch/arm/mach-s5pc100/Makefile.boot +++ /dev/null @@ -1,2 +0,0 @@ - zreladdr-y += 0x20008000 -params_phys-y := 0x20000100 diff --git a/arch/arm/mach-s5pc100/clock.c b/arch/arm/mach-s5pc100/clock.c deleted file mode 100644 index d0dc10ee7729..000000000000 --- a/arch/arm/mach-s5pc100/clock.c +++ /dev/null @@ -1,1361 +0,0 @@ -/* linux/arch/arm/mach-s5pc100/clock.c - * - * Copyright (c) 2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com/ - * - * S5PC100 - Clock support - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#include <linux/init.h> -#include <linux/module.h> -#include <linux/kernel.h> -#include <linux/list.h> -#include <linux/err.h> -#include <linux/clk.h> -#include <linux/io.h> - -#include <mach/map.h> - -#include <plat/cpu-freq.h> -#include <mach/regs-clock.h> -#include <plat/clock.h> -#include <plat/cpu.h> -#include <plat/pll.h> -#include <plat/s5p-clock.h> -#include <plat/clock-clksrc.h> - -#include "common.h" - -static struct clk s5p_clk_otgphy = { - .name = "otg_phy", -}; - -static struct clk dummy_apb_pclk = { - .name = "apb_pclk", - .id = -1, -}; - -static struct clk *clk_src_mout_href_list[] = { - [0] = &s5p_clk_27m, - [1] = &clk_fin_hpll, -}; - -static struct clksrc_sources clk_src_mout_href = { - .sources = clk_src_mout_href_list, - .nr_sources = ARRAY_SIZE(clk_src_mout_href_list), -}; - -static struct clksrc_clk clk_mout_href = { - .clk = { - .name = "mout_href", - }, - .sources = &clk_src_mout_href, - .reg_src = { .reg = S5P_CLK_SRC0, .shift = 20, .size = 1 }, -}; - -static struct clk *clk_src_mout_48m_list[] = { - [0] = &clk_xusbxti, - [1] = &s5p_clk_otgphy, -}; - -static struct clksrc_sources clk_src_mout_48m = { - .sources = clk_src_mout_48m_list, - .nr_sources = ARRAY_SIZE(clk_src_mout_48m_list), -}; - -static struct clksrc_clk clk_mout_48m = { - .clk = { - .name = "mout_48m", - }, - .sources = &clk_src_mout_48m, - .reg_src = { .reg = S5P_CLK_SRC1, .shift = 24, .size = 1 }, -}; - -static struct clksrc_clk clk_mout_mpll = { - .clk = { - .name = "mout_mpll", - }, - .sources = &clk_src_mpll, - .reg_src = { .reg = S5P_CLK_SRC0, .shift = 4, .size = 1 }, -}; - - -static struct clksrc_clk clk_mout_apll = { - .clk = { - .name = "mout_apll", - }, - .sources = &clk_src_apll, - .reg_src = { .reg = S5P_CLK_SRC0, .shift = 0, .size = 1 }, -}; - -static struct clksrc_clk clk_mout_epll = { - .clk = { - .name = "mout_epll", - }, - .sources = &clk_src_epll, - .reg_src = { .reg = S5P_CLK_SRC0, .shift = 8, .size = 1 }, -}; - -static struct clk *clk_src_mout_hpll_list[] = { - [0] = &s5p_clk_27m, -}; - -static struct clksrc_sources clk_src_mout_hpll = { - .sources = clk_src_mout_hpll_list, - .nr_sources = ARRAY_SIZE(clk_src_mout_hpll_list), -}; - -static struct clksrc_clk clk_mout_hpll = { - .clk = { - .name = "mout_hpll", - }, - .sources = &clk_src_mout_hpll, - .reg_src = { .reg = S5P_CLK_SRC0, .shift = 12, .size = 1 }, -}; - -static struct clksrc_clk clk_div_apll = { - .clk = { - .name = "div_apll", - .parent = &clk_mout_apll.clk, - }, - .reg_div = { .reg = S5P_CLK_DIV0, .shift = 0, .size = 1 }, -}; - -static struct clksrc_clk clk_div_arm = { - .clk = { - .name = "div_arm", - .parent = &clk_div_apll.clk, - }, - .reg_div = { .reg = S5P_CLK_DIV0, .shift = 4, .size = 3 }, -}; - -static struct clksrc_clk clk_div_d0_bus = { - .clk = { - .name = "div_d0_bus", - .parent = &clk_div_arm.clk, - }, - .reg_div = { .reg = S5P_CLK_DIV0, .shift = 8, .size = 3 }, -}; - -static struct clksrc_clk clk_div_pclkd0 = { - .clk = { - .name = "div_pclkd0", - .parent = &clk_div_d0_bus.clk, - }, - .reg_div = { .reg = S5P_CLK_DIV0, .shift = 12, .size = 3 }, -}; - -static struct clksrc_clk clk_div_secss = { - .clk = { - .name = "div_secss", - .parent = &clk_div_d0_bus.clk, - }, - .reg_div = { .reg = S5P_CLK_DIV0, .shift = 16, .size = 3 }, -}; - -static struct clksrc_clk clk_div_apll2 = { - .clk = { - .name = "div_apll2", - .parent = &clk_mout_apll.clk, - }, - .reg_div = { .reg = S5P_CLK_DIV1, .shift = 0, .size = 3 }, -}; - -static struct clk *clk_src_mout_am_list[] = { - [0] = &clk_mout_mpll.clk, - [1] = &clk_div_apll2.clk, -}; - -static struct clksrc_sources clk_src_mout_am = { - .sources = clk_src_mout_am_list, - .nr_sources = ARRAY_SIZE(clk_src_mout_am_list), -}; - -static struct clksrc_clk clk_mout_am = { - .clk = { - .name = "mout_am", - }, - .sources = &clk_src_mout_am, - .reg_src = { .reg = S5P_CLK_SRC0, .shift = 16, .size = 1 }, -}; - -static struct clksrc_clk clk_div_d1_bus = { - .clk = { - .name = "div_d1_bus", - .parent = &clk_mout_am.clk, - }, - .reg_div = { .reg = S5P_CLK_DIV1, .shift = 12, .size = 3 }, -}; - -static struct clksrc_clk clk_div_mpll2 = { - .clk = { - .name = "div_mpll2", - .parent = &clk_mout_am.clk, - }, - .reg_div = { .reg = S5P_CLK_DIV1, .shift = 8, .size = 1 }, -}; - -static struct clksrc_clk clk_div_mpll = { - .clk = { - .name = "div_mpll", - .parent = &clk_mout_am.clk, - }, - .reg_div = { .reg = S5P_CLK_DIV1, .shift = 4, .size = 2 }, -}; - -static struct clk *clk_src_mout_onenand_list[] = { - [0] = &clk_div_d0_bus.clk, - [1] = &clk_div_d1_bus.clk, -}; - -static struct clksrc_sources clk_src_mout_onenand = { - .sources = clk_src_mout_onenand_list, - .nr_sources = ARRAY_SIZE(clk_src_mout_onenand_list), -}; - -static struct clksrc_clk clk_mout_onenand = { - .clk = { - .name = "mout_onenand", - }, - .sources = &clk_src_mout_onenand, - .reg_src = { .reg = S5P_CLK_SRC0, .shift = 24, .size = 1 }, -}; - -static struct clksrc_clk clk_div_onenand = { - .clk = { - .name = "div_onenand", - .parent = &clk_mout_onenand.clk, - }, - .reg_div = { .reg = S5P_CLK_DIV1, .shift = 20, .size = 2 }, -}; - -static struct clksrc_clk clk_div_pclkd1 = { - .clk = { - .name = "div_pclkd1", - .parent = &clk_div_d1_bus.clk, - }, - .reg_div = { .reg = S5P_CLK_DIV1, .shift = 16, .size = 3 }, -}; - -static struct clksrc_clk clk_div_cam = { - .clk = { - .name = "div_cam", - .parent = &clk_div_mpll2.clk, - }, - .reg_div = { .reg = S5P_CLK_DIV1, .shift = 24, .size = 5 }, -}; - -static struct clksrc_clk clk_div_hdmi = { - .clk = { - .name = "div_hdmi", - .parent = &clk_mout_hpll.clk, - }, - .reg_div = { .reg = S5P_CLK_DIV3, .shift = 28, .size = 4 }, -}; - -static u32 epll_div[][4] = { - { 32750000, 131, 3, 4 }, - { 32768000, 131, 3, 4 }, - { 36000000, 72, 3, 3 }, - { 45000000, 90, 3, 3 }, - { 45158000, 90, 3, 3 }, - { 45158400, 90, 3, 3 }, - { 48000000, 96, 3, 3 }, - { 49125000, 131, 4, 3 }, - { 49152000, 131, 4, 3 }, - { 60000000, 120, 3, 3 }, - { 67737600, 226, 5, 3 }, - { 67738000, 226, 5, 3 }, - { 73800000, 246, 5, 3 }, - { 73728000, 246, 5, 3 }, - { 72000000, 144, 3, 3 }, - { 84000000, 168, 3, 3 }, - { 96000000, 96, 3, 2 }, - { 144000000, 144, 3, 2 }, - { 192000000, 96, 3, 1 } -}; - -static int s5pc100_epll_set_rate(struct clk *clk, unsigned long rate) -{ - unsigned int epll_con; - unsigned int i; - - if (clk->rate == rate) /* Return if nothing changed */ - return 0; - - epll_con = __raw_readl(S5P_EPLL_CON); - - epll_con &= ~(PLL65XX_MDIV_MASK | PLL65XX_PDIV_MASK | PLL65XX_SDIV_MASK); - - for (i = 0; i < ARRAY_SIZE(epll_div); i++) { - if (epll_div[i][0] == rate) { - epll_con |= (epll_div[i][1] << PLL65XX_MDIV_SHIFT) | - (epll_div[i][2] << PLL65XX_PDIV_SHIFT) | - (epll_div[i][3] << PLL65XX_SDIV_SHIFT); - break; - } - } - - if (i == ARRAY_SIZE(epll_div)) { - printk(KERN_ERR "%s: Invalid Clock EPLL Frequency\n", __func__); - return -EINVAL; - } - - __raw_writel(epll_con, S5P_EPLL_CON); - - printk(KERN_WARNING "EPLL Rate changes from %lu to %lu\n", - clk->rate, rate); - - clk->rate = rate; - - return 0; -} - -static struct clk_ops s5pc100_epll_ops = { - .get_rate = s5p_epll_get_rate, - .set_rate = s5pc100_epll_set_rate, -}; - -static int s5pc100_d0_0_ctrl(struct clk *clk, int enable) -{ - return s5p_gatectrl(S5P_CLKGATE_D00, clk, enable); -} - -static int s5pc100_d0_1_ctrl(struct clk *clk, int enable) -{ - return s5p_gatectrl(S5P_CLKGATE_D01, clk, enable); -} - -static int s5pc100_d0_2_ctrl(struct clk *clk, int enable) -{ - return s5p_gatectrl(S5P_CLKGATE_D02, clk, enable); -} - -static int s5pc100_d1_0_ctrl(struct clk *clk, int enable) -{ - return s5p_gatectrl(S5P_CLKGATE_D10, clk, enable); -} - -static int s5pc100_d1_1_ctrl(struct clk *clk, int enable) -{ - return s5p_gatectrl(S5P_CLKGATE_D11, clk, enable); -} - -static int s5pc100_d1_2_ctrl(struct clk *clk, int enable) -{ - return s5p_gatectrl(S5P_CLKGATE_D12, clk, enable); -} - -static int s5pc100_d1_3_ctrl(struct clk *clk, int enable) -{ - return s5p_gatectrl(S5P_CLKGATE_D13, clk, enable); -} - -static int s5pc100_d1_4_ctrl(struct clk *clk, int enable) -{ - return s5p_gatectrl(S5P_CLKGATE_D14, clk, enable); -} - -static int s5pc100_d1_5_ctrl(struct clk *clk, int enable) -{ - return s5p_gatectrl(S5P_CLKGATE_D15, clk, enable); -} - -static int s5pc100_sclk0_ctrl(struct clk *clk, int enable) -{ - return s5p_gatectrl(S5P_CLKGATE_SCLK0, clk, enable); -} - -static int s5pc100_sclk1_ctrl(struct clk *clk, int enable) -{ - return s5p_gatectrl(S5P_CLKGATE_SCLK1, clk, enable); -} - -/* - * The following clocks will be disabled during clock initialization. It is - * recommended to keep the following clocks disabled until the driver requests - * for enabling the clock. - */ -static struct clk init_clocks_off[] = { - { - .name = "cssys", - .parent = &clk_div_d0_bus.clk, - .enable = s5pc100_d0_0_ctrl, - .ctrlbit = (1 << 6), - }, { - .name = "secss", - .parent = &clk_div_d0_bus.clk, - .enable = s5pc100_d0_0_ctrl, - .ctrlbit = (1 << 5), - }, { - .name = "g2d", - .parent = &clk_div_d0_bus.clk, - .enable = s5pc100_d0_0_ctrl, - .ctrlbit = (1 << 4), - }, { - .name = "mdma", - .parent = &clk_div_d0_bus.clk, - .enable = s5pc100_d0_0_ctrl, - .ctrlbit = (1 << 3), - }, { - .name = "cfcon", - .parent = &clk_div_d0_bus.clk, - .enable = s5pc100_d0_0_ctrl, - .ctrlbit = (1 << 2), - }, { - .name = "nfcon", - .parent = &clk_div_d0_bus.clk, - .enable = s5pc100_d0_1_ctrl, - .ctrlbit = (1 << 3), - }, { - .name = "onenandc", - .parent = &clk_div_d0_bus.clk, - .enable = s5pc100_d0_1_ctrl, - .ctrlbit = (1 << 2), - }, { - .name = "sdm", - .parent = &clk_div_d0_bus.clk, - .enable = s5pc100_d0_2_ctrl, - .ctrlbit = (1 << 2), - }, { - .name = "seckey", - .parent = &clk_div_d0_bus.clk, - .enable = s5pc100_d0_2_ctrl, - .ctrlbit = (1 << 1), - }, { - .name = "modemif", - .parent = &clk_div_d1_bus.clk, - .enable = s5pc100_d1_0_ctrl, - .ctrlbit = (1 << 4), - }, { - .name = "otg", - .parent = &clk_div_d1_bus.clk, - .enable = s5pc100_d1_0_ctrl, - .ctrlbit = (1 << 3), - }, { - .name = "usbhost", - .parent = &clk_div_d1_bus.clk, - .enable = s5pc100_d1_0_ctrl, - .ctrlbit = (1 << 2), - }, { - .name = "dma", - .devname = "dma-pl330.1", - .parent = &clk_div_d1_bus.clk, - .enable = s5pc100_d1_0_ctrl, - .ctrlbit = (1 << 1), - }, { - .name = "dma", - .devname = "dma-pl330.0", - .parent = &clk_div_d1_bus.clk, - .enable = s5pc100_d1_0_ctrl, - .ctrlbit = (1 << 0), - }, { - .name = "lcd", - .parent = &clk_div_d1_bus.clk, - .enable = s5pc100_d1_1_ctrl, - .ctrlbit = (1 << 0), - }, { - .name = "rotator", - .parent = &clk_div_d1_bus.clk, - .enable = s5pc100_d1_1_ctrl, - .ctrlbit = (1 << 1), - }, { - .name = "fimc", - .devname = "s5p-fimc.0", - .parent = &clk_div_d1_bus.clk, - .enable = s5pc100_d1_1_ctrl, - .ctrlbit = (1 << 2), - }, { - .name = "fimc", - .devname = "s5p-fimc.1", - .parent = &clk_div_d1_bus.clk, - .enable = s5pc100_d1_1_ctrl, - .ctrlbit = (1 << 3), - }, { - .name = "fimc", - .devname = "s5p-fimc.2", - .enable = s5pc100_d1_1_ctrl, - .ctrlbit = (1 << 4), - }, { - .name = "jpeg", - .parent = &clk_div_d1_bus.clk, - .enable = s5pc100_d1_1_ctrl, - .ctrlbit = (1 << 5), - }, { - .name = "mipi-dsim", - .parent = &clk_div_d1_bus.clk, - .enable = s5pc100_d1_1_ctrl, - .ctrlbit = (1 << 6), - }, { - .name = "mipi-csis", - .parent = &clk_div_d1_bus.clk, - .enable = s5pc100_d1_1_ctrl, - .ctrlbit = (1 << 7), - }, { - .name = "g3d", - .parent = &clk_div_d1_bus.clk, - .enable = s5pc100_d1_0_ctrl, - .ctrlbit = (1 << 8), - }, { - .name = "tv", - .parent = &clk_div_d1_bus.clk, - .enable = s5pc100_d1_2_ctrl, - .ctrlbit = (1 << 0), - }, { - .name = "vp", - .parent = &clk_div_d1_bus.clk, - .enable = s5pc100_d1_2_ctrl, - .ctrlbit = (1 << 1), - }, { - .name = "mixer", - .parent = &clk_div_d1_bus.clk, - .enable = s5pc100_d1_2_ctrl, - .ctrlbit = (1 << 2), - }, { - .name = "hdmi", - .parent = &clk_div_d1_bus.clk, - .enable = s5pc100_d1_2_ctrl, - .ctrlbit = (1 << 3), - }, { - .name = "mfc", - .parent = &clk_div_d1_bus.clk, - .enable = s5pc100_d1_2_ctrl, - .ctrlbit = (1 << 4), - }, { - .name = "apc", - .parent = &clk_div_d1_bus.clk, - .enable = s5pc100_d1_3_ctrl, - .ctrlbit = (1 << 2), - }, { - .name = "iec", - .parent = &clk_div_d1_bus.clk, - .enable = s5pc100_d1_3_ctrl, - .ctrlbit = (1 << 3), - }, { - .name = "systimer", - .parent = &clk_div_d1_bus.clk, - .enable = s5pc100_d1_3_ctrl, - .ctrlbit = (1 << 7), - }, { - .name = "watchdog", - .parent = &clk_div_d1_bus.clk, - .enable = s5pc100_d1_3_ctrl, - .ctrlbit = (1 << 8), - }, { - .name = "rtc", - .parent = &clk_div_d1_bus.clk, - .enable = s5pc100_d1_3_ctrl, - .ctrlbit = (1 << 9), - }, { - .name = "i2c", - .devname = "s3c2440-i2c.0", - .parent = &clk_div_d1_bus.clk, - .enable = s5pc100_d1_4_ctrl, - .ctrlbit = (1 << 4), - }, { - .name = "i2c", - .devname = "s3c2440-i2c.1", - .parent = &clk_div_d1_bus.clk, - .enable = s5pc100_d1_4_ctrl, - .ctrlbit = (1 << 5), - }, { - .name = "spi", - .devname = "s5pc100-spi.0", - .parent = &clk_div_d1_bus.clk, - .enable = s5pc100_d1_4_ctrl, - .ctrlbit = (1 << 6), - }, { - .name = "spi", - .devname = "s5pc100-spi.1", - .parent = &clk_div_d1_bus.clk, - .enable = s5pc100_d1_4_ctrl, - .ctrlbit = (1 << 7), - }, { - .name = "spi", - .devname = "s5pc100-spi.2", - .parent = &clk_div_d1_bus.clk, - .enable = s5pc100_d1_4_ctrl, - .ctrlbit = (1 << 8), - }, { - .name = "irda", - .parent = &clk_div_d1_bus.clk, - .enable = s5pc100_d1_4_ctrl, - .ctrlbit = (1 << 9), - }, { - .name = "ccan", - .parent = &clk_div_d1_bus.clk, - .enable = s5pc100_d1_4_ctrl, - .ctrlbit = (1 << 10), - }, { - .name = "ccan", - .parent = &clk_div_d1_bus.clk, - .enable = s5pc100_d1_4_ctrl, - .ctrlbit = (1 << 11), - }, { - .name = "hsitx", - .parent = &clk_div_d1_bus.clk, - .enable = s5pc100_d1_4_ctrl, - .ctrlbit = (1 << 12), - }, { - .name = "hsirx", - .parent = &clk_div_d1_bus.clk, - .enable = s5pc100_d1_4_ctrl, - .ctrlbit = (1 << 13), - }, { - .name = "ac97", - .parent = &clk_div_pclkd1.clk, - .enable = s5pc100_d1_5_ctrl, - .ctrlbit = (1 << 3), - }, { - .name = "pcm", - .devname = "samsung-pcm.0", - .parent = &clk_div_pclkd1.clk, - .enable = s5pc100_d1_5_ctrl, - .ctrlbit = (1 << 4), - }, { - .name = "pcm", - .devname = "samsung-pcm.1", - .parent = &clk_div_pclkd1.clk, - .enable = s5pc100_d1_5_ctrl, - .ctrlbit = (1 << 5), - }, { - .name = "spdif", - .parent = &clk_div_pclkd1.clk, - .enable = s5pc100_d1_5_ctrl, - .ctrlbit = (1 << 6), - }, { - .name = "adc", - .parent = &clk_div_pclkd1.clk, - .enable = s5pc100_d1_5_ctrl, - .ctrlbit = (1 << 7), - }, { - .name = "keypad", - .parent = &clk_div_pclkd1.clk, - .enable = s5pc100_d1_5_ctrl, - .ctrlbit = (1 << 8), - }, { - .name = "mmc_48m", - .devname = "s3c-sdhci.0", - .parent = &clk_mout_48m.clk, - .enable = s5pc100_sclk0_ctrl, - .ctrlbit = (1 << 15), - }, { - .name = "mmc_48m", - .devname = "s3c-sdhci.1", - .parent = &clk_mout_48m.clk, - .enable = s5pc100_sclk0_ctrl, - .ctrlbit = (1 << 16), - }, { - .name = "mmc_48m", - .devname = "s3c-sdhci.2", - .parent = &clk_mout_48m.clk, - .enable = s5pc100_sclk0_ctrl, - .ctrlbit = (1 << 17), - }, -}; - -static struct clk clk_hsmmc2 = { - .name = "hsmmc", - .devname = "s3c-sdhci.2", - .parent = &clk_div_d1_bus.clk, - .enable = s5pc100_d1_0_ctrl, - .ctrlbit = (1 << 7), -}; - -static struct clk clk_hsmmc1 = { - .name = "hsmmc", - .devname = "s3c-sdhci.1", - .parent = &clk_div_d1_bus.clk, - .enable = s5pc100_d1_0_ctrl, - .ctrlbit = (1 << 6), -}; - -static struct clk clk_hsmmc0 = { - .name = "hsmmc", - .devname = "s3c-sdhci.0", - .parent = &clk_div_d1_bus.clk, - .enable = s5pc100_d1_0_ctrl, - .ctrlbit = (1 << 5), -}; - -static struct clk clk_48m_spi0 = { - .name = "spi_48m", - .devname = "s5pc100-spi.0", - .parent = &clk_mout_48m.clk, - .enable = s5pc100_sclk0_ctrl, - .ctrlbit = (1 << 7), -}; - -static struct clk clk_48m_spi1 = { - .name = "spi_48m", - .devname = "s5pc100-spi.1", - .parent = &clk_mout_48m.clk, - .enable = s5pc100_sclk0_ctrl, - .ctrlbit = (1 << 8), -}; - -static struct clk clk_48m_spi2 = { - .name = "spi_48m", - .devname = "s5pc100-spi.2", - .parent = &clk_mout_48m.clk, - .enable = s5pc100_sclk0_ctrl, - .ctrlbit = (1 << 9), -}; - -static struct clk clk_i2s0 = { - .name = "iis", - .devname = "samsung-i2s.0", - .parent = &clk_div_pclkd1.clk, - .enable = s5pc100_d1_5_ctrl, - .ctrlbit = (1 << 0), -}; - -static struct clk clk_i2s1 = { - .name = "iis", - .devname = "samsung-i2s.1", - .parent = &clk_div_pclkd1.clk, - .enable = s5pc100_d1_5_ctrl, - .ctrlbit = (1 << 1), -}; - -static struct clk clk_i2s2 = { - .name = "iis", - .devname = "samsung-i2s.2", - .parent = &clk_div_pclkd1.clk, - .enable = s5pc100_d1_5_ctrl, - .ctrlbit = (1 << 2), -}; - -static struct clk clk_vclk54m = { - .name = "vclk_54m", - .rate = 54000000, -}; - -static struct clk clk_i2scdclk0 = { - .name = "i2s_cdclk0", -}; - -static struct clk clk_i2scdclk1 = { - .name = "i2s_cdclk1", -}; - -static struct clk clk_i2scdclk2 = { - .name = "i2s_cdclk2", -}; - -static struct clk clk_pcmcdclk0 = { - .name = "pcm_cdclk0", -}; - -static struct clk clk_pcmcdclk1 = { - .name = "pcm_cdclk1", -}; - -static struct clk *clk_src_group1_list[] = { - [0] = &clk_mout_epll.clk, - [1] = &clk_div_mpll2.clk, - [2] = &clk_fin_epll, - [3] = &clk_mout_hpll.clk, -}; - -static struct clksrc_sources clk_src_group1 = { - .sources = clk_src_group1_list, - .nr_sources = ARRAY_SIZE(clk_src_group1_list), -}; - -static struct clk *clk_src_group2_list[] = { - [0] = &clk_mout_epll.clk, - [1] = &clk_div_mpll.clk, -}; - -static struct clksrc_sources clk_src_group2 = { - .sources = clk_src_group2_list, - .nr_sources = ARRAY_SIZE(clk_src_group2_list), -}; - -static struct clk *clk_src_group3_list[] = { - [0] = &clk_mout_epll.clk, - [1] = &clk_div_mpll.clk, - [2] = &clk_fin_epll, - [3] = &clk_i2scdclk0, - [4] = &clk_pcmcdclk0, - [5] = &clk_mout_hpll.clk, -}; - -static struct clksrc_sources clk_src_group3 = { - .sources = clk_src_group3_list, - .nr_sources = ARRAY_SIZE(clk_src_group3_list), -}; - -static struct clksrc_clk clk_sclk_audio0 = { - .clk = { - .name = "sclk_audio", - .devname = "samsung-pcm.0", - .ctrlbit = (1 << 8), - .enable = s5pc100_sclk1_ctrl, - }, - .sources = &clk_src_group3, - .reg_src = { .reg = S5P_CLK_SRC3, .shift = 12, .size = 3 }, - .reg_div = { .reg = S5P_CLK_DIV4, .shift = 12, .size = 4 }, -}; - -static struct clk *clk_src_group4_list[] = { - [0] = &clk_mout_epll.clk, - [1] = &clk_div_mpll.clk, - [2] = &clk_fin_epll, - [3] = &clk_i2scdclk1, - [4] = &clk_pcmcdclk1, - [5] = &clk_mout_hpll.clk, -}; - -static struct clksrc_sources clk_src_group4 = { - .sources = clk_src_group4_list, - .nr_sources = ARRAY_SIZE(clk_src_group4_list), -}; - -static struct clksrc_clk clk_sclk_audio1 = { - .clk = { - .name = "sclk_audio", - .devname = "samsung-pcm.1", - .ctrlbit = (1 << 9), - .enable = s5pc100_sclk1_ctrl, - }, - .sources = &clk_src_group4, - .reg_src = { .reg = S5P_CLK_SRC3, .shift = 16, .size = 3 }, - .reg_div = { .reg = S5P_CLK_DIV4, .shift = 16, .size = 4 }, -}; - -static struct clk *clk_src_group5_list[] = { - [0] = &clk_mout_epll.clk, - [1] = &clk_div_mpll.clk, - [2] = &clk_fin_epll, - [3] = &clk_i2scdclk2, - [4] = &clk_mout_hpll.clk, -}; - -static struct clksrc_sources clk_src_group5 = { - .sources = clk_src_group5_list, - .nr_sources = ARRAY_SIZE(clk_src_group5_list), -}; - -static struct clksrc_clk clk_sclk_audio2 = { - .clk = { - .name = "sclk_audio", - .devname = "samsung-pcm.2", - .ctrlbit = (1 << 10), - .enable = s5pc100_sclk1_ctrl, - }, - .sources = &clk_src_group5, - .reg_src = { .reg = S5P_CLK_SRC3, .shift = 20, .size = 3 }, - .reg_div = { .reg = S5P_CLK_DIV4, .shift = 20, .size = 4 }, -}; - -static struct clk *clk_src_group6_list[] = { - [0] = &s5p_clk_27m, - [1] = &clk_vclk54m, - [2] = &clk_div_hdmi.clk, -}; - -static struct clksrc_sources clk_src_group6 = { - .sources = clk_src_group6_list, - .nr_sources = ARRAY_SIZE(clk_src_group6_list), -}; - -static struct clk *clk_src_group7_list[] = { - [0] = &clk_mout_epll.clk, - [1] = &clk_div_mpll.clk, - [2] = &clk_mout_hpll.clk, - [3] = &clk_vclk54m, -}; - -static struct clksrc_sources clk_src_group7 = { - .sources = clk_src_group7_list, - .nr_sources = ARRAY_SIZE(clk_src_group7_list), -}; - -static struct clk *clk_src_mmc0_list[] = { - [0] = &clk_mout_epll.clk, - [1] = &clk_div_mpll.clk, - [2] = &clk_fin_epll, -}; - -static struct clksrc_sources clk_src_mmc0 = { - .sources = clk_src_mmc0_list, - .nr_sources = ARRAY_SIZE(clk_src_mmc0_list), -}; - -static struct clk *clk_src_mmc12_list[] = { - [0] = &clk_mout_epll.clk, - [1] = &clk_div_mpll.clk, - [2] = &clk_fin_epll, - [3] = &clk_mout_hpll.clk, -}; - -static struct clksrc_sources clk_src_mmc12 = { - .sources = clk_src_mmc12_list, - .nr_sources = ARRAY_SIZE(clk_src_mmc12_list), -}; - -static struct clk *clk_src_irda_usb_list[] = { - [0] = &clk_mout_epll.clk, - [1] = &clk_div_mpll.clk, - [2] = &clk_fin_epll, - [3] = &clk_mout_hpll.clk, -}; - -static struct clksrc_sources clk_src_irda_usb = { - .sources = clk_src_irda_usb_list, - .nr_sources = ARRAY_SIZE(clk_src_irda_usb_list), -}; - -static struct clk *clk_src_pwi_list[] = { - [0] = &clk_fin_epll, - [1] = &clk_mout_epll.clk, - [2] = &clk_div_mpll.clk, -}; - -static struct clksrc_sources clk_src_pwi = { - .sources = clk_src_pwi_list, - .nr_sources = ARRAY_SIZE(clk_src_pwi_list), -}; - -static struct clk *clk_sclk_spdif_list[] = { - [0] = &clk_sclk_audio0.clk, - [1] = &clk_sclk_audio1.clk, - [2] = &clk_sclk_audio2.clk, -}; - -static struct clksrc_sources clk_src_sclk_spdif = { - .sources = clk_sclk_spdif_list, - .nr_sources = ARRAY_SIZE(clk_sclk_spdif_list), -}; - -static struct clksrc_clk clk_sclk_spdif = { - .clk = { - .name = "sclk_spdif", - .ctrlbit = (1 << 11), - .enable = s5pc100_sclk1_ctrl, - .ops = &s5p_sclk_spdif_ops, - }, - .sources = &clk_src_sclk_spdif, - .reg_src = { .reg = S5P_CLK_SRC3, .shift = 24, .size = 2 }, -}; - -static struct clksrc_clk clksrcs[] = { - { - .clk = { - .name = "sclk_mixer", - .ctrlbit = (1 << 6), - .enable = s5pc100_sclk0_ctrl, - - }, - .sources = &clk_src_group6, - .reg_src = { .reg = S5P_CLK_SRC2, .shift = 28, .size = 2 }, - }, { - .clk = { - .name = "sclk_lcd", - .ctrlbit = (1 << 0), - .enable = s5pc100_sclk1_ctrl, - - }, - .sources = &clk_src_group7, - .reg_src = { .reg = S5P_CLK_SRC2, .shift = 12, .size = 2 }, - .reg_div = { .reg = S5P_CLK_DIV3, .shift = 12, .size = 4 }, - }, { - .clk = { - .name = "sclk_fimc", - .devname = "s5p-fimc.0", - .ctrlbit = (1 << 1), - .enable = s5pc100_sclk1_ctrl, - - }, - .sources = &clk_src_group7, - .reg_src = { .reg = S5P_CLK_SRC2, .shift = 16, .size = 2 }, - .reg_div = { .reg = S5P_CLK_DIV3, .shift = 16, .size = 4 }, - }, { - .clk = { - .name = "sclk_fimc", - .devname = "s5p-fimc.1", - .ctrlbit = (1 << 2), - .enable = s5pc100_sclk1_ctrl, - - }, - .sources = &clk_src_group7, - .reg_src = { .reg = S5P_CLK_SRC2, .shift = 20, .size = 2 }, - .reg_div = { .reg = S5P_CLK_DIV3, .shift = 20, .size = 4 }, - }, { - .clk = { - .name = "sclk_fimc", - .devname = "s5p-fimc.2", - .ctrlbit = (1 << 3), - .enable = s5pc100_sclk1_ctrl, - - }, - .sources = &clk_src_group7, - .reg_src = { .reg = S5P_CLK_SRC2, .shift = 24, .size = 2 }, - .reg_div = { .reg = S5P_CLK_DIV3, .shift = 24, .size = 4 }, - }, { - .clk = { - .name = "sclk_irda", - .ctrlbit = (1 << 10), - .enable = s5pc100_sclk0_ctrl, - - }, - .sources = &clk_src_irda_usb, - .reg_src = { .reg = S5P_CLK_SRC2, .shift = 8, .size = 2 }, - .reg_div = { .reg = S5P_CLK_DIV3, .shift = 8, .size = 4 }, - }, { - .clk = { - .name = "sclk_irda", - .ctrlbit = (1 << 10), - .enable = s5pc100_sclk0_ctrl, - - }, - .sources = &clk_src_mmc12, - .reg_src = { .reg = S5P_CLK_SRC1, .shift = 16, .size = 2 }, - .reg_div = { .reg = S5P_CLK_DIV2, .shift = 16, .size = 4 }, - }, { - .clk = { - .name = "sclk_pwi", - .ctrlbit = (1 << 1), - .enable = s5pc100_sclk0_ctrl, - - }, - .sources = &clk_src_pwi, - .reg_src = { .reg = S5P_CLK_SRC3, .shift = 0, .size = 2 }, - .reg_div = { .reg = S5P_CLK_DIV4, .shift = 0, .size = 3 }, - }, { - .clk = { - .name = "sclk_uhost", - .ctrlbit = (1 << 11), - .enable = s5pc100_sclk0_ctrl, - - }, - .sources = &clk_src_irda_usb, - .reg_src = { .reg = S5P_CLK_SRC1, .shift = 20, .size = 2 }, - .reg_div = { .reg = S5P_CLK_DIV2, .shift = 20, .size = 4 }, - }, -}; - -static struct clksrc_clk clk_sclk_uart = { - .clk = { - .name = "uclk1", - .ctrlbit = (1 << 3), - .enable = s5pc100_sclk0_ctrl, - }, - .sources = &clk_src_group2, - .reg_src = { .reg = S5P_CLK_SRC1, .shift = 0, .size = 1 }, - .reg_div = { .reg = S5P_CLK_DIV2, .shift = 0, .size = 4 }, -}; - -static struct clksrc_clk clk_sclk_mmc0 = { - .clk = { - .name = "sclk_mmc", - .devname = "s3c-sdhci.0", - .ctrlbit = (1 << 12), - .enable = s5pc100_sclk1_ctrl, - }, - .sources = &clk_src_mmc0, - .reg_src = { .reg = S5P_CLK_SRC2, .shift = 0, .size = 2 }, - .reg_div = { .reg = S5P_CLK_DIV3, .shift = 0, .size = 4 }, -}; - -static struct clksrc_clk clk_sclk_mmc1 = { - .clk = { - .name = "sclk_mmc", - .devname = "s3c-sdhci.1", - .ctrlbit = (1 << 13), - .enable = s5pc100_sclk1_ctrl, - }, - .sources = &clk_src_mmc12, - .reg_src = { .reg = S5P_CLK_SRC2, .shift = 4, .size = 2 }, - .reg_div = { .reg = S5P_CLK_DIV3, .shift = 4, .size = 4 }, -}; - -static struct clksrc_clk clk_sclk_mmc2 = { - .clk = { - .name = "sclk_mmc", - .devname = "s3c-sdhci.2", - .ctrlbit = (1 << 14), - .enable = s5pc100_sclk1_ctrl, - }, - .sources = &clk_src_mmc12, - .reg_src = { .reg = S5P_CLK_SRC2, .shift = 8, .size = 2 }, - .reg_div = { .reg = S5P_CLK_DIV3, .shift = 8, .size = 4 }, -}; - -static struct clksrc_clk clk_sclk_spi0 = { - .clk = { - .name = "sclk_spi", - .devname = "s5pc100-spi.0", - .ctrlbit = (1 << 4), - .enable = s5pc100_sclk0_ctrl, - }, - .sources = &clk_src_group1, - .reg_src = { .reg = S5P_CLK_SRC1, .shift = 4, .size = 2 }, - .reg_div = { .reg = S5P_CLK_DIV2, .shift = 4, .size = 4 }, -}; - -static struct clksrc_clk clk_sclk_spi1 = { - .clk = { - .name = "sclk_spi", - .devname = "s5pc100-spi.1", - .ctrlbit = (1 << 5), - .enable = s5pc100_sclk0_ctrl, - }, - .sources = &clk_src_group1, - .reg_src = { .reg = S5P_CLK_SRC1, .shift = 8, .size = 2 }, - .reg_div = { .reg = S5P_CLK_DIV2, .shift = 8, .size = 4 }, -}; - -static struct clksrc_clk clk_sclk_spi2 = { - .clk = { - .name = "sclk_spi", - .devname = "s5pc100-spi.2", - .ctrlbit = (1 << 6), - .enable = s5pc100_sclk0_ctrl, - }, - .sources = &clk_src_group1, - .reg_src = { .reg = S5P_CLK_SRC1, .shift = 12, .size = 2 }, - .reg_div = { .reg = S5P_CLK_DIV2, .shift = 12, .size = 4 }, -}; - -/* Clock initialisation code */ -static struct clksrc_clk *sysclks[] = { - &clk_mout_apll, - &clk_mout_epll, - &clk_mout_mpll, - &clk_mout_hpll, - &clk_mout_href, - &clk_mout_48m, - &clk_div_apll, - &clk_div_arm, - &clk_div_d0_bus, - &clk_div_pclkd0, - &clk_div_secss, - &clk_div_apll2, - &clk_mout_am, - &clk_div_d1_bus, - &clk_div_mpll2, - &clk_div_mpll, - &clk_mout_onenand, - &clk_div_onenand, - &clk_div_pclkd1, - &clk_div_cam, - &clk_div_hdmi, - &clk_sclk_audio0, - &clk_sclk_audio1, - &clk_sclk_audio2, - &clk_sclk_spdif, -}; - -static struct clk *clk_cdev[] = { - &clk_hsmmc0, - &clk_hsmmc1, - &clk_hsmmc2, - &clk_48m_spi0, - &clk_48m_spi1, - &clk_48m_spi2, - &clk_i2s0, - &clk_i2s1, - &clk_i2s2, -}; - -static struct clksrc_clk *clksrc_cdev[] = { - &clk_sclk_uart, - &clk_sclk_mmc0, - &clk_sclk_mmc1, - &clk_sclk_mmc2, - &clk_sclk_spi0, - &clk_sclk_spi1, - &clk_sclk_spi2, -}; - -void __init_or_cpufreq s5pc100_setup_clocks(void) -{ - unsigned long xtal; - unsigned long arm; - unsigned long hclkd0; - unsigned long hclkd1; - unsigned long pclkd0; - unsigned long pclkd1; - unsigned long apll; - unsigned long mpll; - unsigned long epll; - unsigned long hpll; - unsigned int ptr; - - /* Set S5PC100 functions for clk_fout_epll */ - clk_fout_epll.enable = s5p_epll_enable; - clk_fout_epll.ops = &s5pc100_epll_ops; - - printk(KERN_DEBUG "%s: registering clocks\n", __func__); - - xtal = clk_get_rate(&clk_xtal); - - printk(KERN_DEBUG "%s: xtal is %ld\n", __func__, xtal); - - apll = s5p_get_pll65xx(xtal, __raw_readl(S5P_APLL_CON)); - mpll = s5p_get_pll65xx(xtal, __raw_readl(S5P_MPLL_CON)); - epll = s5p_get_pll65xx(xtal, __raw_readl(S5P_EPLL_CON)); - hpll = s5p_get_pll65xx(xtal, __raw_readl(S5P_HPLL_CON)); - - printk(KERN_INFO "S5PC100: PLL settings, A=%ld.%ldMHz, M=%ld.%ldMHz, E=%ld.%ldMHz, H=%ld.%ldMHz\n", - print_mhz(apll), print_mhz(mpll), print_mhz(epll), print_mhz(hpll)); - - clk_fout_apll.rate = apll; - clk_fout_mpll.rate = mpll; - clk_fout_epll.rate = epll; - clk_mout_hpll.clk.rate = hpll; - - for (ptr = 0; ptr < ARRAY_SIZE(clksrcs); ptr++) - s3c_set_clksrc(&clksrcs[ptr], true); - - arm = clk_get_rate(&clk_div_arm.clk); - hclkd0 = clk_get_rate(&clk_div_d0_bus.clk); - pclkd0 = clk_get_rate(&clk_div_pclkd0.clk); - hclkd1 = clk_get_rate(&clk_div_d1_bus.clk); - pclkd1 = clk_get_rate(&clk_div_pclkd1.clk); - - printk(KERN_INFO "S5PC100: HCLKD0=%ld.%ldMHz, HCLKD1=%ld.%ldMHz, PCLKD0=%ld.%ldMHz, PCLKD1=%ld.%ldMHz\n", - print_mhz(hclkd0), print_mhz(hclkd1), print_mhz(pclkd0), print_mhz(pclkd1)); - - clk_f.rate = arm; - clk_h.rate = hclkd1; - clk_p.rate = pclkd1; -} - -/* - * The following clocks will be enabled during clock initialization. - */ -static struct clk init_clocks[] = { - { - .name = "tzic", - .parent = &clk_div_d0_bus.clk, - .enable = s5pc100_d0_0_ctrl, - .ctrlbit = (1 << 1), - }, { - .name = "intc", - .parent = &clk_div_d0_bus.clk, - .enable = s5pc100_d0_0_ctrl, - .ctrlbit = (1 << 0), - }, { - .name = "ebi", - .parent = &clk_div_d0_bus.clk, - .enable = s5pc100_d0_1_ctrl, - .ctrlbit = (1 << 5), - }, { - .name = "intmem", - .parent = &clk_div_d0_bus.clk, - .enable = s5pc100_d0_1_ctrl, - .ctrlbit = (1 << 4), - }, { - .name = "sromc", - .parent = &clk_div_d0_bus.clk, - .enable = s5pc100_d0_1_ctrl, - .ctrlbit = (1 << 1), - }, { - .name = "dmc", - .parent = &clk_div_d0_bus.clk, - .enable = s5pc100_d0_1_ctrl, - .ctrlbit = (1 << 0), - }, { - .name = "chipid", - .parent = &clk_div_d0_bus.clk, - .enable = s5pc100_d0_1_ctrl, - .ctrlbit = (1 << 0), - }, { - .name = "gpio", - .parent = &clk_div_d1_bus.clk, - .enable = s5pc100_d1_3_ctrl, - .ctrlbit = (1 << 1), - }, { - .name = "uart", - .devname = "s3c6400-uart.0", - .parent = &clk_div_d1_bus.clk, - .enable = s5pc100_d1_4_ctrl, - .ctrlbit = (1 << 0), - }, { - .name = "uart", - .devname = "s3c6400-uart.1", - .parent = &clk_div_d1_bus.clk, - .enable = s5pc100_d1_4_ctrl, - .ctrlbit = (1 << 1), - }, { - .name = "uart", - .devname = "s3c6400-uart.2", - .parent = &clk_div_d1_bus.clk, - .enable = s5pc100_d1_4_ctrl, - .ctrlbit = (1 << 2), - }, { - .name = "uart", - .devname = "s3c6400-uart.3", - .parent = &clk_div_d1_bus.clk, - .enable = s5pc100_d1_4_ctrl, - .ctrlbit = (1 << 3), - }, { - .name = "timers", - .parent = &clk_div_d1_bus.clk, - .enable = s5pc100_d1_3_ctrl, - .ctrlbit = (1 << 6), - }, -}; - -static struct clk *clks[] __initdata = { - &clk_ext, - &clk_i2scdclk0, - &clk_i2scdclk1, - &clk_i2scdclk2, - &clk_pcmcdclk0, - &clk_pcmcdclk1, -}; - -static struct clk_lookup s5pc100_clk_lookup[] = { - CLKDEV_INIT(NULL, "clk_uart_baud2", &clk_p), - CLKDEV_INIT(NULL, "clk_uart_baud3", &clk_sclk_uart.clk), - CLKDEV_INIT("s3c-sdhci.0", "mmc_busclk.0", &clk_hsmmc0), - CLKDEV_INIT("s3c-sdhci.1", "mmc_busclk.0", &clk_hsmmc1), - CLKDEV_INIT("s3c-sdhci.2", "mmc_busclk.0", &clk_hsmmc2), - CLKDEV_INIT("s3c-sdhci.0", "mmc_busclk.2", &clk_sclk_mmc0.clk), - CLKDEV_INIT("s3c-sdhci.1", "mmc_busclk.2", &clk_sclk_mmc1.clk), - CLKDEV_INIT("s3c-sdhci.2", "mmc_busclk.2", &clk_sclk_mmc2.clk), - CLKDEV_INIT(NULL, "spi_busclk0", &clk_p), - CLKDEV_INIT("s5pc100-spi.0", "spi_busclk1", &clk_48m_spi0), - CLKDEV_INIT("s5pc100-spi.0", "spi_busclk2", &clk_sclk_spi0.clk), - CLKDEV_INIT("s5pc100-spi.1", "spi_busclk1", &clk_48m_spi1), - CLKDEV_INIT("s5pc100-spi.1", "spi_busclk2", &clk_sclk_spi1.clk), - CLKDEV_INIT("s5pc100-spi.2", "spi_busclk1", &clk_48m_spi2), - CLKDEV_INIT("s5pc100-spi.2", "spi_busclk2", &clk_sclk_spi2.clk), - CLKDEV_INIT("samsung-i2s.0", "i2s_opclk0", &clk_i2s0), - CLKDEV_INIT("samsung-i2s.1", "i2s_opclk0", &clk_i2s1), - CLKDEV_INIT("samsung-i2s.2", "i2s_opclk0", &clk_i2s2), -}; - -void __init s5pc100_register_clocks(void) -{ - int ptr; - - s3c24xx_register_clocks(clks, ARRAY_SIZE(clks)); - - for (ptr = 0; ptr < ARRAY_SIZE(sysclks); ptr++) - s3c_register_clksrc(sysclks[ptr], 1); - - s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs)); - s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks)); - for (ptr = 0; ptr < ARRAY_SIZE(clksrc_cdev); ptr++) - s3c_register_clksrc(clksrc_cdev[ptr], 1); - - s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); - s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); - clkdev_add_table(s5pc100_clk_lookup, ARRAY_SIZE(s5pc100_clk_lookup)); - - s3c24xx_register_clocks(clk_cdev, ARRAY_SIZE(clk_cdev)); - for (ptr = 0; ptr < ARRAY_SIZE(clk_cdev); ptr++) - s3c_disable_clocks(clk_cdev[ptr], 1); - - s3c24xx_register_clock(&dummy_apb_pclk); -} diff --git a/arch/arm/mach-s5pc100/common.c b/arch/arm/mach-s5pc100/common.c deleted file mode 100644 index 6a41bf7dacf6..000000000000 --- a/arch/arm/mach-s5pc100/common.c +++ /dev/null @@ -1,255 +0,0 @@ -/* - * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * Copyright 2009 Samsung Electronics Co. - * Byungho Min <bhmin@samsung.com> - * - * Common Codes for S5PC100 - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include <linux/kernel.h> -#include <linux/types.h> -#include <linux/interrupt.h> -#include <linux/list.h> -#include <linux/timer.h> -#include <linux/init.h> -#include <linux/clk.h> -#include <linux/io.h> -#include <linux/device.h> -#include <linux/serial_core.h> -#include <linux/serial_s3c.h> -#include <clocksource/samsung_pwm.h> -#include <linux/platform_device.h> -#include <linux/sched.h> -#include <linux/reboot.h> - -#include <asm/irq.h> -#include <asm/proc-fns.h> -#include <asm/system_misc.h> -#include <asm/mach/arch.h> -#include <asm/mach/map.h> -#include <asm/mach/irq.h> - -#include <mach/map.h> -#include <mach/hardware.h> -#include <mach/regs-clock.h> - -#include <plat/cpu.h> -#include <plat/devs.h> -#include <plat/clock.h> -#include <plat/sdhci.h> -#include <plat/adc-core.h> -#include <plat/ata-core.h> -#include <plat/fb-core.h> -#include <plat/iic-core.h> -#include <plat/onenand-core.h> -#include <plat/pwm-core.h> -#include <plat/spi-core.h> -#include <plat/watchdog-reset.h> - -#include "common.h" - -static const char name_s5pc100[] = "S5PC100"; - -static struct cpu_table cpu_ids[] __initdata = { - { - .idcode = S5PC100_CPU_ID, - .idmask = S5PC100_CPU_MASK, - .map_io = s5pc100_map_io, - .init_clocks = s5pc100_init_clocks, - .init_uarts = s5pc100_init_uarts, - .init = s5pc100_init, - .name = name_s5pc100, - }, -}; - -/* Initial IO mappings */ - -static struct map_desc s5pc100_iodesc[] __initdata = { - { - .virtual = (unsigned long)S5P_VA_CHIPID, - .pfn = __phys_to_pfn(S5PC100_PA_CHIPID), - .length = SZ_4K, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)S3C_VA_SYS, - .pfn = __phys_to_pfn(S5PC100_PA_SYSCON), - .length = SZ_64K, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)S3C_VA_TIMER, - .pfn = __phys_to_pfn(S5PC100_PA_TIMER), - .length = SZ_16K, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)S3C_VA_WATCHDOG, - .pfn = __phys_to_pfn(S5PC100_PA_WATCHDOG), - .length = SZ_4K, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)S5P_VA_SROMC, - .pfn = __phys_to_pfn(S5PC100_PA_SROMC), - .length = SZ_4K, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)S5P_VA_SYSTIMER, - .pfn = __phys_to_pfn(S5PC100_PA_SYSTIMER), - .length = SZ_16K, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)S5P_VA_GPIO, - .pfn = __phys_to_pfn(S5PC100_PA_GPIO), - .length = SZ_4K, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)VA_VIC0, - .pfn = __phys_to_pfn(S5PC100_PA_VIC0), - .length = SZ_16K, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)VA_VIC1, - .pfn = __phys_to_pfn(S5PC100_PA_VIC1), - .length = SZ_16K, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)VA_VIC2, - .pfn = __phys_to_pfn(S5PC100_PA_VIC2), - .length = SZ_16K, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)S3C_VA_UART, - .pfn = __phys_to_pfn(S3C_PA_UART), - .length = SZ_512K, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)S5PC100_VA_OTHERS, - .pfn = __phys_to_pfn(S5PC100_PA_OTHERS), - .length = SZ_4K, - .type = MT_DEVICE, - } -}; - -static struct samsung_pwm_variant s5pc100_pwm_variant = { - .bits = 32, - .div_base = 0, - .has_tint_cstat = true, - .tclk_mask = (1 << 5), -}; - -void __init samsung_set_timer_source(unsigned int event, unsigned int source) -{ - s5pc100_pwm_variant.output_mask = BIT(SAMSUNG_PWM_NUM) - 1; - s5pc100_pwm_variant.output_mask &= ~(BIT(event) | BIT(source)); -} - -void __init samsung_timer_init(void) -{ - unsigned int timer_irqs[SAMSUNG_PWM_NUM] = { - IRQ_TIMER0_VIC, IRQ_TIMER1_VIC, IRQ_TIMER2_VIC, - IRQ_TIMER3_VIC, IRQ_TIMER4_VIC, - }; - - samsung_pwm_clocksource_init(S3C_VA_TIMER, - timer_irqs, &s5pc100_pwm_variant); -} - -/* - * s5pc100_map_io - * - * register the standard CPU IO areas - */ - -void __init s5pc100_init_io(struct map_desc *mach_desc, int size) -{ - /* initialize the io descriptors we need for initialization */ - iotable_init(s5pc100_iodesc, ARRAY_SIZE(s5pc100_iodesc)); - if (mach_desc) - iotable_init(mach_desc, size); - - /* detect cpu id and rev. */ - s5p_init_cpu(S5P_VA_CHIPID); - - s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids)); - - samsung_pwm_set_platdata(&s5pc100_pwm_variant); -} - -void __init s5pc100_map_io(void) -{ - /* initialise device information early */ - s5pc100_default_sdhci0(); - s5pc100_default_sdhci1(); - s5pc100_default_sdhci2(); - - s3c_adc_setname("s3c64xx-adc"); - - /* the i2c devices are directly compatible with s3c2440 */ - s3c_i2c0_setname("s3c2440-i2c"); - s3c_i2c1_setname("s3c2440-i2c"); - - s3c_onenand_setname("s5pc100-onenand"); - s3c_fb_setname("s5pc100-fb"); - s3c_cfcon_setname("s5pc100-pata"); - - s3c64xx_spi_setname("s5pc100-spi"); -} - -void __init s5pc100_init_clocks(int xtal) -{ - printk(KERN_DEBUG "%s: initializing clocks\n", __func__); - - s3c24xx_register_baseclocks(xtal); - s5p_register_clocks(xtal); - s5pc100_register_clocks(); - s5pc100_setup_clocks(); - samsung_wdt_reset_init(S3C_VA_WATCHDOG); -} - -void __init s5pc100_init_irq(void) -{ - u32 vic[] = {~0, ~0, ~0}; - - /* VIC0, VIC1, and VIC2 are fully populated. */ - s5p_init_irq(vic, ARRAY_SIZE(vic)); -} - -static struct bus_type s5pc100_subsys = { - .name = "s5pc100-core", - .dev_name = "s5pc100-core", -}; - -static struct device s5pc100_dev = { - .bus = &s5pc100_subsys, -}; - -static int __init s5pc100_core_init(void) -{ - return subsys_system_register(&s5pc100_subsys, NULL); -} -core_initcall(s5pc100_core_init); - -int __init s5pc100_init(void) -{ - printk(KERN_INFO "S5PC100: Initializing architecture\n"); - return device_register(&s5pc100_dev); -} - -/* uart registration process */ - -void __init s5pc100_init_uarts(struct s3c2410_uartcfg *cfg, int no) -{ - s3c24xx_init_uartdevs("s3c6400-uart", s5p_uart_resources, cfg, no); -} - -void s5pc100_restart(enum reboot_mode mode, const char *cmd) -{ - if (mode != REBOOT_SOFT) - samsung_wdt_reset(); - - soft_restart(0); -} diff --git a/arch/arm/mach-s5pc100/common.h b/arch/arm/mach-s5pc100/common.h deleted file mode 100644 index 08d782d65d7b..000000000000 --- a/arch/arm/mach-s5pc100/common.h +++ /dev/null @@ -1,30 +0,0 @@ -/* - * Copyright (c) 2011 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * Common Header for S5PC100 machines - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __ARCH_ARM_MACH_S5PC100_COMMON_H -#define __ARCH_ARM_MACH_S5PC100_COMMON_H - -#include <linux/reboot.h> - -void s5pc100_init_io(struct map_desc *mach_desc, int size); -void s5pc100_init_irq(void); - -void s5pc100_register_clocks(void); -void s5pc100_setup_clocks(void); - -void s5pc100_restart(enum reboot_mode mode, const char *cmd); - -extern int s5pc100_init(void); -extern void s5pc100_map_io(void); -extern void s5pc100_init_clocks(int xtal); -extern void s5pc100_init_uarts(struct s3c2410_uartcfg *cfg, int no); - -#endif /* __ARCH_ARM_MACH_S5PC100_COMMON_H */ diff --git a/arch/arm/mach-s5pc100/dev-audio.c b/arch/arm/mach-s5pc100/dev-audio.c deleted file mode 100644 index 46f488b09391..000000000000 --- a/arch/arm/mach-s5pc100/dev-audio.c +++ /dev/null @@ -1,239 +0,0 @@ -/* linux/arch/arm/mach-s5pc100/dev-audio.c - * - * Copyright (c) 2010 Samsung Electronics Co. Ltd - * Jaswinder Singh <jassi.brar@samsung.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include <linux/platform_device.h> -#include <linux/dma-mapping.h> -#include <linux/gpio.h> - -#include <plat/gpio-cfg.h> -#include <linux/platform_data/asoc-s3c.h> - -#include <mach/map.h> -#include <mach/dma.h> -#include <mach/irqs.h> - -static int s5pc100_cfg_i2s(struct platform_device *pdev) -{ - /* configure GPIO for i2s port */ - switch (pdev->id) { - case 0: /* Dedicated pins */ - break; - case 1: - s3c_gpio_cfgpin_range(S5PC100_GPC(0), 5, S3C_GPIO_SFN(2)); - break; - case 2: - s3c_gpio_cfgpin_range(S5PC100_GPG3(0), 5, S3C_GPIO_SFN(4)); - break; - default: - printk(KERN_ERR "Invalid Device %d\n", pdev->id); - return -EINVAL; - } - - return 0; -} - -static struct s3c_audio_pdata i2sv5_pdata = { - .cfg_gpio = s5pc100_cfg_i2s, - .type = { - .i2s = { - .quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI - | QUIRK_NEED_RSTCLR, - }, - }, -}; - -static struct resource s5pc100_iis0_resource[] = { - [0] = DEFINE_RES_MEM(S5PC100_PA_I2S0, SZ_256), - [1] = DEFINE_RES_DMA(DMACH_I2S0_TX), - [2] = DEFINE_RES_DMA(DMACH_I2S0_RX), - [3] = DEFINE_RES_DMA(DMACH_I2S0S_TX), -}; - -struct platform_device s5pc100_device_iis0 = { - .name = "samsung-i2s", - .id = 0, - .num_resources = ARRAY_SIZE(s5pc100_iis0_resource), - .resource = s5pc100_iis0_resource, - .dev = { - .platform_data = &i2sv5_pdata, - }, -}; - -static struct s3c_audio_pdata i2sv3_pdata = { - .cfg_gpio = s5pc100_cfg_i2s, -}; - -static struct resource s5pc100_iis1_resource[] = { - [0] = DEFINE_RES_MEM(S5PC100_PA_I2S1, SZ_256), - [1] = DEFINE_RES_DMA(DMACH_I2S1_TX), - [2] = DEFINE_RES_DMA(DMACH_I2S1_RX), -}; - -struct platform_device s5pc100_device_iis1 = { - .name = "samsung-i2s", - .id = 1, - .num_resources = ARRAY_SIZE(s5pc100_iis1_resource), - .resource = s5pc100_iis1_resource, - .dev = { - .platform_data = &i2sv3_pdata, - }, -}; - -static struct resource s5pc100_iis2_resource[] = { - [0] = DEFINE_RES_MEM(S5PC100_PA_I2S2, SZ_256), - [1] = DEFINE_RES_DMA(DMACH_I2S2_TX), - [2] = DEFINE_RES_DMA(DMACH_I2S2_RX), -}; - -struct platform_device s5pc100_device_iis2 = { - .name = "samsung-i2s", - .id = 2, - .num_resources = ARRAY_SIZE(s5pc100_iis2_resource), - .resource = s5pc100_iis2_resource, - .dev = { - .platform_data = &i2sv3_pdata, - }, -}; - -/* PCM Controller platform_devices */ - -static int s5pc100_pcm_cfg_gpio(struct platform_device *pdev) -{ - switch (pdev->id) { - case 0: - s3c_gpio_cfgpin_range(S5PC100_GPG3(0), 5, S3C_GPIO_SFN(5)); - break; - - case 1: - s3c_gpio_cfgpin_range(S5PC100_GPC(0), 5, S3C_GPIO_SFN(3)); - break; - - default: - printk(KERN_DEBUG "Invalid PCM Controller number!"); - return -EINVAL; - } - - return 0; -} - -static struct s3c_audio_pdata s3c_pcm_pdata = { - .cfg_gpio = s5pc100_pcm_cfg_gpio, -}; - -static struct resource s5pc100_pcm0_resource[] = { - [0] = DEFINE_RES_MEM(S5PC100_PA_PCM0, SZ_256), - [1] = DEFINE_RES_DMA(DMACH_PCM0_TX), - [2] = DEFINE_RES_DMA(DMACH_PCM0_RX), -}; - -struct platform_device s5pc100_device_pcm0 = { - .name = "samsung-pcm", - .id = 0, - .num_resources = ARRAY_SIZE(s5pc100_pcm0_resource), - .resource = s5pc100_pcm0_resource, - .dev = { - .platform_data = &s3c_pcm_pdata, - }, -}; - -static struct resource s5pc100_pcm1_resource[] = { - [0] = DEFINE_RES_MEM(S5PC100_PA_PCM1, SZ_256), - [1] = DEFINE_RES_DMA(DMACH_PCM1_TX), - [2] = DEFINE_RES_DMA(DMACH_PCM1_RX), -}; - -struct platform_device s5pc100_device_pcm1 = { - .name = "samsung-pcm", - .id = 1, - .num_resources = ARRAY_SIZE(s5pc100_pcm1_resource), - .resource = s5pc100_pcm1_resource, - .dev = { - .platform_data = &s3c_pcm_pdata, - }, -}; - -/* AC97 Controller platform devices */ - -static int s5pc100_ac97_cfg_gpio(struct platform_device *pdev) -{ - return s3c_gpio_cfgpin_range(S5PC100_GPC(0), 5, S3C_GPIO_SFN(4)); -} - -static struct resource s5pc100_ac97_resource[] = { - [0] = DEFINE_RES_MEM(S5PC100_PA_AC97, SZ_256), - [1] = DEFINE_RES_DMA(DMACH_AC97_PCMOUT), - [2] = DEFINE_RES_DMA(DMACH_AC97_PCMIN), - [3] = DEFINE_RES_DMA(DMACH_AC97_MICIN), - [4] = DEFINE_RES_IRQ(IRQ_AC97), -}; - -static struct s3c_audio_pdata s3c_ac97_pdata = { - .cfg_gpio = s5pc100_ac97_cfg_gpio, -}; - -static u64 s5pc100_ac97_dmamask = DMA_BIT_MASK(32); - -struct platform_device s5pc100_device_ac97 = { - .name = "samsung-ac97", - .id = -1, - .num_resources = ARRAY_SIZE(s5pc100_ac97_resource), - .resource = s5pc100_ac97_resource, - .dev = { - .platform_data = &s3c_ac97_pdata, - .dma_mask = &s5pc100_ac97_dmamask, - .coherent_dma_mask = DMA_BIT_MASK(32), - }, -}; - -/* S/PDIF Controller platform_device */ -static int s5pc100_spdif_cfg_gpd(struct platform_device *pdev) -{ - s3c_gpio_cfgpin_range(S5PC100_GPD(5), 2, S3C_GPIO_SFN(3)); - - return 0; -} - -static int s5pc100_spdif_cfg_gpg3(struct platform_device *pdev) -{ - s3c_gpio_cfgpin_range(S5PC100_GPG3(5), 2, S3C_GPIO_SFN(3)); - - return 0; -} - -static struct resource s5pc100_spdif_resource[] = { - [0] = DEFINE_RES_MEM(S5PC100_PA_SPDIF, SZ_256), - [1] = DEFINE_RES_DMA(DMACH_SPDIF), -}; - -static struct s3c_audio_pdata s5p_spdif_pdata = { - .cfg_gpio = s5pc100_spdif_cfg_gpd, -}; - -static u64 s5pc100_spdif_dmamask = DMA_BIT_MASK(32); - -struct platform_device s5pc100_device_spdif = { - .name = "samsung-spdif", - .id = -1, - .num_resources = ARRAY_SIZE(s5pc100_spdif_resource), - .resource = s5pc100_spdif_resource, - .dev = { - .platform_data = &s5p_spdif_pdata, - .dma_mask = &s5pc100_spdif_dmamask, - .coherent_dma_mask = DMA_BIT_MASK(32), - }, -}; - -void __init s5pc100_spdif_setup_gpio(int gpio) -{ - if (gpio == S5PC100_SPDIF_GPD) - s5p_spdif_pdata.cfg_gpio = s5pc100_spdif_cfg_gpd; - else - s5p_spdif_pdata.cfg_gpio = s5pc100_spdif_cfg_gpg3; -} diff --git a/arch/arm/mach-s5pc100/dma.c b/arch/arm/mach-s5pc100/dma.c deleted file mode 100644 index b1418409709e..000000000000 --- a/arch/arm/mach-s5pc100/dma.c +++ /dev/null @@ -1,130 +0,0 @@ -/* linux/arch/arm/mach-s5pc100/dma.c - * - * Copyright (c) 2011 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * Copyright (C) 2010 Samsung Electronics Co. Ltd. - * Jaswinder Singh <jassi.brar@samsung.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. - */ - -#include <linux/dma-mapping.h> -#include <linux/amba/bus.h> -#include <linux/amba/pl330.h> - -#include <asm/irq.h> -#include <plat/devs.h> -#include <plat/irqs.h> - -#include <mach/map.h> -#include <mach/irqs.h> -#include <mach/dma.h> - -static u8 pdma0_peri[] = { - DMACH_UART0_RX, - DMACH_UART0_TX, - DMACH_UART1_RX, - DMACH_UART1_TX, - DMACH_UART2_RX, - DMACH_UART2_TX, - DMACH_UART3_RX, - DMACH_UART3_TX, - DMACH_IRDA, - DMACH_I2S0_RX, - DMACH_I2S0_TX, - DMACH_I2S0S_TX, - DMACH_I2S1_RX, - DMACH_I2S1_TX, - DMACH_I2S2_RX, - DMACH_I2S2_TX, - DMACH_SPI0_RX, - DMACH_SPI0_TX, - DMACH_SPI1_RX, - DMACH_SPI1_TX, - DMACH_SPI2_RX, - DMACH_SPI2_TX, - DMACH_AC97_MICIN, - DMACH_AC97_PCMIN, - DMACH_AC97_PCMOUT, - DMACH_EXTERNAL, - DMACH_PWM, - DMACH_SPDIF, - DMACH_HSI_RX, - DMACH_HSI_TX, -}; - -static struct dma_pl330_platdata s5pc100_pdma0_pdata = { - .nr_valid_peri = ARRAY_SIZE(pdma0_peri), - .peri_id = pdma0_peri, -}; - -static AMBA_AHB_DEVICE(s5pc100_pdma0, "dma-pl330.0", 0x00041330, - S5PC100_PA_PDMA0, {IRQ_PDMA0}, &s5pc100_pdma0_pdata); - -static u8 pdma1_peri[] = { - DMACH_UART0_RX, - DMACH_UART0_TX, - DMACH_UART1_RX, - DMACH_UART1_TX, - DMACH_UART2_RX, - DMACH_UART2_TX, - DMACH_UART3_RX, - DMACH_UART3_TX, - DMACH_IRDA, - DMACH_I2S0_RX, - DMACH_I2S0_TX, - DMACH_I2S0S_TX, - DMACH_I2S1_RX, - DMACH_I2S1_TX, - DMACH_I2S2_RX, - DMACH_I2S2_TX, - DMACH_SPI0_RX, - DMACH_SPI0_TX, - DMACH_SPI1_RX, - DMACH_SPI1_TX, - DMACH_SPI2_RX, - DMACH_SPI2_TX, - DMACH_PCM0_RX, - DMACH_PCM0_TX, - DMACH_PCM1_RX, - DMACH_PCM1_TX, - DMACH_MSM_REQ0, - DMACH_MSM_REQ1, - DMACH_MSM_REQ2, - DMACH_MSM_REQ3, -}; - -static struct dma_pl330_platdata s5pc100_pdma1_pdata = { - .nr_valid_peri = ARRAY_SIZE(pdma1_peri), - .peri_id = pdma1_peri, -}; - -static AMBA_AHB_DEVICE(s5pc100_pdma1, "dma-pl330.1", 0x00041330, - S5PC100_PA_PDMA1, {IRQ_PDMA1}, &s5pc100_pdma1_pdata); - -static int __init s5pc100_dma_init(void) -{ - dma_cap_set(DMA_SLAVE, s5pc100_pdma0_pdata.cap_mask); - dma_cap_set(DMA_CYCLIC, s5pc100_pdma0_pdata.cap_mask); - amba_device_register(&s5pc100_pdma0_device, &iomem_resource); - - dma_cap_set(DMA_SLAVE, s5pc100_pdma1_pdata.cap_mask); - dma_cap_set(DMA_CYCLIC, s5pc100_pdma1_pdata.cap_mask); - amba_device_register(&s5pc100_pdma1_device, &iomem_resource); - - return 0; -} -arch_initcall(s5pc100_dma_init); diff --git a/arch/arm/mach-s5pc100/include/mach/debug-macro.S b/arch/arm/mach-s5pc100/include/mach/debug-macro.S deleted file mode 100644 index 22c23859e45e..000000000000 --- a/arch/arm/mach-s5pc100/include/mach/debug-macro.S +++ /dev/null @@ -1,39 +0,0 @@ -/* arch/arm/mach-s5pc100/include/mach/debug-macro.S - * - * Copyright 2009 Samsung Electronics Co. - * Byungho Min <bhmin@samsung.com> - * - * - * Based on mach-s3c6400/include/mach/debug-macro.S - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -/* pull in the relevant register and map files. */ - -#include <linux/serial_s3c.h> -#include <mach/map.h> - - /* note, for the boot process to work we have to keep the UART - * virtual address aligned to an 1MiB boundary for the L1 - * mapping the head code makes. We keep the UART virtual address - * aligned and add in the offset when we load the value here. - */ - - .macro addruart, rp, rv, tmp - ldr \rp, = S3C_PA_UART - ldr \rv, = S3C_VA_UART -#if CONFIG_DEBUG_S3C_UART != 0 - add \rp, \rp, #(0x400 * CONFIG_DEBUG_S3C_UART) - add \rv, \rv, #(0x400 * CONFIG_DEBUG_S3C_UART) -#endif - .endm - -/* include the reset of the code which will do the work, we're only - * compiling for a single cpu processor type so the default of s3c2440 - * will be fine with us. - */ - -#include <debug/samsung.S> diff --git a/arch/arm/mach-s5pc100/include/mach/dma.h b/arch/arm/mach-s5pc100/include/mach/dma.h deleted file mode 100644 index 201842a3769e..000000000000 --- a/arch/arm/mach-s5pc100/include/mach/dma.h +++ /dev/null @@ -1,26 +0,0 @@ -/* - * Copyright (C) 2010 Samsung Electronics Co. Ltd. - * Jaswinder Singh <jassi.brar@samsung.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. - */ - -#ifndef __MACH_DMA_H -#define __MACH_DMA_H - -/* This platform uses the common DMA API driver for PL330 */ -#include <plat/dma-pl330.h> - -#endif /* __MACH_DMA_H */ diff --git a/arch/arm/mach-s5pc100/include/mach/entry-macro.S b/arch/arm/mach-s5pc100/include/mach/entry-macro.S deleted file mode 100644 index bad0700457db..000000000000 --- a/arch/arm/mach-s5pc100/include/mach/entry-macro.S +++ /dev/null @@ -1,19 +0,0 @@ -/* arch/arm/mach-s5pc100/include/mach/entry-macro.S - * - * Copyright 2009 Samsung Electronics Co. - * Byungho Min <bhmin@samsung.com> - * - * Based on mach-s3c6400/include/mach/entry-macro.S - * - * Low-level IRQ helper macros for the Samsung S5PC1XX series - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. -*/ - - .macro get_irqnr_preamble, base, tmp - .endm - - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp - .endm diff --git a/arch/arm/mach-s5pc100/include/mach/gpio.h b/arch/arm/mach-s5pc100/include/mach/gpio.h deleted file mode 100644 index 5e1a924b595f..000000000000 --- a/arch/arm/mach-s5pc100/include/mach/gpio.h +++ /dev/null @@ -1,144 +0,0 @@ -/* arch/arm/mach-s5pc100/include/mach/gpio.h - * - * Copyright 2009 Samsung Electronics Co. - * Byungho Min <bhmin@samsung.com> - * - * S5PC100 - GPIO lib support - * - * Base on mach-s3c6400/include/mach/gpio.h - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARCH_GPIO_H -#define __ASM_ARCH_GPIO_H __FILE__ - -/* GPIO bank sizes */ -#define S5PC100_GPIO_A0_NR (8) -#define S5PC100_GPIO_A1_NR (5) -#define S5PC100_GPIO_B_NR (8) -#define S5PC100_GPIO_C_NR (5) -#define S5PC100_GPIO_D_NR (7) -#define S5PC100_GPIO_E0_NR (8) -#define S5PC100_GPIO_E1_NR (6) -#define S5PC100_GPIO_F0_NR (8) -#define S5PC100_GPIO_F1_NR (8) -#define S5PC100_GPIO_F2_NR (8) -#define S5PC100_GPIO_F3_NR (4) -#define S5PC100_GPIO_G0_NR (8) -#define S5PC100_GPIO_G1_NR (3) -#define S5PC100_GPIO_G2_NR (7) -#define S5PC100_GPIO_G3_NR (7) -#define S5PC100_GPIO_H0_NR (8) -#define S5PC100_GPIO_H1_NR (8) -#define S5PC100_GPIO_H2_NR (8) -#define S5PC100_GPIO_H3_NR (8) -#define S5PC100_GPIO_I_NR (8) -#define S5PC100_GPIO_J0_NR (8) -#define S5PC100_GPIO_J1_NR (5) -#define S5PC100_GPIO_J2_NR (8) -#define S5PC100_GPIO_J3_NR (8) -#define S5PC100_GPIO_J4_NR (4) -#define S5PC100_GPIO_K0_NR (8) -#define S5PC100_GPIO_K1_NR (6) -#define S5PC100_GPIO_K2_NR (8) -#define S5PC100_GPIO_K3_NR (8) -#define S5PC100_GPIO_L0_NR (8) -#define S5PC100_GPIO_L1_NR (8) -#define S5PC100_GPIO_L2_NR (8) -#define S5PC100_GPIO_L3_NR (8) -#define S5PC100_GPIO_L4_NR (8) - -/* GPIO bank numbes */ - -/* CONFIG_S3C_GPIO_SPACE allows the user to select extra - * space for debugging purposes so that any accidental - * change from one gpio bank to another can be caught. -*/ - -#define S5PC100_GPIO_NEXT(__gpio) \ - ((__gpio##_START) + (__gpio##_NR) + CONFIG_S3C_GPIO_SPACE + 1) - -enum s5p_gpio_number { - S5PC100_GPIO_A0_START = 0, - S5PC100_GPIO_A1_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_A0), - S5PC100_GPIO_B_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_A1), - S5PC100_GPIO_C_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_B), - S5PC100_GPIO_D_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_C), - S5PC100_GPIO_E0_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_D), - S5PC100_GPIO_E1_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_E0), - S5PC100_GPIO_F0_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_E1), - S5PC100_GPIO_F1_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_F0), - S5PC100_GPIO_F2_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_F1), - S5PC100_GPIO_F3_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_F2), - S5PC100_GPIO_G0_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_F3), - S5PC100_GPIO_G1_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_G0), - S5PC100_GPIO_G2_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_G1), - S5PC100_GPIO_G3_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_G2), - S5PC100_GPIO_H0_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_G3), - S5PC100_GPIO_H1_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_H0), - S5PC100_GPIO_H2_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_H1), - S5PC100_GPIO_H3_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_H2), - S5PC100_GPIO_I_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_H3), - S5PC100_GPIO_J0_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_I), - S5PC100_GPIO_J1_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_J0), - S5PC100_GPIO_J2_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_J1), - S5PC100_GPIO_J3_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_J2), - S5PC100_GPIO_J4_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_J3), - S5PC100_GPIO_K0_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_J4), - S5PC100_GPIO_K1_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_K0), - S5PC100_GPIO_K2_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_K1), - S5PC100_GPIO_K3_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_K2), - S5PC100_GPIO_L0_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_K3), - S5PC100_GPIO_L1_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_L0), - S5PC100_GPIO_L2_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_L1), - S5PC100_GPIO_L3_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_L2), - S5PC100_GPIO_L4_START = S5PC100_GPIO_NEXT(S5PC100_GPIO_L3), - S5PC100_GPIO_END = S5PC100_GPIO_NEXT(S5PC100_GPIO_L4), -}; - -/* S5PC100 GPIO number definitions. */ -#define S5PC100_GPA0(_nr) (S5PC100_GPIO_A0_START + (_nr)) -#define S5PC100_GPA1(_nr) (S5PC100_GPIO_A1_START + (_nr)) -#define S5PC100_GPB(_nr) (S5PC100_GPIO_B_START + (_nr)) -#define S5PC100_GPC(_nr) (S5PC100_GPIO_C_START + (_nr)) -#define S5PC100_GPD(_nr) (S5PC100_GPIO_D_START + (_nr)) -#define S5PC100_GPE0(_nr) (S5PC100_GPIO_E0_START + (_nr)) -#define S5PC100_GPE1(_nr) (S5PC100_GPIO_E1_START + (_nr)) -#define S5PC100_GPF0(_nr) (S5PC100_GPIO_F0_START + (_nr)) -#define S5PC100_GPF1(_nr) (S5PC100_GPIO_F1_START + (_nr)) -#define S5PC100_GPF2(_nr) (S5PC100_GPIO_F2_START + (_nr)) -#define S5PC100_GPF3(_nr) (S5PC100_GPIO_F3_START + (_nr)) -#define S5PC100_GPG0(_nr) (S5PC100_GPIO_G0_START + (_nr)) -#define S5PC100_GPG1(_nr) (S5PC100_GPIO_G1_START + (_nr)) -#define S5PC100_GPG2(_nr) (S5PC100_GPIO_G2_START + (_nr)) -#define S5PC100_GPG3(_nr) (S5PC100_GPIO_G3_START + (_nr)) -#define S5PC100_GPH0(_nr) (S5PC100_GPIO_H0_START + (_nr)) -#define S5PC100_GPH1(_nr) (S5PC100_GPIO_H1_START + (_nr)) -#define S5PC100_GPH2(_nr) (S5PC100_GPIO_H2_START + (_nr)) -#define S5PC100_GPH3(_nr) (S5PC100_GPIO_H3_START + (_nr)) -#define S5PC100_GPI(_nr) (S5PC100_GPIO_I_START + (_nr)) -#define S5PC100_GPJ0(_nr) (S5PC100_GPIO_J0_START + (_nr)) -#define S5PC100_GPJ1(_nr) (S5PC100_GPIO_J1_START + (_nr)) -#define S5PC100_GPJ2(_nr) (S5PC100_GPIO_J2_START + (_nr)) -#define S5PC100_GPJ3(_nr) (S5PC100_GPIO_J3_START + (_nr)) -#define S5PC100_GPJ4(_nr) (S5PC100_GPIO_J4_START + (_nr)) -#define S5PC100_GPK0(_nr) (S5PC100_GPIO_K0_START + (_nr)) -#define S5PC100_GPK1(_nr) (S5PC100_GPIO_K1_START + (_nr)) -#define S5PC100_GPK2(_nr) (S5PC100_GPIO_K2_START + (_nr)) -#define S5PC100_GPK3(_nr) (S5PC100_GPIO_K3_START + (_nr)) -#define S5PC100_GPL0(_nr) (S5PC100_GPIO_L0_START + (_nr)) -#define S5PC100_GPL1(_nr) (S5PC100_GPIO_L1_START + (_nr)) -#define S5PC100_GPL2(_nr) (S5PC100_GPIO_L2_START + (_nr)) -#define S5PC100_GPL3(_nr) (S5PC100_GPIO_L3_START + (_nr)) -#define S5PC100_GPL4(_nr) (S5PC100_GPIO_L4_START + (_nr)) - -/* It used the end of the S5PC100 gpios */ -#define S3C_GPIO_END S5PC100_GPIO_END - -/* define the number of gpios we need to the one after the MP04() range */ -#define ARCH_NR_GPIOS (S5PC100_GPIO_END + 1) - -#endif /* __ASM_ARCH_GPIO_H */ diff --git a/arch/arm/mach-s5pc100/include/mach/hardware.h b/arch/arm/mach-s5pc100/include/mach/hardware.h deleted file mode 100644 index 6b38618c2fd9..000000000000 --- a/arch/arm/mach-s5pc100/include/mach/hardware.h +++ /dev/null @@ -1,14 +0,0 @@ -/* linux/arch/arm/mach-s5pc100/include/mach/hardware.h - * - * Copyright 2009 Samsung Electronics Co. - * Byungho Min <bhmin@samsung.com> - * - * S5PC100 - Hardware support - */ - -#ifndef __ASM_ARCH_HARDWARE_H -#define __ASM_ARCH_HARDWARE_H __FILE__ - -/* currently nothing here, placeholder */ - -#endif /* __ASM_ARCH_HARDWARE_H */ diff --git a/arch/arm/mach-s5pc100/include/mach/irqs.h b/arch/arm/mach-s5pc100/include/mach/irqs.h deleted file mode 100644 index d2eb4757381f..000000000000 --- a/arch/arm/mach-s5pc100/include/mach/irqs.h +++ /dev/null @@ -1,115 +0,0 @@ -/* linux/arch/arm/mach-s5pc100/include/mach/irqs.h - * - * Copyright 2009 Samsung Electronics Co. - * Byungho Min <bhmin@samsung.com> - * - * S5PC100 - IRQ definitions - */ - -#ifndef __ASM_ARCH_IRQS_H -#define __ASM_ARCH_IRQS_H __FILE__ - -#include <plat/irqs.h> - -/* VIC0: system, DMA, timer */ -#define IRQ_EINT16_31 S5P_IRQ_VIC0(16) -#define IRQ_BATF S5P_IRQ_VIC0(17) -#define IRQ_MDMA S5P_IRQ_VIC0(18) -#define IRQ_PDMA0 S5P_IRQ_VIC0(19) -#define IRQ_PDMA1 S5P_IRQ_VIC0(20) -#define IRQ_TIMER0_VIC S5P_IRQ_VIC0(21) -#define IRQ_TIMER1_VIC S5P_IRQ_VIC0(22) -#define IRQ_TIMER2_VIC S5P_IRQ_VIC0(23) -#define IRQ_TIMER3_VIC S5P_IRQ_VIC0(24) -#define IRQ_TIMER4_VIC S5P_IRQ_VIC0(25) -#define IRQ_SYSTIMER S5P_IRQ_VIC0(26) -#define IRQ_WDT S5P_IRQ_VIC0(27) -#define IRQ_RTC_ALARM S5P_IRQ_VIC0(28) -#define IRQ_RTC_TIC S5P_IRQ_VIC0(29) -#define IRQ_GPIOINT S5P_IRQ_VIC0(30) - -/* VIC1: ARM, power, memory, connectivity */ -#define IRQ_PMU S5P_IRQ_VIC1(0) -#define IRQ_CORTEX1 S5P_IRQ_VIC1(1) -#define IRQ_CORTEX2 S5P_IRQ_VIC1(2) -#define IRQ_CORTEX3 S5P_IRQ_VIC1(3) -#define IRQ_CORTEX4 S5P_IRQ_VIC1(4) -#define IRQ_IEMAPC S5P_IRQ_VIC1(5) -#define IRQ_IEMIEC S5P_IRQ_VIC1(6) -#define IRQ_ONENAND S5P_IRQ_VIC1(7) -#define IRQ_NFC S5P_IRQ_VIC1(8) -#define IRQ_CFCON S5P_IRQ_VIC1(9) -#define IRQ_UART0 S5P_IRQ_VIC1(10) -#define IRQ_UART1 S5P_IRQ_VIC1(11) -#define IRQ_UART2 S5P_IRQ_VIC1(12) -#define IRQ_UART3 S5P_IRQ_VIC1(13) -#define IRQ_IIC S5P_IRQ_VIC1(14) -#define IRQ_SPI0 S5P_IRQ_VIC1(15) -#define IRQ_SPI1 S5P_IRQ_VIC1(16) -#define IRQ_SPI2 S5P_IRQ_VIC1(17) -#define IRQ_IRDA S5P_IRQ_VIC1(18) -#define IRQ_IIC2 S5P_IRQ_VIC1(19) -#define IRQ_IIC3 S5P_IRQ_VIC1(20) -#define IRQ_HSIRX S5P_IRQ_VIC1(21) -#define IRQ_HSITX S5P_IRQ_VIC1(22) -#define IRQ_UHOST S5P_IRQ_VIC1(23) -#define IRQ_OTG S5P_IRQ_VIC1(24) -#define IRQ_MSM S5P_IRQ_VIC1(25) -#define IRQ_HSMMC0 S5P_IRQ_VIC1(26) -#define IRQ_HSMMC1 S5P_IRQ_VIC1(27) -#define IRQ_HSMMC2 S5P_IRQ_VIC1(28) -#define IRQ_MIPICSI S5P_IRQ_VIC1(29) -#define IRQ_MIPIDSI S5P_IRQ_VIC1(30) - -/* VIC2: multimedia, audio, security */ -#define IRQ_LCD0 S5P_IRQ_VIC2(0) -#define IRQ_LCD1 S5P_IRQ_VIC2(1) -#define IRQ_LCD2 S5P_IRQ_VIC2(2) -#define IRQ_LCD3 S5P_IRQ_VIC2(3) -#define IRQ_ROTATOR S5P_IRQ_VIC2(4) -#define IRQ_FIMC0 S5P_IRQ_VIC2(5) -#define IRQ_FIMC1 S5P_IRQ_VIC2(6) -#define IRQ_FIMC2 S5P_IRQ_VIC2(7) -#define IRQ_JPEG S5P_IRQ_VIC2(8) -#define IRQ_2D S5P_IRQ_VIC2(9) -#define IRQ_3D S5P_IRQ_VIC2(10) -#define IRQ_MIXER S5P_IRQ_VIC2(11) -#define IRQ_HDMI S5P_IRQ_VIC2(12) -#define IRQ_IIC1 S5P_IRQ_VIC2(13) -#define IRQ_MFC S5P_IRQ_VIC2(14) -#define IRQ_TVENC S5P_IRQ_VIC2(15) -#define IRQ_I2S0 S5P_IRQ_VIC2(16) -#define IRQ_I2S1 S5P_IRQ_VIC2(17) -#define IRQ_I2S2 S5P_IRQ_VIC2(18) -#define IRQ_AC97 S5P_IRQ_VIC2(19) -#define IRQ_PCM0 S5P_IRQ_VIC2(20) -#define IRQ_PCM1 S5P_IRQ_VIC2(21) -#define IRQ_SPDIF S5P_IRQ_VIC2(22) -#define IRQ_ADC S5P_IRQ_VIC2(23) -#define IRQ_PENDN S5P_IRQ_VIC2(24) -#define IRQ_TC IRQ_PENDN -#define IRQ_KEYPAD S5P_IRQ_VIC2(25) -#define IRQ_CG S5P_IRQ_VIC2(26) -#define IRQ_SEC S5P_IRQ_VIC2(27) -#define IRQ_SECRX S5P_IRQ_VIC2(28) -#define IRQ_SECTX S5P_IRQ_VIC2(29) -#define IRQ_SDMIRQ S5P_IRQ_VIC2(30) -#define IRQ_SDMFIQ S5P_IRQ_VIC2(31) -#define IRQ_VIC_END S5P_IRQ_VIC2(31) - -#define S5P_EINT_BASE1 (S5P_IRQ_VIC0(0)) -#define S5P_EINT_BASE2 (IRQ_VIC_END + 1) - -/* GPIO interrupt */ -#define S5P_GPIOINT_BASE (IRQ_EINT(31) + 1) -#define S5P_GPIOINT_GROUP_MAXNR 21 - -/* Set the default NR_IRQS */ -#define NR_IRQS (IRQ_EINT(31) + S5P_GPIOINT_COUNT + 1) - -/* Compatibility */ -#define IRQ_LCD_FIFO IRQ_LCD0 -#define IRQ_LCD_VSYNC IRQ_LCD1 -#define IRQ_LCD_SYSTEM IRQ_LCD2 - -#endif /* __ASM_ARCH_IRQS_H */ diff --git a/arch/arm/mach-s5pc100/include/mach/map.h b/arch/arm/mach-s5pc100/include/mach/map.h deleted file mode 100644 index 2550b6112b82..000000000000 --- a/arch/arm/mach-s5pc100/include/mach/map.h +++ /dev/null @@ -1,137 +0,0 @@ -/* linux/arch/arm/mach-s5pc100/include/mach/map.h - * - * Copyright (c) 2011 Samsung Electronics Co., Ltd. - * http://www.samsung.com/ - * - * Copyright 2009 Samsung Electronics Co. - * Byungho Min <bhmin@samsung.com> - * - * S5PC100 - Memory map definitions - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARCH_MAP_H -#define __ASM_ARCH_MAP_H __FILE__ - -#include <plat/map-base.h> -#include <plat/map-s5p.h> - -#define S5PC100_PA_SDRAM 0x20000000 - -#define S5PC100_PA_ONENAND 0xE7100000 -#define S5PC100_PA_ONENAND_BUF 0xB0000000 - -#define S5PC100_PA_CHIPID 0xE0000000 - -#define S5PC100_PA_SYSCON 0xE0100000 - -#define S5PC100_PA_OTHERS 0xE0200000 - -#define S5PC100_PA_GPIO 0xE0300000 - -#define S5PC100_PA_VIC0 0xE4000000 -#define S5PC100_PA_VIC1 0xE4100000 -#define S5PC100_PA_VIC2 0xE4200000 - -#define S5PC100_PA_SROMC 0xE7000000 - -#define S5PC100_PA_CFCON 0xE7800000 - -#define S5PC100_PA_MDMA 0xE8100000 -#define S5PC100_PA_PDMA0 0xE9000000 -#define S5PC100_PA_PDMA1 0xE9200000 - -#define S5PC100_PA_TIMER 0xEA000000 -#define S5PC100_PA_SYSTIMER 0xEA100000 -#define S5PC100_PA_WATCHDOG 0xEA200000 -#define S5PC100_PA_RTC 0xEA300000 - -#define S5PC100_PA_UART 0xEC000000 - -#define S5PC100_PA_IIC0 0xEC100000 -#define S5PC100_PA_IIC1 0xEC200000 - -#define S5PC100_PA_SPI0 0xEC300000 -#define S5PC100_PA_SPI1 0xEC400000 -#define S5PC100_PA_SPI2 0xEC500000 - -#define S5PC100_PA_USB_HSOTG 0xED200000 -#define S5PC100_PA_USB_HSPHY 0xED300000 - -#define S5PC100_PA_HSMMC(x) (0xED800000 + ((x) * 0x100000)) - -#define S5PC100_PA_FB 0xEE000000 - -#define S5PC100_PA_FIMC0 0xEE200000 -#define S5PC100_PA_FIMC1 0xEE300000 -#define S5PC100_PA_FIMC2 0xEE400000 - -#define S5PC100_PA_I2S0 0xF2000000 -#define S5PC100_PA_I2S1 0xF2100000 -#define S5PC100_PA_I2S2 0xF2200000 - -#define S5PC100_PA_AC97 0xF2300000 - -#define S5PC100_PA_PCM0 0xF2400000 -#define S5PC100_PA_PCM1 0xF2500000 - -#define S5PC100_PA_SPDIF 0xF2600000 - -#define S5PC100_PA_TSADC 0xF3000000 - -#define S5PC100_PA_KEYPAD 0xF3100000 - -/* Compatibiltiy Defines */ - -#define S3C_PA_FB S5PC100_PA_FB -#define S3C_PA_HSMMC0 S5PC100_PA_HSMMC(0) -#define S3C_PA_HSMMC1 S5PC100_PA_HSMMC(1) -#define S3C_PA_HSMMC2 S5PC100_PA_HSMMC(2) -#define S3C_PA_IIC S5PC100_PA_IIC0 -#define S3C_PA_IIC1 S5PC100_PA_IIC1 -#define S3C_PA_KEYPAD S5PC100_PA_KEYPAD -#define S3C_PA_ONENAND S5PC100_PA_ONENAND -#define S3C_PA_ONENAND_BUF S5PC100_PA_ONENAND_BUF -#define S3C_PA_RTC S5PC100_PA_RTC -#define S3C_PA_TSADC S5PC100_PA_TSADC -#define S3C_PA_USB_HSOTG S5PC100_PA_USB_HSOTG -#define S3C_PA_USB_HSPHY S5PC100_PA_USB_HSPHY -#define S3C_PA_WDT S5PC100_PA_WATCHDOG -#define S3C_PA_SPI0 S5PC100_PA_SPI0 -#define S3C_PA_SPI1 S5PC100_PA_SPI1 -#define S3C_PA_SPI2 S5PC100_PA_SPI2 - -#define S5P_PA_CHIPID S5PC100_PA_CHIPID -#define S5P_PA_FIMC0 S5PC100_PA_FIMC0 -#define S5P_PA_FIMC1 S5PC100_PA_FIMC1 -#define S5P_PA_FIMC2 S5PC100_PA_FIMC2 -#define S5P_PA_SDRAM S5PC100_PA_SDRAM -#define S5P_PA_SROMC S5PC100_PA_SROMC -#define S5P_PA_SYSCON S5PC100_PA_SYSCON -#define S5P_PA_TIMER S5PC100_PA_TIMER - -#define SAMSUNG_PA_ADC S5PC100_PA_TSADC -#define SAMSUNG_PA_CFCON S5PC100_PA_CFCON -#define SAMSUNG_PA_KEYPAD S5PC100_PA_KEYPAD -#define SAMSUNG_PA_TIMER S5PC100_PA_TIMER - -#define S5PC100_VA_OTHERS (S3C_VA_SYS + 0x10000) - -#define S3C_SZ_ONENAND_BUF (SZ_256M - SZ_32M) - -/* UART */ - -#define S3C_PA_UART S5PC100_PA_UART - -#define S5P_PA_UART(x) (S3C_PA_UART + ((x) * S3C_UART_OFFSET)) -#define S5P_PA_UART0 S5P_PA_UART(0) -#define S5P_PA_UART1 S5P_PA_UART(1) -#define S5P_PA_UART2 S5P_PA_UART(2) -#define S5P_PA_UART3 S5P_PA_UART(3) - -#define S5P_SZ_UART SZ_256 - -#endif /* __ASM_ARCH_MAP_H */ diff --git a/arch/arm/mach-s5pc100/include/mach/regs-clock.h b/arch/arm/mach-s5pc100/include/mach/regs-clock.h deleted file mode 100644 index bc92da2e0ba2..000000000000 --- a/arch/arm/mach-s5pc100/include/mach/regs-clock.h +++ /dev/null @@ -1,80 +0,0 @@ -/* linux/arch/arm/mach-s5pc100/include/mach/regs-clock.h - * - * Copyright (c) 2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com/ - * - * S5PC100 - Clock register definitions - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARCH_REGS_CLOCK_H -#define __ASM_ARCH_REGS_CLOCK_H __FILE__ - -#include <mach/map.h> - -#define S5P_CLKREG(x) (S3C_VA_SYS + (x)) - -#define S5PC100_REG_OTHERS(x) (S5PC100_VA_OTHERS + (x)) - -#define S5P_APLL_LOCK S5P_CLKREG(0x00) -#define S5P_MPLL_LOCK S5P_CLKREG(0x04) -#define S5P_EPLL_LOCK S5P_CLKREG(0x08) -#define S5P_HPLL_LOCK S5P_CLKREG(0x0C) - -#define S5P_APLL_CON S5P_CLKREG(0x100) -#define S5P_MPLL_CON S5P_CLKREG(0x104) -#define S5P_EPLL_CON S5P_CLKREG(0x108) -#define S5P_HPLL_CON S5P_CLKREG(0x10C) - -#define S5P_CLK_SRC0 S5P_CLKREG(0x200) -#define S5P_CLK_SRC1 S5P_CLKREG(0x204) -#define S5P_CLK_SRC2 S5P_CLKREG(0x208) -#define S5P_CLK_SRC3 S5P_CLKREG(0x20C) - -#define S5P_CLK_DIV0 S5P_CLKREG(0x300) -#define S5P_CLK_DIV1 S5P_CLKREG(0x304) -#define S5P_CLK_DIV2 S5P_CLKREG(0x308) -#define S5P_CLK_DIV3 S5P_CLKREG(0x30C) -#define S5P_CLK_DIV4 S5P_CLKREG(0x310) - -#define S5P_CLK_OUT S5P_CLKREG(0x400) - -#define S5P_CLKGATE_D00 S5P_CLKREG(0x500) -#define S5P_CLKGATE_D01 S5P_CLKREG(0x504) -#define S5P_CLKGATE_D02 S5P_CLKREG(0x508) - -#define S5P_CLKGATE_D10 S5P_CLKREG(0x520) -#define S5P_CLKGATE_D11 S5P_CLKREG(0x524) -#define S5P_CLKGATE_D12 S5P_CLKREG(0x528) -#define S5P_CLKGATE_D13 S5P_CLKREG(0x52C) -#define S5P_CLKGATE_D14 S5P_CLKREG(0x530) -#define S5P_CLKGATE_D15 S5P_CLKREG(0x534) - -#define S5P_CLKGATE_D20 S5P_CLKREG(0x540) - -#define S5P_CLKGATE_SCLK0 S5P_CLKREG(0x560) -#define S5P_CLKGATE_SCLK1 S5P_CLKREG(0x564) - -/* CLKDIV0 */ -#define S5P_CLKDIV0_D0_MASK (0x7<<8) -#define S5P_CLKDIV0_D0_SHIFT (8) -#define S5P_CLKDIV0_PCLKD0_MASK (0x7<<12) -#define S5P_CLKDIV0_PCLKD0_SHIFT (12) - -/* CLKDIV1 */ -#define S5P_CLKDIV1_D1_MASK (0x7<<12) -#define S5P_CLKDIV1_D1_SHIFT (12) -#define S5P_CLKDIV1_PCLKD1_MASK (0x7<<16) -#define S5P_CLKDIV1_PCLKD1_SHIFT (16) - -#define S5PC100_SWRESET S5PC100_REG_OTHERS(0x000) -#define S5PC100_MEM_SYS_CFG S5PC100_REG_OTHERS(0x200) - -#define S5PC100_SWRESET_RESETVAL 0xc100 - -#define MEM_SYS_CFG_EBI_FIX_PRI_CFCON 0x30 - -#endif /* __ASM_ARCH_REGS_CLOCK_H */ diff --git a/arch/arm/mach-s5pc100/include/mach/regs-gpio.h b/arch/arm/mach-s5pc100/include/mach/regs-gpio.h deleted file mode 100644 index 0bf73209ec7b..000000000000 --- a/arch/arm/mach-s5pc100/include/mach/regs-gpio.h +++ /dev/null @@ -1,38 +0,0 @@ -/* linux/arch/arm/plat-s5pc100/include/plat/regs-gpio.h - * - * Copyright 2009 Samsung Electronics Co. - * Byungho Min <bhmin@samsung.com> - * - * S5PC100 - GPIO register definitions - */ - -#ifndef __ASM_MACH_S5PC100_REGS_GPIO_H -#define __ASM_MACH_S5PC100_REGS_GPIO_H __FILE__ - -#include <mach/map.h> - -#define S5PC100EINT30CON (S5P_VA_GPIO + 0xE00) -#define S5P_EINT_CON(x) (S5PC100EINT30CON + ((x) * 0x4)) - -#define S5PC100EINT30FLTCON0 (S5P_VA_GPIO + 0xE80) -#define S5P_EINT_FLTCON(x) (S5PC100EINT30FLTCON0 + ((x) * 0x4)) - -#define S5PC100EINT30MASK (S5P_VA_GPIO + 0xF00) -#define S5P_EINT_MASK(x) (S5PC100EINT30MASK + ((x) * 0x4)) - -#define S5PC100EINT30PEND (S5P_VA_GPIO + 0xF40) -#define S5P_EINT_PEND(x) (S5PC100EINT30PEND + ((x) * 0x4)) - -#define EINT_REG_NR(x) (EINT_OFFSET(x) >> 3) - -#define eint_irq_to_bit(irq) (1 << (EINT_OFFSET(irq) & 0x7)) - -#define EINT_MODE S3C_GPIO_SFN(0x2) - -#define EINT_GPIO_0(x) S5PC100_GPH0(x) -#define EINT_GPIO_1(x) S5PC100_GPH1(x) -#define EINT_GPIO_2(x) S5PC100_GPH2(x) -#define EINT_GPIO_3(x) S5PC100_GPH3(x) - -#endif /* __ASM_MACH_S5PC100_REGS_GPIO_H */ - diff --git a/arch/arm/mach-s5pc100/include/mach/regs-irq.h b/arch/arm/mach-s5pc100/include/mach/regs-irq.h deleted file mode 100644 index 761627897f30..000000000000 --- a/arch/arm/mach-s5pc100/include/mach/regs-irq.h +++ /dev/null @@ -1,18 +0,0 @@ -/* linux/arch/arm/mach-s5pc100/include/mach/regs-irq.h - * - * Copyright 2009 Samsung Electronics Co. - * Byungho Min <bhmin@samsung.com> - * - * S5PC100 - IRQ register definitions - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARCH_REGS_IRQ_H -#define __ASM_ARCH_REGS_IRQ_H __FILE__ - -#include <mach/map.h> - -#endif /* __ASM_ARCH_REGS_IRQ_H */ diff --git a/arch/arm/mach-s5pc100/mach-smdkc100.c b/arch/arm/mach-s5pc100/mach-smdkc100.c deleted file mode 100644 index 668af3ac31f3..000000000000 --- a/arch/arm/mach-s5pc100/mach-smdkc100.c +++ /dev/null @@ -1,264 +0,0 @@ -/* linux/arch/arm/mach-s5pc100/mach-smdkc100.c - * - * Copyright 2009 Samsung Electronics Co. - * Author: Byungho Min <bhmin@samsung.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * -*/ - -#include <linux/kernel.h> -#include <linux/types.h> -#include <linux/interrupt.h> -#include <linux/list.h> -#include <linux/timer.h> -#include <linux/init.h> -#include <linux/serial_core.h> -#include <linux/serial_s3c.h> -#include <linux/platform_device.h> -#include <linux/io.h> -#include <linux/gpio.h> -#include <linux/i2c.h> -#include <linux/fb.h> -#include <linux/delay.h> -#include <linux/input.h> -#include <linux/pwm_backlight.h> - -#include <asm/mach/arch.h> -#include <asm/mach/map.h> - -#include <mach/map.h> -#include <mach/regs-gpio.h> - -#include <video/platform_lcd.h> -#include <video/samsung_fimd.h> - -#include <asm/irq.h> -#include <asm/mach-types.h> - -#include <plat/gpio-cfg.h> - -#include <plat/clock.h> -#include <plat/devs.h> -#include <plat/cpu.h> -#include <plat/fb.h> -#include <linux/platform_data/i2c-s3c2410.h> -#include <linux/platform_data/ata-samsung_cf.h> -#include <plat/adc.h> -#include <plat/keypad.h> -#include <linux/platform_data/touchscreen-s3c2410.h> -#include <linux/platform_data/asoc-s3c.h> -#include <plat/backlight.h> -#include <plat/samsung-time.h> - -#include "common.h" - -/* Following are default values for UCON, ULCON and UFCON UART registers */ -#define SMDKC100_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ - S3C2410_UCON_RXILEVEL | \ - S3C2410_UCON_TXIRQMODE | \ - S3C2410_UCON_RXIRQMODE | \ - S3C2410_UCON_RXFIFO_TOI | \ - S3C2443_UCON_RXERR_IRQEN) - -#define SMDKC100_ULCON_DEFAULT S3C2410_LCON_CS8 - -#define SMDKC100_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \ - S3C2440_UFCON_RXTRIG8 | \ - S3C2440_UFCON_TXTRIG16) - -static struct s3c2410_uartcfg smdkc100_uartcfgs[] __initdata = { - [0] = { - .hwport = 0, - .flags = 0, - .ucon = SMDKC100_UCON_DEFAULT, - .ulcon = SMDKC100_ULCON_DEFAULT, - .ufcon = SMDKC100_UFCON_DEFAULT, - }, - [1] = { - .hwport = 1, - .flags = 0, - .ucon = SMDKC100_UCON_DEFAULT, - .ulcon = SMDKC100_ULCON_DEFAULT, - .ufcon = SMDKC100_UFCON_DEFAULT, - }, - [2] = { - .hwport = 2, - .flags = 0, - .ucon = SMDKC100_UCON_DEFAULT, - .ulcon = SMDKC100_ULCON_DEFAULT, - .ufcon = SMDKC100_UFCON_DEFAULT, - }, - [3] = { - .hwport = 3, - .flags = 0, - .ucon = SMDKC100_UCON_DEFAULT, - .ulcon = SMDKC100_ULCON_DEFAULT, - .ufcon = SMDKC100_UFCON_DEFAULT, - }, -}; - -/* I2C0 */ -static struct i2c_board_info i2c_devs0[] __initdata = { - {I2C_BOARD_INFO("wm8580", 0x1b),}, -}; - -/* I2C1 */ -static struct i2c_board_info i2c_devs1[] __initdata = { -}; - -/* LCD power controller */ -static void smdkc100_lcd_power_set(struct plat_lcd_data *pd, - unsigned int power) -{ - if (power) { - /* module reset */ - gpio_direction_output(S5PC100_GPH0(6), 1); - mdelay(100); - gpio_direction_output(S5PC100_GPH0(6), 0); - mdelay(10); - gpio_direction_output(S5PC100_GPH0(6), 1); - mdelay(10); - } -} - -static struct plat_lcd_data smdkc100_lcd_power_data = { - .set_power = smdkc100_lcd_power_set, -}; - -static struct platform_device smdkc100_lcd_powerdev = { - .name = "platform-lcd", - .dev.parent = &s3c_device_fb.dev, - .dev.platform_data = &smdkc100_lcd_power_data, -}; - -/* Frame Buffer */ -static struct s3c_fb_pd_win smdkc100_fb_win0 = { - .max_bpp = 32, - .default_bpp = 16, - .xres = 800, - .yres = 480, -}; - -static struct fb_videomode smdkc100_lcd_timing = { - .left_margin = 8, - .right_margin = 13, - .upper_margin = 7, - .lower_margin = 5, - .hsync_len = 3, - .vsync_len = 1, - .xres = 800, - .yres = 480, - .refresh = 80, -}; - -static struct s3c_fb_platdata smdkc100_lcd_pdata __initdata = { - .win[0] = &smdkc100_fb_win0, - .vtiming = &smdkc100_lcd_timing, - .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB, - .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC, - .setup_gpio = s5pc100_fb_gpio_setup_24bpp, -}; - -static struct s3c_ide_platdata smdkc100_ide_pdata __initdata = { - .setup_gpio = s5pc100_ide_setup_gpio, -}; - -static uint32_t smdkc100_keymap[] __initdata = { - /* KEY(row, col, keycode) */ - KEY(0, 3, KEY_1), KEY(0, 4, KEY_2), KEY(0, 5, KEY_3), - KEY(0, 6, KEY_4), KEY(0, 7, KEY_5), - KEY(1, 3, KEY_A), KEY(1, 4, KEY_B), KEY(1, 5, KEY_C), - KEY(1, 6, KEY_D), KEY(1, 7, KEY_E) -}; - -static struct matrix_keymap_data smdkc100_keymap_data __initdata = { - .keymap = smdkc100_keymap, - .keymap_size = ARRAY_SIZE(smdkc100_keymap), -}; - -static struct samsung_keypad_platdata smdkc100_keypad_data __initdata = { - .keymap_data = &smdkc100_keymap_data, - .rows = 2, - .cols = 8, -}; - -static struct platform_device *smdkc100_devices[] __initdata = { - &s3c_device_adc, - &s3c_device_cfcon, - &s3c_device_i2c0, - &s3c_device_i2c1, - &s3c_device_fb, - &s3c_device_hsmmc0, - &s3c_device_hsmmc1, - &s3c_device_hsmmc2, - &samsung_device_pwm, - &s3c_device_ts, - &s3c_device_wdt, - &smdkc100_lcd_powerdev, - &s5pc100_device_iis0, - &samsung_device_keypad, - &s5pc100_device_ac97, - &s3c_device_rtc, - &s5p_device_fimc0, - &s5p_device_fimc1, - &s5p_device_fimc2, - &s5pc100_device_spdif, -}; - -/* LCD Backlight data */ -static struct samsung_bl_gpio_info smdkc100_bl_gpio_info = { - .no = S5PC100_GPD(0), - .func = S3C_GPIO_SFN(2), -}; - -static struct platform_pwm_backlight_data smdkc100_bl_data = { - .pwm_id = 0, - .enable_gpio = -1, -}; - -static void __init smdkc100_map_io(void) -{ - s5pc100_init_io(NULL, 0); - s3c24xx_init_clocks(12000000); - s3c24xx_init_uarts(smdkc100_uartcfgs, ARRAY_SIZE(smdkc100_uartcfgs)); - samsung_set_timer_source(SAMSUNG_PWM3, SAMSUNG_PWM4); -} - -static void __init smdkc100_machine_init(void) -{ - s3c24xx_ts_set_platdata(NULL); - - /* I2C */ - s3c_i2c0_set_platdata(NULL); - s3c_i2c1_set_platdata(NULL); - i2c_register_board_info(0, i2c_devs0, ARRAY_SIZE(i2c_devs0)); - i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1)); - - s3c_fb_set_platdata(&smdkc100_lcd_pdata); - s3c_ide_set_platdata(&smdkc100_ide_pdata); - - samsung_keypad_set_platdata(&smdkc100_keypad_data); - - s5pc100_spdif_setup_gpio(S5PC100_SPDIF_GPD); - - /* LCD init */ - gpio_request(S5PC100_GPH0(6), "GPH0"); - smdkc100_lcd_power_set(&smdkc100_lcd_power_data, 0); - - platform_add_devices(smdkc100_devices, ARRAY_SIZE(smdkc100_devices)); - - samsung_bl_set(&smdkc100_bl_gpio_info, &smdkc100_bl_data); -} - -MACHINE_START(SMDKC100, "SMDKC100") - /* Maintainer: Byungho Min <bhmin@samsung.com> */ - .atag_offset = 0x100, - .init_irq = s5pc100_init_irq, - .map_io = smdkc100_map_io, - .init_machine = smdkc100_machine_init, - .init_time = samsung_timer_init, - .restart = s5pc100_restart, -MACHINE_END diff --git a/arch/arm/mach-s5pc100/setup-fb-24bpp.c b/arch/arm/mach-s5pc100/setup-fb-24bpp.c deleted file mode 100644 index 8978e4cf9ed5..000000000000 --- a/arch/arm/mach-s5pc100/setup-fb-24bpp.c +++ /dev/null @@ -1,35 +0,0 @@ -/* - * linux/arch/arm/mach-s5pc100/setup-fb-24bpp.c - * - * Copyright 2009 Samsung Electronics - * - * Base S5PC100 setup information for 24bpp LCD framebuffer - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include <linux/kernel.h> -#include <linux/types.h> -#include <linux/fb.h> -#include <linux/gpio.h> - -#include <mach/map.h> -#include <plat/fb.h> -#include <plat/gpio-cfg.h> - -#define DISR_OFFSET 0x7008 - -static void s5pc100_fb_setgpios(unsigned int base, unsigned int nr) -{ - s3c_gpio_cfgrange_nopull(base, nr, S3C_GPIO_SFN(2)); -} - -void s5pc100_fb_gpio_setup_24bpp(void) -{ - s5pc100_fb_setgpios(S5PC100_GPF0(0), 8); - s5pc100_fb_setgpios(S5PC100_GPF1(0), 8); - s5pc100_fb_setgpios(S5PC100_GPF2(0), 8); - s5pc100_fb_setgpios(S5PC100_GPF3(0), 4); -} diff --git a/arch/arm/mach-s5pc100/setup-i2c0.c b/arch/arm/mach-s5pc100/setup-i2c0.c deleted file mode 100644 index 89a6a769d622..000000000000 --- a/arch/arm/mach-s5pc100/setup-i2c0.c +++ /dev/null @@ -1,28 +0,0 @@ -/* linux/arch/arm/mach-s5pc100/setup-i2c0.c - * - * Copyright 2009 Samsung Electronics Co. - * Byungho Min <bhmin@samsung.com> - * - * Base S5PC100 I2C bus 0 gpio configuration - * - * Based on plat-s3c64xx/setup-i2c0.c - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#include <linux/kernel.h> -#include <linux/types.h> - -struct platform_device; /* don't need the contents */ - -#include <linux/gpio.h> -#include <linux/platform_data/i2c-s3c2410.h> -#include <plat/gpio-cfg.h> - -void s3c_i2c0_cfg_gpio(struct platform_device *dev) -{ - s3c_gpio_cfgall_range(S5PC100_GPD(3), 2, - S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP); -} diff --git a/arch/arm/mach-s5pc100/setup-i2c1.c b/arch/arm/mach-s5pc100/setup-i2c1.c deleted file mode 100644 index faa667ef02cb..000000000000 --- a/arch/arm/mach-s5pc100/setup-i2c1.c +++ /dev/null @@ -1,28 +0,0 @@ -/* linux/arch/arm/mach-s5pc100/setup-i2c1.c - * - * Copyright 2009 Samsung Electronics Co. - * Byungho Min <bhmin@samsung.com> - * - * Base S5PC100 I2C bus 1 gpio configuration - * - * Based on plat-s3c64xx/setup-i2c1.c - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#include <linux/kernel.h> -#include <linux/types.h> - -struct platform_device; /* don't need the contents */ - -#include <linux/gpio.h> -#include <linux/platform_data/i2c-s3c2410.h> -#include <plat/gpio-cfg.h> - -void s3c_i2c1_cfg_gpio(struct platform_device *dev) -{ - s3c_gpio_cfgall_range(S5PC100_GPD(5), 2, - S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP); -} diff --git a/arch/arm/mach-s5pc100/setup-ide.c b/arch/arm/mach-s5pc100/setup-ide.c deleted file mode 100644 index 223aae044466..000000000000 --- a/arch/arm/mach-s5pc100/setup-ide.c +++ /dev/null @@ -1,57 +0,0 @@ -/* linux/arch/arm/mach-s5pc100/setup-ide.c - * - * Copyright (c) 2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * S5PC100 setup information for IDE - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#include <linux/kernel.h> -#include <linux/gpio.h> -#include <linux/io.h> - -#include <mach/regs-clock.h> -#include <plat/gpio-cfg.h> - -static void s5pc100_ide_cfg_gpios(unsigned int base, unsigned int nr) -{ - s3c_gpio_cfgrange_nopull(base, nr, S3C_GPIO_SFN(4)); - - for (; nr > 0; nr--, base++) - s5p_gpio_set_drvstr(base, S5P_GPIO_DRVSTR_LV4); -} - -void s5pc100_ide_setup_gpio(void) -{ - u32 reg; - - /* Independent CF interface, CF chip select configuration */ - reg = readl(S5PC100_MEM_SYS_CFG) & (~0x3f); - writel(reg | MEM_SYS_CFG_EBI_FIX_PRI_CFCON, S5PC100_MEM_SYS_CFG); - - /* CF_Add[0 - 2], CF_IORDY, CF_INTRQ, CF_DMARQ, CF_DMARST, CF_DMACK */ - s5pc100_ide_cfg_gpios(S5PC100_GPJ0(0), 8); - - /*CF_Data[0 - 7] */ - s5pc100_ide_cfg_gpios(S5PC100_GPJ2(0), 8); - - /* CF_Data[8 - 15] */ - s5pc100_ide_cfg_gpios(S5PC100_GPJ3(0), 8); - - /* CF_CS0, CF_CS1, CF_IORD, CF_IOWR */ - s5pc100_ide_cfg_gpios(S5PC100_GPJ4(0), 4); - - /* EBI_OE, EBI_WE */ - s3c_gpio_cfgpin_range(S5PC100_GPK0(6), 2, S3C_GPIO_SFN(0)); - - /* CF_OE, CF_WE */ - s3c_gpio_cfgrange_nopull(S5PC100_GPK1(6), 8, S3C_GPIO_SFN(2)); - - /* CF_CD */ - s3c_gpio_cfgpin(S5PC100_GPK3(5), S3C_GPIO_SFN(2)); - s3c_gpio_setpull(S5PC100_GPK3(5), S3C_GPIO_PULL_NONE); -} diff --git a/arch/arm/mach-s5pc100/setup-keypad.c b/arch/arm/mach-s5pc100/setup-keypad.c deleted file mode 100644 index ada377f0c206..000000000000 --- a/arch/arm/mach-s5pc100/setup-keypad.c +++ /dev/null @@ -1,23 +0,0 @@ -/* linux/arch/arm/mach-s5pc100/setup-keypad.c - * - * Copyright (c) 2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com/ - * - * GPIO configuration for S5PC100 KeyPad device - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#include <linux/gpio.h> -#include <plat/gpio-cfg.h> - -void samsung_keypad_cfg_gpio(unsigned int rows, unsigned int cols) -{ - /* Set all the necessary GPH3 pins to special-function 3: KP_ROW[x] */ - s3c_gpio_cfgrange_nopull(S5PC100_GPH3(0), rows, S3C_GPIO_SFN(3)); - - /* Set all the necessary GPH2 pins to special-function 3: KP_COL[x] */ - s3c_gpio_cfgrange_nopull(S5PC100_GPH2(0), cols, S3C_GPIO_SFN(3)); -} diff --git a/arch/arm/mach-s5pc100/setup-sdhci-gpio.c b/arch/arm/mach-s5pc100/setup-sdhci-gpio.c deleted file mode 100644 index 6010c0310cb5..000000000000 --- a/arch/arm/mach-s5pc100/setup-sdhci-gpio.c +++ /dev/null @@ -1,70 +0,0 @@ -/* linux/arch/arm/plat-s5pc100/setup-sdhci-gpio.c - * - * Copyright 2009 Samsung Eletronics - * - * S5PC100 - Helper functions for setting up SDHCI device(s) GPIO (HSMMC) - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#include <linux/kernel.h> -#include <linux/types.h> -#include <linux/interrupt.h> -#include <linux/platform_device.h> -#include <linux/io.h> -#include <linux/gpio.h> -#include <linux/mmc/host.h> -#include <linux/mmc/card.h> - -#include <plat/gpio-cfg.h> -#include <plat/sdhci.h> - -void s5pc100_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width) -{ - struct s3c_sdhci_platdata *pdata = dev->dev.platform_data; - unsigned int num; - - num = width; - /* In case of 8 width, we should decrease the 2 */ - if (width == 8) - num = width - 2; - - /* Set all the necessary GPG0/GPG1 pins to special-function 0 */ - s3c_gpio_cfgrange_nopull(S5PC100_GPG0(0), 2 + num, S3C_GPIO_SFN(2)); - - if (width == 8) - s3c_gpio_cfgrange_nopull(S5PC100_GPG1(0), 2, S3C_GPIO_SFN(2)); - - if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) { - s3c_gpio_setpull(S5PC100_GPG1(2), S3C_GPIO_PULL_UP); - s3c_gpio_cfgpin(S5PC100_GPG1(2), S3C_GPIO_SFN(2)); - } -} - -void s5pc100_setup_sdhci1_cfg_gpio(struct platform_device *dev, int width) -{ - struct s3c_sdhci_platdata *pdata = dev->dev.platform_data; - - /* Set all the necessary GPG2 pins to special-function 2 */ - s3c_gpio_cfgrange_nopull(S5PC100_GPG2(0), 2 + width, S3C_GPIO_SFN(2)); - - if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) { - s3c_gpio_setpull(S5PC100_GPG2(6), S3C_GPIO_PULL_UP); - s3c_gpio_cfgpin(S5PC100_GPG2(6), S3C_GPIO_SFN(2)); - } -} - -void s5pc100_setup_sdhci2_cfg_gpio(struct platform_device *dev, int width) -{ - struct s3c_sdhci_platdata *pdata = dev->dev.platform_data; - - /* Set all the necessary GPG3 pins to special-function 2 */ - s3c_gpio_cfgrange_nopull(S5PC100_GPG3(0), 2 + width, S3C_GPIO_SFN(2)); - - if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) { - s3c_gpio_setpull(S5PC100_GPG3(6), S3C_GPIO_PULL_UP); - s3c_gpio_cfgpin(S5PC100_GPG3(6), S3C_GPIO_SFN(2)); - } -} diff --git a/arch/arm/mach-s5pc100/setup-spi.c b/arch/arm/mach-s5pc100/setup-spi.c deleted file mode 100644 index 183567961de1..000000000000 --- a/arch/arm/mach-s5pc100/setup-spi.c +++ /dev/null @@ -1,41 +0,0 @@ -/* linux/arch/arm/mach-s5pc100/setup-spi.c - * - * Copyright (C) 2011 Samsung Electronics Ltd. - * http://www.samsung.com/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include <linux/gpio.h> -#include <plat/gpio-cfg.h> - -#ifdef CONFIG_S3C64XX_DEV_SPI0 -int s3c64xx_spi0_cfg_gpio(void) -{ - s3c_gpio_cfgall_range(S5PC100_GPB(0), 3, - S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP); - return 0; -} -#endif - -#ifdef CONFIG_S3C64XX_DEV_SPI1 -int s3c64xx_spi1_cfg_gpio(void) -{ - s3c_gpio_cfgall_range(S5PC100_GPB(4), 3, - S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP); - return 0; -} -#endif - -#ifdef CONFIG_S3C64XX_DEV_SPI2 -int s3c64xx_spi2_cfg_gpio(void) -{ - s3c_gpio_cfgpin(S5PC100_GPG3(0), S3C_GPIO_SFN(3)); - s3c_gpio_setpull(S5PC100_GPG3(0), S3C_GPIO_PULL_UP); - s3c_gpio_cfgall_range(S5PC100_GPB(2), 2, - S3C_GPIO_SFN(3), S3C_GPIO_PULL_UP); - return 0; -} -#endif diff --git a/arch/arm/plat-samsung/Kconfig b/arch/arm/plat-samsung/Kconfig index 301b892d97d9..1c629c2c270f 100644 --- a/arch/arm/plat-samsung/Kconfig +++ b/arch/arm/plat-samsung/Kconfig @@ -15,7 +15,7 @@ config PLAT_SAMSUNG config PLAT_S5P bool - depends on (ARCH_S5P64X0 || ARCH_S5PC100 || ARCH_S5PV210) + depends on ARCH_S5PV210 default y select ARCH_REQUIRE_GPIOLIB select ARM_VIC @@ -29,7 +29,7 @@ config PLAT_S5P config SAMSUNG_PM bool - depends on PM && (PLAT_S3C24XX || ARCH_S3C64XX || ARCH_S5P64X0 || S5P_PM) + depends on PM && (PLAT_S3C24XX || ARCH_S3C64XX || S5P_PM) default y help Base platform power management code for samsung code @@ -78,14 +78,14 @@ config SAMSUNG_CLKSRC used by newer systems such as the S3C64XX. config S5P_CLOCK - def_bool (ARCH_S5P64X0 || ARCH_S5PC100 || ARCH_S5PV210) + def_bool ARCH_S5PV210 help Support common clock part for ARCH_S5P and ARCH_EXYNOS SoCs # options for IRQ support config S5P_IRQ - def_bool (ARCH_S5P64X0 || ARCH_S5PC100 || ARCH_S5PV210) + def_bool ARCH_S5PV210 help Support common interrupt part for ARCH_S5P SoCs @@ -93,7 +93,6 @@ config S5P_EXT_INT bool help Use the external interrupts (other than GPIO interrupts.) - Note: Do not choose this for S5P6440 and S5P6450. config S5P_GPIO_INT bool @@ -143,7 +142,7 @@ config S3C_GPIO_TRACK config S5P_DEV_UART def_bool y - depends on (ARCH_S5P64X0 || ARCH_S5PC100 || ARCH_S5PV210) + depends on ARCH_S5PV210 # ADC driver @@ -397,7 +396,7 @@ config SAMSUNG_PM_GPIO config SAMSUNG_DMADEV bool "Use legacy Samsung DMA abstraction" - depends on CPU_S5PV210 || CPU_S5PC100 || ARCH_S5P64X0 || ARCH_S3C64XX + depends on CPU_S5PV210 || ARCH_S3C64XX select DMADEVICES default y help @@ -474,7 +473,6 @@ config S5P_PM bool help Common code for power management support on S5P and newer SoCs - Note: Do not select this for S5P6440 and S5P6450. config S5P_SLEEP bool diff --git a/arch/arm/plat-samsung/adc.c b/arch/arm/plat-samsung/adc.c index 79690f2f6d3f..468352633101 100644 --- a/arch/arm/plat-samsung/adc.c +++ b/arch/arm/plat-samsung/adc.c @@ -43,7 +43,7 @@ enum s3c_cpu_type { TYPE_ADCV1, /* S3C24XX */ TYPE_ADCV11, /* S3C2443 */ TYPE_ADCV12, /* S3C2416, S3C2450 */ - TYPE_ADCV2, /* S3C64XX, S5P64X0, S5PC100 */ + TYPE_ADCV2, /* S3C64XX */ TYPE_ADCV3, /* S5PV210, S5PC110, EXYNOS4210 */ }; diff --git a/arch/arm/plat-samsung/include/plat/cpu.h b/arch/arm/plat-samsung/include/plat/cpu.h index 5a237db9f9eb..d1d4659025bb 100644 --- a/arch/arm/plat-samsung/include/plat/cpu.h +++ b/arch/arm/plat-samsung/include/plat/cpu.h @@ -33,13 +33,6 @@ extern unsigned long samsung_cpu_id; #define S3C6410_CPU_ID 0x36410000 #define S3C64XX_CPU_MASK 0xFFFFF000 -#define S5P6440_CPU_ID 0x56440000 -#define S5P6450_CPU_ID 0x36450000 -#define S5P64XX_CPU_MASK 0xFFFFF000 - -#define S5PC100_CPU_ID 0x43100000 -#define S5PC100_CPU_MASK 0xFFFFF000 - #define S5PV210_CPU_ID 0x43110000 #define S5PV210_CPU_MASK 0xFFFFF000 @@ -54,9 +47,6 @@ IS_SAMSUNG_CPU(s3c24xx, S3C24XX_CPU_ID, S3C24XX_CPU_MASK) IS_SAMSUNG_CPU(s3c2412, S3C2412_CPU_ID, S3C2412_CPU_MASK) IS_SAMSUNG_CPU(s3c6400, S3C6400_CPU_ID, S3C64XX_CPU_MASK) IS_SAMSUNG_CPU(s3c6410, S3C6410_CPU_ID, S3C64XX_CPU_MASK) -IS_SAMSUNG_CPU(s5p6440, S5P6440_CPU_ID, S5P64XX_CPU_MASK) -IS_SAMSUNG_CPU(s5p6450, S5P6450_CPU_ID, S5P64XX_CPU_MASK) -IS_SAMSUNG_CPU(s5pc100, S5PC100_CPU_ID, S5PC100_CPU_MASK) IS_SAMSUNG_CPU(s5pv210, S5PV210_CPU_ID, S5PV210_CPU_MASK) #if defined(CONFIG_CPU_S3C2410) || defined(CONFIG_CPU_S3C2412) || \ @@ -86,24 +76,6 @@ IS_SAMSUNG_CPU(s5pv210, S5PV210_CPU_ID, S5PV210_CPU_MASK) # define soc_is_s3c64xx() 0 #endif -#if defined(CONFIG_CPU_S5P6440) -# define soc_is_s5p6440() is_samsung_s5p6440() -#else -# define soc_is_s5p6440() 0 -#endif - -#if defined(CONFIG_CPU_S5P6450) -# define soc_is_s5p6450() is_samsung_s5p6450() -#else -# define soc_is_s5p6450() 0 -#endif - -#if defined(CONFIG_CPU_S5PC100) -# define soc_is_s5pc100() is_samsung_s5pc100() -#else -# define soc_is_s5pc100() 0 -#endif - #if defined(CONFIG_CPU_S5PV210) # define soc_is_s5pv210() is_samsung_s5pv210() #else @@ -177,7 +149,6 @@ extern struct bus_type s3c2440_subsys; extern struct bus_type s3c2442_subsys; extern struct bus_type s3c2443_subsys; extern struct bus_type s3c6410_subsys; -extern struct bus_type s5p64x0_subsys; extern struct bus_type s5pv210_subsys; extern void (*s5pc1xx_idle)(void); diff --git a/arch/arm/plat-samsung/include/plat/devs.h b/arch/arm/plat-samsung/include/plat/devs.h index eece188ed188..5f5a28d08c2e 100644 --- a/arch/arm/plat-samsung/include/plat/devs.h +++ b/arch/arm/plat-samsung/include/plat/devs.h @@ -94,23 +94,6 @@ extern struct platform_device s5p_device_mixer; extern struct platform_device s5p_device_onenand; extern struct platform_device s5p_device_sdo; -extern struct platform_device s5p6440_device_iis; -extern struct platform_device s5p6440_device_pcm; - -extern struct platform_device s5p6450_device_iis0; -extern struct platform_device s5p6450_device_iis1; -extern struct platform_device s5p6450_device_iis2; -extern struct platform_device s5p6450_device_pcm0; - - -extern struct platform_device s5pc100_device_ac97; -extern struct platform_device s5pc100_device_iis0; -extern struct platform_device s5pc100_device_iis1; -extern struct platform_device s5pc100_device_iis2; -extern struct platform_device s5pc100_device_pcm0; -extern struct platform_device s5pc100_device_pcm1; -extern struct platform_device s5pc100_device_spdif; - extern struct platform_device s5pv210_device_ac97; extern struct platform_device s5pv210_device_iis0; extern struct platform_device s5pv210_device_iis1; diff --git a/arch/arm/plat-samsung/include/plat/fb.h b/arch/arm/plat-samsung/include/plat/fb.h index 9ae507270785..5a0e26afb961 100644 --- a/arch/arm/plat-samsung/include/plat/fb.h +++ b/arch/arm/plat-samsung/include/plat/fb.h @@ -41,13 +41,6 @@ extern void s5p_fimd0_set_platdata(struct s3c_fb_platdata *pd); extern void s3c64xx_fb_gpio_setup_24bpp(void); /** - * s5pc100_fb_gpio_setup_24bpp() - S5PC100 setup function for 24bpp LCD - * - * Initialise the GPIO for an 24bpp LCD display on the RGB interface. - */ -extern void s5pc100_fb_gpio_setup_24bpp(void); - -/** * s5pv210_fb_gpio_setup_24bpp() - S5PV210/S5PC110 setup function for 24bpp LCD * * Initialise the GPIO for an 24bpp LCD display on the RGB interface. @@ -61,11 +54,4 @@ extern void s5pv210_fb_gpio_setup_24bpp(void); */ extern void exynos4_fimd0_gpio_setup_24bpp(void); -/** - * s5p64x0_fb_gpio_setup_24bpp() - S5P6440/S5P6450 setup function for 24bpp LCD - * - * Initialise the GPIO for an 24bpp LCD display on the RGB interface. - */ -extern void s5p64x0_fb_gpio_setup_24bpp(void); - #endif /* __PLAT_S3C_FB_H */ diff --git a/arch/arm/plat-samsung/include/plat/s5p-clock.h b/arch/arm/plat-samsung/include/plat/s5p-clock.h index 8364b4bea8b8..acacc4b88a39 100644 --- a/arch/arm/plat-samsung/include/plat/s5p-clock.h +++ b/arch/arm/plat-samsung/include/plat/s5p-clock.h @@ -57,7 +57,7 @@ extern int s5p_gatectrl(void __iomem *reg, struct clk *clk, int enable); extern int s5p_epll_enable(struct clk *clk, int enable); extern unsigned long s5p_epll_get_rate(struct clk *clk); -/* SPDIF clk operations common for S5PC100/V210/C110 and Exynos4 */ +/* SPDIF clk operations common for S5PV210/C110 and Exynos4 */ extern int s5p_spdif_set_rate(struct clk *clk, unsigned long rate); extern unsigned long s5p_spdif_get_rate(struct clk *clk); diff --git a/arch/arm/plat-samsung/include/plat/sdhci.h b/arch/arm/plat-samsung/include/plat/sdhci.h index bf650218b40e..f84b6cbc8745 100644 --- a/arch/arm/plat-samsung/include/plat/sdhci.h +++ b/arch/arm/plat-samsung/include/plat/sdhci.h @@ -56,9 +56,6 @@ extern void s3c2416_setup_sdhci0_cfg_gpio(struct platform_device *, int w); extern void s3c2416_setup_sdhci1_cfg_gpio(struct platform_device *, int w); extern void s3c64xx_setup_sdhci0_cfg_gpio(struct platform_device *, int w); extern void s3c64xx_setup_sdhci1_cfg_gpio(struct platform_device *, int w); -extern void s5pc100_setup_sdhci0_cfg_gpio(struct platform_device *, int w); -extern void s5pc100_setup_sdhci1_cfg_gpio(struct platform_device *, int w); -extern void s5pc100_setup_sdhci2_cfg_gpio(struct platform_device *, int w); extern void s3c64xx_setup_sdhci2_cfg_gpio(struct platform_device *, int w); extern void s5pv210_setup_sdhci0_cfg_gpio(struct platform_device *, int w); extern void s5pv210_setup_sdhci1_cfg_gpio(struct platform_device *, int w); @@ -68,10 +65,6 @@ extern void exynos4_setup_sdhci0_cfg_gpio(struct platform_device *, int w); extern void exynos4_setup_sdhci1_cfg_gpio(struct platform_device *, int w); extern void exynos4_setup_sdhci2_cfg_gpio(struct platform_device *, int w); extern void exynos4_setup_sdhci3_cfg_gpio(struct platform_device *, int w); -extern void s5p64x0_setup_sdhci0_cfg_gpio(struct platform_device *, int w); -extern void s5p64x0_setup_sdhci1_cfg_gpio(struct platform_device *, int w); -extern void s5p6440_setup_sdhci2_cfg_gpio(struct platform_device *, int w); -extern void s5p6450_setup_sdhci2_cfg_gpio(struct platform_device *, int w); /* S3C2416 SDHCI setup */ @@ -151,76 +144,6 @@ static inline void s3c6400_default_sdhci2(void) { } #endif /* CONFIG_S3C64XX_SETUP_SDHCI */ -/* S5P64X0 SDHCI setup */ - -#ifdef CONFIG_S5P64X0_SETUP_SDHCI_GPIO -static inline void s5p64x0_default_sdhci0(void) -{ -#ifdef CONFIG_S3C_DEV_HSMMC - s3c_hsmmc0_def_platdata.cfg_gpio = s5p64x0_setup_sdhci0_cfg_gpio; -#endif -} - -static inline void s5p64x0_default_sdhci1(void) -{ -#ifdef CONFIG_S3C_DEV_HSMMC1 - s3c_hsmmc1_def_platdata.cfg_gpio = s5p64x0_setup_sdhci1_cfg_gpio; -#endif -} - -static inline void s5p6440_default_sdhci2(void) -{ -#ifdef CONFIG_S3C_DEV_HSMMC2 - s3c_hsmmc2_def_platdata.cfg_gpio = s5p6440_setup_sdhci2_cfg_gpio; -#endif -} - -static inline void s5p6450_default_sdhci2(void) -{ -#ifdef CONFIG_S3C_DEV_HSMMC2 - s3c_hsmmc2_def_platdata.cfg_gpio = s5p6450_setup_sdhci2_cfg_gpio; -#endif -} - -#else -static inline void s5p64x0_default_sdhci0(void) { } -static inline void s5p64x0_default_sdhci1(void) { } -static inline void s5p6440_default_sdhci2(void) { } -static inline void s5p6450_default_sdhci2(void) { } - -#endif /* CONFIG_S5P64X0_SETUP_SDHCI_GPIO */ - -/* S5PC100 SDHCI setup */ - -#ifdef CONFIG_S5PC100_SETUP_SDHCI -static inline void s5pc100_default_sdhci0(void) -{ -#ifdef CONFIG_S3C_DEV_HSMMC - s3c_hsmmc0_def_platdata.cfg_gpio = s5pc100_setup_sdhci0_cfg_gpio; -#endif -} - -static inline void s5pc100_default_sdhci1(void) -{ -#ifdef CONFIG_S3C_DEV_HSMMC1 - s3c_hsmmc1_def_platdata.cfg_gpio = s5pc100_setup_sdhci1_cfg_gpio; -#endif -} - -static inline void s5pc100_default_sdhci2(void) -{ -#ifdef CONFIG_S3C_DEV_HSMMC2 - s3c_hsmmc2_def_platdata.cfg_gpio = s5pc100_setup_sdhci2_cfg_gpio; -#endif -} - -#else -static inline void s5pc100_default_sdhci0(void) { } -static inline void s5pc100_default_sdhci1(void) { } -static inline void s5pc100_default_sdhci2(void) { } - -#endif /* CONFIG_S5PC100_SETUP_SDHCI */ - /* S5PV210 SDHCI setup */ #ifdef CONFIG_S5PV210_SETUP_SDHCI diff --git a/drivers/gpio/gpio-samsung.c b/drivers/gpio/gpio-samsung.c index 07105ee5c9ae..7d4281e0d901 100644 --- a/drivers/gpio/gpio-samsung.c +++ b/drivers/gpio/gpio-samsung.c @@ -358,47 +358,6 @@ static unsigned s3c24xx_gpio_getcfg_abank(struct samsung_gpio_chip *chip, } #endif -#if defined(CONFIG_CPU_S5P6440) || defined(CONFIG_CPU_S5P6450) -static int s5p64x0_gpio_setcfg_rbank(struct samsung_gpio_chip *chip, - unsigned int off, unsigned int cfg) -{ - void __iomem *reg = chip->base; - unsigned int shift; - u32 con; - - switch (off) { - case 0: - case 1: - case 2: - case 3: - case 4: - case 5: - shift = (off & 7) * 4; - reg -= 4; - break; - case 6: - shift = ((off + 1) & 7) * 4; - reg -= 4; - break; - default: - shift = ((off + 1) & 7) * 4; - break; - } - - if (samsung_gpio_is_cfg_special(cfg)) { - cfg &= 0xf; - cfg <<= shift; - } - - con = __raw_readl(reg); - con &= ~(0xf << shift); - con |= cfg; - __raw_writel(con, reg); - - return 0; -} -#endif - static void __init samsung_gpiolib_set_cfg(struct samsung_gpio_cfg *chipcfg, int nr_chips) { @@ -426,16 +385,6 @@ static struct samsung_gpio_cfg s3c24xx_gpiocfg_banka = { }; #endif -#if defined(CONFIG_CPU_S5P6440) || defined(CONFIG_CPU_S5P6450) -static struct samsung_gpio_cfg s5p64x0_gpio_cfg_rbank = { - .cfg_eint = 0x3, - .set_config = s5p64x0_gpio_setcfg_rbank, - .get_config = samsung_gpio_getcfg_4bit, - .set_pull = samsung_gpio_setpull_updown, - .get_pull = samsung_gpio_getpull_updown, -}; -#endif - static struct samsung_gpio_cfg samsung_gpio_cfgs[] = { [0] = { .cfg_eint = 0x0, @@ -708,91 +657,6 @@ static int s3c24xx_gpiolib_banka_output(struct gpio_chip *chip, } #endif -/* The next set of routines are for the case of s5p64x0 bank r */ - -static int s5p64x0_gpiolib_rbank_input(struct gpio_chip *chip, - unsigned int offset) -{ - struct samsung_gpio_chip *ourchip = to_samsung_gpio(chip); - void __iomem *base = ourchip->base; - void __iomem *regcon = base; - unsigned long con; - unsigned long flags; - - switch (offset) { - case 6: - offset += 1; - case 0: - case 1: - case 2: - case 3: - case 4: - case 5: - regcon -= 4; - break; - default: - offset -= 7; - break; - } - - samsung_gpio_lock(ourchip, flags); - - con = __raw_readl(regcon); - con &= ~(0xf << con_4bit_shift(offset)); - __raw_writel(con, regcon); - - samsung_gpio_unlock(ourchip, flags); - - return 0; -} - -static int s5p64x0_gpiolib_rbank_output(struct gpio_chip *chip, - unsigned int offset, int value) -{ - struct samsung_gpio_chip *ourchip = to_samsung_gpio(chip); - void __iomem *base = ourchip->base; - void __iomem *regcon = base; - unsigned long con; - unsigned long dat; - unsigned long flags; - unsigned con_offset = offset; - - switch (con_offset) { - case 6: - con_offset += 1; - case 0: - case 1: - case 2: - case 3: - case 4: - case 5: - regcon -= 4; - break; - default: - con_offset -= 7; - break; - } - - samsung_gpio_lock(ourchip, flags); - - con = __raw_readl(regcon); - con &= ~(0xf << con_4bit_shift(con_offset)); - con |= 0x1 << con_4bit_shift(con_offset); - - dat = __raw_readl(base + GPIODAT_OFF); - if (value) - dat |= 1 << offset; - else - dat &= ~(1 << offset); - - __raw_writel(con, regcon); - __raw_writel(dat, base + GPIODAT_OFF); - - samsung_gpio_unlock(ourchip, flags); - - return 0; -} - static void samsung_gpiolib_set(struct gpio_chip *chip, unsigned offset, int value) { @@ -999,20 +863,6 @@ static void __init samsung_gpiolib_add_4bit2_chips(struct samsung_gpio_chip *chi } } -static void __init s5p64x0_gpiolib_add_rbank(struct samsung_gpio_chip *chip, - int nr_chips) -{ - for (; nr_chips > 0; nr_chips--, chip++) { - chip->chip.direction_input = s5p64x0_gpiolib_rbank_input; - chip->chip.direction_output = s5p64x0_gpiolib_rbank_output; - - if (!chip->pm) - chip->pm = __gpio_pm(&samsung_gpio_pm_4bit); - - samsung_gpiolib_add(chip); - } -} - int samsung_gpiolib_to_irq(struct gpio_chip *chip, unsigned int offset) { struct samsung_gpio_chip *samsung_chip = container_of(chip, struct samsung_gpio_chip, chip); @@ -1320,545 +1170,6 @@ static struct samsung_gpio_chip s3c64xx_gpios_2bit[] = { }; /* - * S5P6440 GPIO bank summary: - * - * Bank GPIOs Style SlpCon ExtInt Group - * A 6 4Bit Yes 1 - * B 7 4Bit Yes 1 - * C 8 4Bit Yes 2 - * F 2 2Bit Yes 4 [1] - * G 7 4Bit Yes 5 - * H 10 4Bit[2] Yes 6 - * I 16 2Bit Yes None - * J 12 2Bit Yes None - * N 16 2Bit No IRQ_EINT - * P 8 2Bit Yes 8 - * R 15 4Bit[2] Yes 8 - */ - -static struct samsung_gpio_chip s5p6440_gpios_4bit[] = { -#ifdef CONFIG_CPU_S5P6440 - { - .chip = { - .base = S5P6440_GPA(0), - .ngpio = S5P6440_GPIO_A_NR, - .label = "GPA", - }, - }, { - .chip = { - .base = S5P6440_GPB(0), - .ngpio = S5P6440_GPIO_B_NR, - .label = "GPB", - }, - }, { - .chip = { - .base = S5P6440_GPC(0), - .ngpio = S5P6440_GPIO_C_NR, - .label = "GPC", - }, - }, { - .base = S5P64X0_GPG_BASE, - .chip = { - .base = S5P6440_GPG(0), - .ngpio = S5P6440_GPIO_G_NR, - .label = "GPG", - }, - }, -#endif -}; - -static struct samsung_gpio_chip s5p6440_gpios_4bit2[] = { -#ifdef CONFIG_CPU_S5P6440 - { - .base = S5P64X0_GPH_BASE + 0x4, - .chip = { - .base = S5P6440_GPH(0), - .ngpio = S5P6440_GPIO_H_NR, - .label = "GPH", - }, - }, -#endif -}; - -static struct samsung_gpio_chip s5p6440_gpios_rbank[] = { -#ifdef CONFIG_CPU_S5P6440 - { - .base = S5P64X0_GPR_BASE + 0x4, - .config = &s5p64x0_gpio_cfg_rbank, - .chip = { - .base = S5P6440_GPR(0), - .ngpio = S5P6440_GPIO_R_NR, - .label = "GPR", - }, - }, -#endif -}; - -static struct samsung_gpio_chip s5p6440_gpios_2bit[] = { -#ifdef CONFIG_CPU_S5P6440 - { - .base = S5P64X0_GPF_BASE, - .config = &samsung_gpio_cfgs[6], - .chip = { - .base = S5P6440_GPF(0), - .ngpio = S5P6440_GPIO_F_NR, - .label = "GPF", - }, - }, { - .base = S5P64X0_GPI_BASE, - .config = &samsung_gpio_cfgs[4], - .chip = { - .base = S5P6440_GPI(0), - .ngpio = S5P6440_GPIO_I_NR, - .label = "GPI", - }, - }, { - .base = S5P64X0_GPJ_BASE, - .config = &samsung_gpio_cfgs[4], - .chip = { - .base = S5P6440_GPJ(0), - .ngpio = S5P6440_GPIO_J_NR, - .label = "GPJ", - }, - }, { - .base = S5P64X0_GPN_BASE, - .config = &samsung_gpio_cfgs[5], - .chip = { - .base = S5P6440_GPN(0), - .ngpio = S5P6440_GPIO_N_NR, - .label = "GPN", - }, - }, { - .base = S5P64X0_GPP_BASE, - .config = &samsung_gpio_cfgs[6], - .chip = { - .base = S5P6440_GPP(0), - .ngpio = S5P6440_GPIO_P_NR, - .label = "GPP", - }, - }, -#endif -}; - -/* - * S5P6450 GPIO bank summary: - * - * Bank GPIOs Style SlpCon ExtInt Group - * A 6 4Bit Yes 1 - * B 7 4Bit Yes 1 - * C 8 4Bit Yes 2 - * D 8 4Bit Yes None - * F 2 2Bit Yes None - * G 14 4Bit[2] Yes 5 - * H 10 4Bit[2] Yes 6 - * I 16 2Bit Yes None - * J 12 2Bit Yes None - * K 5 4Bit Yes None - * N 16 2Bit No IRQ_EINT - * P 11 2Bit Yes 8 - * Q 14 2Bit Yes None - * R 15 4Bit[2] Yes None - * S 8 2Bit Yes None - * - * [1] BANKF pins 14,15 do not form part of the external interrupt sources - * [2] BANK has two control registers, GPxCON0 and GPxCON1 - */ - -static struct samsung_gpio_chip s5p6450_gpios_4bit[] = { -#ifdef CONFIG_CPU_S5P6450 - { - .chip = { - .base = S5P6450_GPA(0), - .ngpio = S5P6450_GPIO_A_NR, - .label = "GPA", - }, - }, { - .chip = { - .base = S5P6450_GPB(0), - .ngpio = S5P6450_GPIO_B_NR, - .label = "GPB", - }, - }, { - .chip = { - .base = S5P6450_GPC(0), - .ngpio = S5P6450_GPIO_C_NR, - .label = "GPC", - }, - }, { - .chip = { - .base = S5P6450_GPD(0), - .ngpio = S5P6450_GPIO_D_NR, - .label = "GPD", - }, - }, { - .base = S5P6450_GPK_BASE, - .chip = { - .base = S5P6450_GPK(0), - .ngpio = S5P6450_GPIO_K_NR, - .label = "GPK", - }, - }, -#endif -}; - -static struct samsung_gpio_chip s5p6450_gpios_4bit2[] = { -#ifdef CONFIG_CPU_S5P6450 - { - .base = S5P64X0_GPG_BASE + 0x4, - .chip = { - .base = S5P6450_GPG(0), - .ngpio = S5P6450_GPIO_G_NR, - .label = "GPG", - }, - }, { - .base = S5P64X0_GPH_BASE + 0x4, - .chip = { - .base = S5P6450_GPH(0), - .ngpio = S5P6450_GPIO_H_NR, - .label = "GPH", - }, - }, -#endif -}; - -static struct samsung_gpio_chip s5p6450_gpios_rbank[] = { -#ifdef CONFIG_CPU_S5P6450 - { - .base = S5P64X0_GPR_BASE + 0x4, - .config = &s5p64x0_gpio_cfg_rbank, - .chip = { - .base = S5P6450_GPR(0), - .ngpio = S5P6450_GPIO_R_NR, - .label = "GPR", - }, - }, -#endif -}; - -static struct samsung_gpio_chip s5p6450_gpios_2bit[] = { -#ifdef CONFIG_CPU_S5P6450 - { - .base = S5P64X0_GPF_BASE, - .config = &samsung_gpio_cfgs[6], - .chip = { - .base = S5P6450_GPF(0), - .ngpio = S5P6450_GPIO_F_NR, - .label = "GPF", - }, - }, { - .base = S5P64X0_GPI_BASE, - .config = &samsung_gpio_cfgs[4], - .chip = { - .base = S5P6450_GPI(0), - .ngpio = S5P6450_GPIO_I_NR, - .label = "GPI", - }, - }, { - .base = S5P64X0_GPJ_BASE, - .config = &samsung_gpio_cfgs[4], - .chip = { - .base = S5P6450_GPJ(0), - .ngpio = S5P6450_GPIO_J_NR, - .label = "GPJ", - }, - }, { - .base = S5P64X0_GPN_BASE, - .config = &samsung_gpio_cfgs[5], - .chip = { - .base = S5P6450_GPN(0), - .ngpio = S5P6450_GPIO_N_NR, - .label = "GPN", - }, - }, { - .base = S5P64X0_GPP_BASE, - .config = &samsung_gpio_cfgs[6], - .chip = { - .base = S5P6450_GPP(0), - .ngpio = S5P6450_GPIO_P_NR, - .label = "GPP", - }, - }, { - .base = S5P6450_GPQ_BASE, - .config = &samsung_gpio_cfgs[5], - .chip = { - .base = S5P6450_GPQ(0), - .ngpio = S5P6450_GPIO_Q_NR, - .label = "GPQ", - }, - }, { - .base = S5P6450_GPS_BASE, - .config = &samsung_gpio_cfgs[6], - .chip = { - .base = S5P6450_GPS(0), - .ngpio = S5P6450_GPIO_S_NR, - .label = "GPS", - }, - }, -#endif -}; - -/* - * S5PC100 GPIO bank summary: - * - * Bank GPIOs Style INT Type - * A0 8 4Bit GPIO_INT0 - * A1 5 4Bit GPIO_INT1 - * B 8 4Bit GPIO_INT2 - * C 5 4Bit GPIO_INT3 - * D 7 4Bit GPIO_INT4 - * E0 8 4Bit GPIO_INT5 - * E1 6 4Bit GPIO_INT6 - * F0 8 4Bit GPIO_INT7 - * F1 8 4Bit GPIO_INT8 - * F2 8 4Bit GPIO_INT9 - * F3 4 4Bit GPIO_INT10 - * G0 8 4Bit GPIO_INT11 - * G1 3 4Bit GPIO_INT12 - * G2 7 4Bit GPIO_INT13 - * G3 7 4Bit GPIO_INT14 - * H0 8 4Bit WKUP_INT - * H1 8 4Bit WKUP_INT - * H2 8 4Bit WKUP_INT - * H3 8 4Bit WKUP_INT - * I 8 4Bit GPIO_INT15 - * J0 8 4Bit GPIO_INT16 - * J1 5 4Bit GPIO_INT17 - * J2 8 4Bit GPIO_INT18 - * J3 8 4Bit GPIO_INT19 - * J4 4 4Bit GPIO_INT20 - * K0 8 4Bit None - * K1 6 4Bit None - * K2 8 4Bit None - * K3 8 4Bit None - * L0 8 4Bit None - * L1 8 4Bit None - * L2 8 4Bit None - * L3 8 4Bit None - */ - -static struct samsung_gpio_chip s5pc100_gpios_4bit[] = { -#ifdef CONFIG_CPU_S5PC100 - { - .chip = { - .base = S5PC100_GPA0(0), - .ngpio = S5PC100_GPIO_A0_NR, - .label = "GPA0", - }, - }, { - .chip = { - .base = S5PC100_GPA1(0), - .ngpio = S5PC100_GPIO_A1_NR, - .label = "GPA1", - }, - }, { - .chip = { - .base = S5PC100_GPB(0), - .ngpio = S5PC100_GPIO_B_NR, - .label = "GPB", - }, - }, { - .chip = { - .base = S5PC100_GPC(0), - .ngpio = S5PC100_GPIO_C_NR, - .label = "GPC", - }, - }, { - .chip = { - .base = S5PC100_GPD(0), - .ngpio = S5PC100_GPIO_D_NR, - .label = "GPD", - }, - }, { - .chip = { - .base = S5PC100_GPE0(0), - .ngpio = S5PC100_GPIO_E0_NR, - .label = "GPE0", - }, - }, { - .chip = { - .base = S5PC100_GPE1(0), - .ngpio = S5PC100_GPIO_E1_NR, - .label = "GPE1", - }, - }, { - .chip = { - .base = S5PC100_GPF0(0), - .ngpio = S5PC100_GPIO_F0_NR, - .label = "GPF0", - }, - }, { - .chip = { - .base = S5PC100_GPF1(0), - .ngpio = S5PC100_GPIO_F1_NR, - .label = "GPF1", - }, - }, { - .chip = { - .base = S5PC100_GPF2(0), - .ngpio = S5PC100_GPIO_F2_NR, - .label = "GPF2", - }, - }, { - .chip = { - .base = S5PC100_GPF3(0), - .ngpio = S5PC100_GPIO_F3_NR, - .label = "GPF3", - }, - }, { - .chip = { - .base = S5PC100_GPG0(0), - .ngpio = S5PC100_GPIO_G0_NR, - .label = "GPG0", - }, - }, { - .chip = { - .base = S5PC100_GPG1(0), - .ngpio = S5PC100_GPIO_G1_NR, - .label = "GPG1", - }, - }, { - .chip = { - .base = S5PC100_GPG2(0), - .ngpio = S5PC100_GPIO_G2_NR, - .label = "GPG2", - }, - }, { - .chip = { - .base = S5PC100_GPG3(0), - .ngpio = S5PC100_GPIO_G3_NR, - .label = "GPG3", - }, - }, { - .chip = { - .base = S5PC100_GPI(0), - .ngpio = S5PC100_GPIO_I_NR, - .label = "GPI", - }, - }, { - .chip = { - .base = S5PC100_GPJ0(0), - .ngpio = S5PC100_GPIO_J0_NR, - .label = "GPJ0", - }, - }, { - .chip = { - .base = S5PC100_GPJ1(0), - .ngpio = S5PC100_GPIO_J1_NR, - .label = "GPJ1", - }, - }, { - .chip = { - .base = S5PC100_GPJ2(0), - .ngpio = S5PC100_GPIO_J2_NR, - .label = "GPJ2", - }, - }, { - .chip = { - .base = S5PC100_GPJ3(0), - .ngpio = S5PC100_GPIO_J3_NR, - .label = "GPJ3", - }, - }, { - .chip = { - .base = S5PC100_GPJ4(0), - .ngpio = S5PC100_GPIO_J4_NR, - .label = "GPJ4", - }, - }, { - .chip = { - .base = S5PC100_GPK0(0), - .ngpio = S5PC100_GPIO_K0_NR, - .label = "GPK0", - }, - }, { - .chip = { - .base = S5PC100_GPK1(0), - .ngpio = S5PC100_GPIO_K1_NR, - .label = "GPK1", - }, - }, { - .chip = { - .base = S5PC100_GPK2(0), - .ngpio = S5PC100_GPIO_K2_NR, - .label = "GPK2", - }, - }, { - .chip = { - .base = S5PC100_GPK3(0), - .ngpio = S5PC100_GPIO_K3_NR, - .label = "GPK3", - }, - }, { - .chip = { - .base = S5PC100_GPL0(0), - .ngpio = S5PC100_GPIO_L0_NR, - .label = "GPL0", - }, - }, { - .chip = { - .base = S5PC100_GPL1(0), - .ngpio = S5PC100_GPIO_L1_NR, - .label = "GPL1", - }, - }, { - .chip = { - .base = S5PC100_GPL2(0), - .ngpio = S5PC100_GPIO_L2_NR, - .label = "GPL2", - }, - }, { - .chip = { - .base = S5PC100_GPL3(0), - .ngpio = S5PC100_GPIO_L3_NR, - .label = "GPL3", - }, - }, { - .chip = { - .base = S5PC100_GPL4(0), - .ngpio = S5PC100_GPIO_L4_NR, - .label = "GPL4", - }, - }, { - .base = (S5P_VA_GPIO + 0xC00), - .irq_base = IRQ_EINT(0), - .chip = { - .base = S5PC100_GPH0(0), - .ngpio = S5PC100_GPIO_H0_NR, - .label = "GPH0", - .to_irq = samsung_gpiolib_to_irq, - }, - }, { - .base = (S5P_VA_GPIO + 0xC20), - .irq_base = IRQ_EINT(8), - .chip = { - .base = S5PC100_GPH1(0), - .ngpio = S5PC100_GPIO_H1_NR, - .label = "GPH1", - .to_irq = samsung_gpiolib_to_irq, - }, - }, { - .base = (S5P_VA_GPIO + 0xC40), - .irq_base = IRQ_EINT(16), - .chip = { - .base = S5PC100_GPH2(0), - .ngpio = S5PC100_GPIO_H2_NR, - .label = "GPH2", - .to_irq = samsung_gpiolib_to_irq, - }, - }, { - .base = (S5P_VA_GPIO + 0xC60), - .irq_base = IRQ_EINT(24), - .chip = { - .base = S5PC100_GPH3(0), - .ngpio = S5PC100_GPIO_H3_NR, - .label = "GPH3", - .to_irq = samsung_gpiolib_to_irq, - }, - }, -#endif -}; - -/* * Followings are the gpio banks in S5PV210/S5PC110 * * The 'config' member when left to NULL, is initialized to the default @@ -2109,39 +1420,6 @@ static __init int samsung_gpiolib_init(void) S3C64XX_VA_GPIO); samsung_gpiolib_add_4bit2_chips(s3c64xx_gpios_4bit2, ARRAY_SIZE(s3c64xx_gpios_4bit2)); - } else if (soc_is_s5p6440()) { - samsung_gpiolib_add_2bit_chips(s5p6440_gpios_2bit, - ARRAY_SIZE(s5p6440_gpios_2bit), NULL, 0x0); - samsung_gpiolib_add_4bit_chips(s5p6440_gpios_4bit, - ARRAY_SIZE(s5p6440_gpios_4bit), S5P_VA_GPIO); - samsung_gpiolib_add_4bit2_chips(s5p6440_gpios_4bit2, - ARRAY_SIZE(s5p6440_gpios_4bit2)); - s5p64x0_gpiolib_add_rbank(s5p6440_gpios_rbank, - ARRAY_SIZE(s5p6440_gpios_rbank)); - } else if (soc_is_s5p6450()) { - samsung_gpiolib_add_2bit_chips(s5p6450_gpios_2bit, - ARRAY_SIZE(s5p6450_gpios_2bit), NULL, 0x0); - samsung_gpiolib_add_4bit_chips(s5p6450_gpios_4bit, - ARRAY_SIZE(s5p6450_gpios_4bit), S5P_VA_GPIO); - samsung_gpiolib_add_4bit2_chips(s5p6450_gpios_4bit2, - ARRAY_SIZE(s5p6450_gpios_4bit2)); - s5p64x0_gpiolib_add_rbank(s5p6450_gpios_rbank, - ARRAY_SIZE(s5p6450_gpios_rbank)); - } else if (soc_is_s5pc100()) { - group = 0; - chip = s5pc100_gpios_4bit; - nr_chips = ARRAY_SIZE(s5pc100_gpios_4bit); - - for (i = 0; i < nr_chips; i++, chip++) { - if (!chip->config) { - chip->config = &samsung_gpio_cfgs[3]; - chip->group = group++; - } - } - samsung_gpiolib_add_4bit_chips(s5pc100_gpios_4bit, nr_chips, S5P_VA_GPIO); -#if defined(CONFIG_CPU_S5PC100) && defined(CONFIG_S5P_GPIO_INT) - s5p_register_gpioint_bank(IRQ_GPIOINT, 0, S5P_GPIOINT_GROUP_MAXNR); -#endif } else if (soc_is_s5pv210()) { group = 0; chip = s5pv210_gpios_4bit; diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig index bbb746e35500..e7028681aa70 100644 --- a/drivers/irqchip/Kconfig +++ b/drivers/irqchip/Kconfig @@ -23,7 +23,6 @@ config ARM_VIC config ARM_VIC_NR int default 4 if ARCH_S5PV210 - default 3 if ARCH_S5PC100 default 2 depends on ARM_VIC help diff --git a/drivers/mtd/onenand/Kconfig b/drivers/mtd/onenand/Kconfig index ab2607273e80..dcae2f6a2b11 100644 --- a/drivers/mtd/onenand/Kconfig +++ b/drivers/mtd/onenand/Kconfig @@ -32,10 +32,10 @@ config MTD_ONENAND_OMAP2 config MTD_ONENAND_SAMSUNG tristate "OneNAND on Samsung SOC controller support" - depends on ARCH_S3C64XX || ARCH_S5PC100 || ARCH_S5PV210 || ARCH_EXYNOS4 + depends on ARCH_S3C64XX || ARCH_S5PV210 || ARCH_EXYNOS4 help Support for a OneNAND flash device connected to an Samsung SOC. - S3C64XX/S5PC100 use command mapping method. + S3C64XX uses command mapping method. S5PC110/S5PC210 use generic OneNAND method. config MTD_ONENAND_OTP diff --git a/drivers/mtd/onenand/samsung.c b/drivers/mtd/onenand/samsung.c index efb819c3df2f..19cfb97adbc0 100644 --- a/drivers/mtd/onenand/samsung.c +++ b/drivers/mtd/onenand/samsung.c @@ -10,7 +10,7 @@ * published by the Free Software Foundation. * * Implementation: - * S3C64XX and S5PC100: emulate the pseudo BufferRAM + * S3C64XX: emulate the pseudo BufferRAM * S5PC110: use DMA */ @@ -32,7 +32,6 @@ enum soc_type { TYPE_S3C6400, TYPE_S3C6410, - TYPE_S5PC100, TYPE_S5PC110, }; @@ -59,7 +58,6 @@ enum soc_type { #define MAP_11 (0x3) #define S3C64XX_CMD_MAP_SHIFT 24 -#define S5PC100_CMD_MAP_SHIFT 26 #define S3C6400_FBA_SHIFT 10 #define S3C6400_FPA_SHIFT 4 @@ -69,10 +67,6 @@ enum soc_type { #define S3C6410_FPA_SHIFT 6 #define S3C6410_FSA_SHIFT 4 -#define S5PC100_FBA_SHIFT 13 -#define S5PC100_FPA_SHIFT 7 -#define S5PC100_FSA_SHIFT 5 - /* S5PC110 specific definitions */ #define S5PC110_DMA_SRC_ADDR 0x400 #define S5PC110_DMA_SRC_CFG 0x404 @@ -195,11 +189,6 @@ static unsigned int s3c64xx_cmd_map(unsigned type, unsigned val) return (type << S3C64XX_CMD_MAP_SHIFT) | val; } -static unsigned int s5pc1xx_cmd_map(unsigned type, unsigned val) -{ - return (type << S5PC100_CMD_MAP_SHIFT) | val; -} - static unsigned int s3c6400_mem_addr(int fba, int fpa, int fsa) { return (fba << S3C6400_FBA_SHIFT) | (fpa << S3C6400_FPA_SHIFT) | @@ -212,12 +201,6 @@ static unsigned int s3c6410_mem_addr(int fba, int fpa, int fsa) (fsa << S3C6410_FSA_SHIFT); } -static unsigned int s5pc100_mem_addr(int fba, int fpa, int fsa) -{ - return (fba << S5PC100_FBA_SHIFT) | (fpa << S5PC100_FPA_SHIFT) | - (fsa << S5PC100_FSA_SHIFT); -} - static void s3c_onenand_reset(void) { unsigned long timeout = 0x10000; @@ -835,9 +818,6 @@ static void s3c_onenand_setup(struct mtd_info *mtd) } else if (onenand->type == TYPE_S3C6410) { onenand->mem_addr = s3c6410_mem_addr; onenand->cmd_map = s3c64xx_cmd_map; - } else if (onenand->type == TYPE_S5PC100) { - onenand->mem_addr = s5pc100_mem_addr; - onenand->cmd_map = s5pc1xx_cmd_map; } else if (onenand->type == TYPE_S5PC110) { /* Use generic onenand functions */ this->read_bufferram = s5pc110_read_bufferram; @@ -1111,9 +1091,6 @@ static struct platform_device_id s3c_onenand_driver_ids[] = { .name = "s3c6410-onenand", .driver_data = TYPE_S3C6410, }, { - .name = "s5pc100-onenand", - .driver_data = TYPE_S5PC100, - }, { .name = "s5pc110-onenand", .driver_data = TYPE_S5PC110, }, { }, diff --git a/drivers/spi/spi-s3c64xx.c b/drivers/spi/spi-s3c64xx.c index 75a56968b14c..a771a3a4d321 100644 --- a/drivers/spi/spi-s3c64xx.c +++ b/drivers/spi/spi-s3c64xx.c @@ -1323,19 +1323,6 @@ static struct s3c64xx_spi_port_config s3c6410_spi_port_config = { .tx_st_done = 21, }; -static struct s3c64xx_spi_port_config s5p64x0_spi_port_config = { - .fifo_lvl_mask = { 0x1ff, 0x7F }, - .rx_lvl_offset = 15, - .tx_st_done = 25, -}; - -static struct s3c64xx_spi_port_config s5pc100_spi_port_config = { - .fifo_lvl_mask = { 0x7f, 0x7F }, - .rx_lvl_offset = 13, - .tx_st_done = 21, - .high_speed = true, -}; - static struct s3c64xx_spi_port_config s5pv210_spi_port_config = { .fifo_lvl_mask = { 0x1ff, 0x7F }, .rx_lvl_offset = 15, @@ -1368,12 +1355,6 @@ static struct platform_device_id s3c64xx_spi_driver_ids[] = { .name = "s3c6410-spi", .driver_data = (kernel_ulong_t)&s3c6410_spi_port_config, }, { - .name = "s5p64x0-spi", - .driver_data = (kernel_ulong_t)&s5p64x0_spi_port_config, - }, { - .name = "s5pc100-spi", - .driver_data = (kernel_ulong_t)&s5pc100_spi_port_config, - }, { .name = "s5pv210-spi", .driver_data = (kernel_ulong_t)&s5pv210_spi_port_config, }, { @@ -1390,9 +1371,6 @@ static const struct of_device_id s3c64xx_spi_dt_match[] = { { .compatible = "samsung,s3c6410-spi", .data = (void *)&s3c6410_spi_port_config, }, - { .compatible = "samsung,s5pc100-spi", - .data = (void *)&s5pc100_spi_port_config, - }, { .compatible = "samsung,s5pv210-spi", .data = (void *)&s5pv210_spi_port_config, }, diff --git a/drivers/video/fbdev/Kconfig b/drivers/video/fbdev/Kconfig index 5edc7a054e03..92026d31bb48 100644 --- a/drivers/video/fbdev/Kconfig +++ b/drivers/video/fbdev/Kconfig @@ -2025,8 +2025,8 @@ config FB_TMIO_ACCELL config FB_S3C tristate "Samsung S3C framebuffer support" - depends on FB && (CPU_S3C2416 || ARCH_S3C64XX || ARCH_S5P64X0 || \ - ARCH_S5PC100 || ARCH_S5PV210 || ARCH_EXYNOS) + depends on FB && (CPU_S3C2416 || ARCH_S3C64XX || \ + ARCH_S5PV210 || ARCH_EXYNOS) select FB_CFB_FILLRECT select FB_CFB_COPYAREA select FB_CFB_IMAGEBLIT diff --git a/drivers/video/fbdev/s3c-fb.c b/drivers/video/fbdev/s3c-fb.c index 62acae2694a9..b33abb0a433d 100644 --- a/drivers/video/fbdev/s3c-fb.c +++ b/drivers/video/fbdev/s3c-fb.c @@ -1805,38 +1805,6 @@ static struct s3c_fb_driverdata s3c_fb_data_64xx = { .win[4] = &s3c_fb_data_64xx_wins[4], }; -static struct s3c_fb_driverdata s3c_fb_data_s5pc100 = { - .variant = { - .nr_windows = 5, - .vidtcon = VIDTCON0, - .wincon = WINCON(0), - .winmap = WINxMAP(0), - .keycon = WKEYCON, - .osd = VIDOSD_BASE, - .osd_stride = 16, - .buf_start = VIDW_BUF_START(0), - .buf_size = VIDW_BUF_SIZE(0), - .buf_end = VIDW_BUF_END(0), - - .palette = { - [0] = 0x2400, - [1] = 0x2800, - [2] = 0x2c00, - [3] = 0x3000, - [4] = 0x3400, - }, - - .has_prtcon = 1, - .has_blendcon = 1, - .has_clksel = 1, - }, - .win[0] = &s3c_fb_data_s5p_wins[0], - .win[1] = &s3c_fb_data_s5p_wins[1], - .win[2] = &s3c_fb_data_s5p_wins[2], - .win[3] = &s3c_fb_data_s5p_wins[3], - .win[4] = &s3c_fb_data_s5p_wins[4], -}; - static struct s3c_fb_driverdata s3c_fb_data_s5pv210 = { .variant = { .nr_windows = 5, @@ -1970,41 +1938,11 @@ static struct s3c_fb_driverdata s3c_fb_data_s3c2443 = { }, }; -static struct s3c_fb_driverdata s3c_fb_data_s5p64x0 = { - .variant = { - .nr_windows = 3, - .vidtcon = VIDTCON0, - .wincon = WINCON(0), - .winmap = WINxMAP(0), - .keycon = WKEYCON, - .osd = VIDOSD_BASE, - .osd_stride = 16, - .buf_start = VIDW_BUF_START(0), - .buf_size = VIDW_BUF_SIZE(0), - .buf_end = VIDW_BUF_END(0), - - .palette = { - [0] = 0x2400, - [1] = 0x2800, - [2] = 0x2c00, - }, - - .has_blendcon = 1, - .has_fixvclk = 1, - }, - .win[0] = &s3c_fb_data_s5p_wins[0], - .win[1] = &s3c_fb_data_s5p_wins[1], - .win[2] = &s3c_fb_data_s5p_wins[2], -}; - static struct platform_device_id s3c_fb_driver_ids[] = { { .name = "s3c-fb", .driver_data = (unsigned long)&s3c_fb_data_64xx, }, { - .name = "s5pc100-fb", - .driver_data = (unsigned long)&s3c_fb_data_s5pc100, - }, { .name = "s5pv210-fb", .driver_data = (unsigned long)&s3c_fb_data_s5pv210, }, { @@ -2016,9 +1954,6 @@ static struct platform_device_id s3c_fb_driver_ids[] = { }, { .name = "s3c2443-fb", .driver_data = (unsigned long)&s3c_fb_data_s3c2443, - }, { - .name = "s5p64x0-fb", - .driver_data = (unsigned long)&s3c_fb_data_s5p64x0, }, {}, }; diff --git a/include/video/samsung_fimd.h b/include/video/samsung_fimd.h index b0393209679b..8af0c6155eed 100644 --- a/include/video/samsung_fimd.h +++ b/include/video/samsung_fimd.h @@ -107,7 +107,7 @@ #define VIDCON2_ORGYCbCr (1 << 8) #define VIDCON2_YUVORDCrCb (1 << 7) -/* PRTCON (S3C6410, S5PC100) +/* PRTCON (S3C6410) * Might not be present in the S3C6410 documentation, * but tests prove it's there almost for sure; shouldn't hurt in any case. */ |