diff options
author | Shengjiu Wang <shengjiu.wang@freescale.com> | 2015-02-09 18:13:54 +0800 |
---|---|---|
committer | Nitin Garg <nitin.garg@freescale.com> | 2015-04-14 14:02:19 -0500 |
commit | e250e2f494bcc7b7c2c20a5f95b58047db6584e3 (patch) | |
tree | 2f0e3651c9840d863db3149cedcd29d061b92448 | |
parent | a2bef360e36b6fa6e8d2f1e5cf4007a71162384e (diff) |
MLK-10213-1: ASoC: fsl_ssi: sound is wrong after suspend/resume
The register SFCSR is volatile, but some bits in it need to be
recovered after suspend/resume.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
-rw-r--r-- | sound/soc/fsl/fsl_ssi.c | 14 |
1 files changed, 13 insertions, 1 deletions
diff --git a/sound/soc/fsl/fsl_ssi.c b/sound/soc/fsl/fsl_ssi.c index c22afd04a39c..00d0e5b84436 100644 --- a/sound/soc/fsl/fsl_ssi.c +++ b/sound/soc/fsl/fsl_ssi.c @@ -3,7 +3,7 @@ * * Author: Timur Tabi <timur@freescale.com> * - * Copyright 2007-2014 Freescale Semiconductor, Inc. + * Copyright 2007-2015 Freescale Semiconductor, Inc. * * This file is licensed under the terms of the GNU General Public License * version 2. This program is licensed "as is" without any warranty of any @@ -266,6 +266,9 @@ struct fsl_ssi_private { unsigned int baudclk_streams; unsigned int bitclk_freq; + /*regcache for SFCSR*/ + u32 regcache_sfcsr; + /* DMA params */ struct snd_dmaengine_dai_dma_data dma_params_tx; struct snd_dmaengine_dai_dma_data dma_params_rx; @@ -1578,6 +1581,9 @@ static int fsl_ssi_suspend(struct device *dev) struct fsl_ssi_private *ssi_private = dev_get_drvdata(dev); struct regmap *regs = ssi_private->regs; + regmap_read(regs, CCSR_SSI_SFCSR, + &ssi_private->regcache_sfcsr); + regcache_cache_only(regs, true); regcache_mark_dirty(regs); @@ -1590,6 +1596,12 @@ static int fsl_ssi_resume(struct device *dev) struct regmap *regs = ssi_private->regs; regcache_cache_only(regs, false); + + regmap_update_bits(regs, CCSR_SSI_SFCSR, + CCSR_SSI_SFCSR_RFWM1_MASK | CCSR_SSI_SFCSR_TFWM1_MASK | + CCSR_SSI_SFCSR_RFWM0_MASK | CCSR_SSI_SFCSR_TFWM0_MASK, + ssi_private->regcache_sfcsr); + return regcache_sync(regs); } #endif /* CONFIG_PM_SLEEP */ |