diff options
| author | Aron Wong <awong@nvidia.com> | 2014-03-19 17:25:32 -0700 |
|---|---|---|
| committer | Riham Haidar <rhaidar@nvidia.com> | 2014-05-01 15:58:10 -0700 |
| commit | ea7885d9f0ac60912e890c2f9fd75d9c867c5e11 (patch) | |
| tree | 6bb304ddb5a15c2af936add75a7eadefa12b4c5e | |
| parent | 164171d7ca473504eab5b068bd2d4c3c9206d4b2 (diff) | |
video: tegra: dc: HDMI debug enhancement
Add additional HDMI registers to adb debug output
bug 1481188
The current list of HDMI registers appears to not
been updated for T114 and later.
Change-Id: I5d79c935102cbd6bf436ba97a0c3154803c5b135
Signed-off-by: Aron Wong <awong@nvidia.com>
(cherry picked from commit 0eb7cc8ff39f3833d3d6b79bd4129ca26a3eca9b)
Reviewed-on: http://git-master/r/403079
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>
| -rw-r--r-- | drivers/video/tegra/dc/hdmi.c | 18 | ||||
| -rw-r--r-- | drivers/video/tegra/dc/hdmi_reg.h | 21 |
2 files changed, 37 insertions, 2 deletions
diff --git a/drivers/video/tegra/dc/hdmi.c b/drivers/video/tegra/dc/hdmi.c index bd8aa7034caa..41a54b212deb 100644 --- a/drivers/video/tegra/dc/hdmi.c +++ b/drivers/video/tegra/dc/hdmi.c @@ -617,9 +617,25 @@ static int dbg_hdmi_show(struct seq_file *m, void *unused) DUMP_REG(HDMI_NV_PDISP_KEY_HDCP_KEY_3); DUMP_REG(HDMI_NV_PDISP_KEY_HDCP_KEY_TRIG); DUMP_REG(HDMI_NV_PDISP_KEY_SKEY_INDEX); -#if defined(CONFIG_ARCH_TEGRA_11x_SOC) +#if !defined(CONFIG_ARCH_TEGRA_3x_SOC) DUMP_REG(HDMI_NV_PDISP_SOR_IO_PEAK_CURRENT); #endif +#if !defined(CONFIG_ARCH_TEGRA_3x_SOC) && !defined(CONFIG_ARCH_TEGRA_11x_SOC) + DUMP_REG(HDMI_NV_PDISP_SOR_PAD_CTLS0); + DUMP_REG(HDMI_NV_PDISP_SOR_PAD_CTLS1); + DUMP_REG(HDMI_NV_PDISP_HDMI_VSI_INFOFRAME_CTRL); + DUMP_REG(HDMI_NV_PDISP_HDMI_VSI_INFOFRAME_STATUS); + DUMP_REG(HDMI_NV_PDISP_HDMI_VSI_INFOFRAME_HEADER); + DUMP_REG(HDMI_NV_PDISP_HDMI_VSI_INFOFRAME_SUBPACK0_LOW); + DUMP_REG(HDMI_NV_PDISP_HDMI_VSI_INFOFRAME_SUBPACK0_HIGH); + DUMP_REG(HDMI_NV_PDISP_HDMI_VSI_INFOFRAME_SUBPACK1_LOW); + DUMP_REG(HDMI_NV_PDISP_HDMI_VSI_INFOFRAME_SUBPACK1_HIGH); + DUMP_REG(HDMI_NV_PDISP_HDMI_VSI_INFOFRAME_SUBPACK2_LOW); + DUMP_REG(HDMI_NV_PDISP_HDMI_VSI_INFOFRAME_SUBPACK2_HIGH); + DUMP_REG(HDMI_NV_PDISP_HDMI_VSI_INFOFRAME_SUBPACK3_LOW); + DUMP_REG(HDMI_NV_PDISP_HDMI_VSI_INFOFRAME_SUBPACK3_HIGH); +#endif + #undef DUMP_REG clk_disable_unprepare(hdmi->clk); diff --git a/drivers/video/tegra/dc/hdmi_reg.h b/drivers/video/tegra/dc/hdmi_reg.h index 3ea4d6d54023..395c74864855 100644 --- a/drivers/video/tegra/dc/hdmi_reg.h +++ b/drivers/video/tegra/dc/hdmi_reg.h @@ -4,7 +4,7 @@ * Copyright (C) 2010 Google, Inc. * Author: Erik Gilling <konkers@android.com> * - * Copyright (c) 2010-2012, NVIDIA CORPORATION, All rights reserved. + * Copyright (c) 2010-2014, NVIDIA CORPORATION, All rights reserved. * * This software is licensed under the terms of the GNU General Public * License version 2, as published by the Free Software Foundation, and @@ -400,6 +400,8 @@ #define HDMI_NV_PDISP_KEY_HDCP_KEY_TRIG 0xa2 #define HDMI_NV_PDISP_KEY_SKEY_INDEX 0xa3 +/* registers for ARCH_TEGRA_11x_SOC and later */ +#if !defined(CONFIG_ARCH_TEGRA_3x_SOC) #define HDMI_NV_PDISP_SOR_IO_PEAK_CURRENT 0xd1 /* 31:24 - PEAK_CURRENT_LANE3 * 23:16 - PEAK_CURRENT_LANE2 @@ -409,5 +411,22 @@ #define HDMI_NV_PDISP_SOR_PAD_CTLS0 0xd2 #define DRIVE_CURRENT_FUSE_OVERRIDE_T11x (1 << 31) +#define HDMI_NV_PDISP_SOR_PAD_CTLS1 0xd3 +#endif + +/* registers for ARCH_TEGRA_12x_SOC and later */ +#if !defined(CONFIG_ARCH_TEGRA_3x_SOC) && !defined(CONFIG_ARCH_TEGRA_11x_SOC) +#define HDMI_NV_PDISP_HDMI_VSI_INFOFRAME_CTRL 0xd6 +#define HDMI_NV_PDISP_HDMI_VSI_INFOFRAME_STATUS 0xd7 +#define HDMI_NV_PDISP_HDMI_VSI_INFOFRAME_HEADER 0xd8 +#define HDMI_NV_PDISP_HDMI_VSI_INFOFRAME_SUBPACK0_LOW 0xd9 +#define HDMI_NV_PDISP_HDMI_VSI_INFOFRAME_SUBPACK0_HIGH 0xda +#define HDMI_NV_PDISP_HDMI_VSI_INFOFRAME_SUBPACK1_LOW 0xdb +#define HDMI_NV_PDISP_HDMI_VSI_INFOFRAME_SUBPACK1_HIGH 0xdc +#define HDMI_NV_PDISP_HDMI_VSI_INFOFRAME_SUBPACK2_LOW 0xdd +#define HDMI_NV_PDISP_HDMI_VSI_INFOFRAME_SUBPACK2_HIGH 0xde +#define HDMI_NV_PDISP_HDMI_VSI_INFOFRAME_SUBPACK3_LOW 0xdf +#define HDMI_NV_PDISP_HDMI_VSI_INFOFRAME_SUBPACK3_HIGH 0xe0 +#endif #endif |