diff options
author | Robin Gong <yibin.gong@nxp.com> | 2018-09-29 20:39:21 +0800 |
---|---|---|
committer | Jason Liu <jason.hui.liu@nxp.com> | 2019-02-12 10:34:22 +0800 |
commit | f35983533c81b4f97e46a550197de007fb510c18 (patch) | |
tree | 21f8a46ce6d2efca6824c4770828eb35a111de69 | |
parent | b921a97fa14d528c4e8717852333419d553d6ea6 (diff) |
MLK-18983-1: spi: imx: move wml setting to later than setup_transfer
Current dynamic burst lengt
h is based on the whole transfer length,
that's ok if there is only one sg, but not correct in case multi sgs
in one transfer,because the tail data should based on the last sg
length instead of the whole transfer length. Move wml setting for DMA
to the later place, thus, the next patch could get the right last sg
length for wml setting. This patch is a preparation one, no any
function change involved.
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
-rw-r--r-- | drivers/spi/spi-imx.c | 26 |
1 files changed, 16 insertions, 10 deletions
diff --git a/drivers/spi/spi-imx.c b/drivers/spi/spi-imx.c index 6f344b5b4ceb..e3accbfd30d3 100644 --- a/drivers/spi/spi-imx.c +++ b/drivers/spi/spi-imx.c @@ -77,6 +77,7 @@ struct spi_imx_devtype_data { void (*trigger)(struct spi_imx_data *); int (*rx_available)(struct spi_imx_data *); void (*reset)(struct spi_imx_data *); + void (*setup_wml)(struct spi_imx_data *); bool has_dmamode; unsigned int fifo_size; bool dynamic_burst; @@ -454,7 +455,6 @@ static int mx51_ecspi_config(struct spi_device *spi) u32 ctrl = MX51_ECSPI_CTRL_ENABLE; u32 clk = spi_imx->speed_hz, delay, reg; u32 cfg = readl(spi_imx->base + MX51_ECSPI_CONFIG); - int tx_wml = 0; /* * The hardware seems to have a race condition when changing modes. The @@ -531,6 +531,13 @@ static int mx51_ecspi_config(struct spi_device *spi) else /* SCLK is _very_ slow */ usleep_range(delay, delay + 10); + return 0; +} + +static void mx51_setup_wml(struct spi_imx_data *spi_imx) +{ + int tx_wml = 0; + /* * Configure the DMA register: setup the watermark * and enable DMA request. @@ -544,8 +551,6 @@ static int mx51_ecspi_config(struct spi_device *spi) MX51_ECSPI_DMA_RXT_WML(spi_imx->wml) | MX51_ECSPI_DMA_TEDEN | MX51_ECSPI_DMA_RXDEN | MX51_ECSPI_DMA_RXTDEN, spi_imx->base + MX51_ECSPI_DMA); - - return 0; } static int mx51_ecspi_rx_available(struct spi_imx_data *spi_imx) @@ -877,6 +882,7 @@ static struct spi_imx_devtype_data imx51_ecspi_devtype_data = { .trigger = mx51_ecspi_trigger, .rx_available = mx51_ecspi_rx_available, .reset = mx51_ecspi_reset, + .setup_wml = mx51_setup_wml, .fifo_size = 64, .has_dmamode = true, .dynamic_burst = true, @@ -1054,7 +1060,6 @@ static int spi_imx_setupxfer(struct spi_device *spi, struct spi_transfer *t) { struct spi_imx_data *spi_imx = spi_master_get_devdata(spi->master); - int ret; if (!t) return 0; @@ -1101,12 +1106,6 @@ static int spi_imx_setupxfer(struct spi_device *spi, else spi_imx->usedma = 0; - if (spi_imx->usedma) { - ret = spi_imx_dma_configure(spi->master); - if (ret) - return ret; - } - spi_imx->devtype_data->config(spi); return 0; @@ -1201,6 +1200,13 @@ static int spi_imx_dma_transfer(struct spi_imx_data *spi_imx, unsigned long timeout; struct spi_master *master = spi_imx->bitbang.master; struct sg_table *tx = &transfer->tx_sg, *rx = &transfer->rx_sg; + int ret; + + ret = spi_imx_dma_configure(master); + if (ret) + return ret; + + spi_imx->devtype_data->setup_wml(spi_imx); /* * The TX DMA setup starts the transfer, so make sure RX is configured |