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authorRabeeh Khoury <rabeeh@solid-run.com>2014-08-23 10:11:21 +0100
committerShawn Guo <shawn.guo@freescale.com>2014-08-27 13:32:26 +0800
commitbf8147208eab4a026558dcd686f76410de6c1643 (patch)
tree4256b2b6d5672ad958875df153c0f1b3206bb1a5 /CREDITS
parent962af8612148dad1927ab74707a27cc400103c86 (diff)
ARM: dts: microsom-ar8035: MDIO pad must be set open drainimx-fixes-3.17-2
This patch is important for the MicroSOM implementation due to the following details - 1. VIH of the Atheros phy is 1.7V. 2. NVCC_ENET which is the power domain of the MDIO pad is driven by the PHY's LDO (i.e. either 1.8v or 2.5v). 3. The MicroSOM implements an onbouard 1.6kohm pull up to 3.3v (R3000). In the case the PHY's LDO was 1.8v then there would be only a 100mV margin for the signal to be acknowledged as high (1.8v-1.7v). Due to that setting the pad as an open drain will let the 1.6kohm pull that signal high to 3.3 that assures enough margins to the PHY to be acked as '1' logic. Signed-off-by: Rabeeh Khoury <rabeeh@solid-run.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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