diff options
| author | Murali Karicheri <m-karicheri2@ti.com> | 2014-09-08 13:03:34 -0400 |
|---|---|---|
| committer | Bjorn Helgaas <bhelgaas@google.com> | 2014-09-16 15:31:21 -0600 |
| commit | c15982dfa8227f3e8fd2a6e2e13a009a9991d96c (patch) | |
| tree | d4f37a5e49bf0f30f2c7900ffd84433f0b35fc49 /Documentation/devicetree/bindings/pci | |
| parent | 0c4ffcfe1fbc1ef564ec137eab21137cb013b00e (diff) | |
PCI: keystone: Limit MRSS for all downstream devices
Keystone PCIe controller has a limitation that memory read request size
must not exceed 256 bytes. This is a hardware limitation. Add a quirk to
force this limit on all downstream devices by updating MRRS.
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Diffstat (limited to 'Documentation/devicetree/bindings/pci')
| -rw-r--r-- | Documentation/devicetree/bindings/pci/pci-keystone.txt | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/Documentation/devicetree/bindings/pci/pci-keystone.txt b/Documentation/devicetree/bindings/pci/pci-keystone.txt index ceb3e2424742..de9c475b66f4 100644 --- a/Documentation/devicetree/bindings/pci/pci-keystone.txt +++ b/Documentation/devicetree/bindings/pci/pci-keystone.txt @@ -63,6 +63,3 @@ Designware DT Properties not applicable for Keystone PCI 1. pcie_bus clock-names not used. Instead, a phandle to phys is used. -Note for PCI driver usage -========================= -Driver requires pci=pcie_bus_perf in the bootargs for proper functioning. |