diff options
| author | Stefan Agner <stefan@agner.ch> | 2016-03-22 15:45:29 -0700 |
|---|---|---|
| committer | Stefan Agner <stefan.agner@toradex.com> | 2016-03-28 10:53:32 -0700 |
| commit | e987c13431ffbfd52301dd031b1affc0a18c3f43 (patch) | |
| tree | 5b30c0d61614c80ac0ddb0035ec94798d1e08824 /Documentation/devicetree | |
| parent | d0171fbf707316a13a7de93624459abb130ca664 (diff) | |
drm/fsl-dcu: add extra clock for pixel clock
The Vybrid DCU variant has two independent clock inputs, one
for the registers (IPG bus clock) and one for the pixel clock.
Support this distinction in the DCU DRM driver while staying
backward compatible with devices providing only a single clock
(e.g. LS1021a SoC's).
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Diffstat (limited to 'Documentation/devicetree')
| -rw-r--r-- | Documentation/devicetree/bindings/display/fsl,dcu.txt | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/display/fsl,dcu.txt b/Documentation/devicetree/bindings/display/fsl,dcu.txt index 8153c9a564b1..62c167e3da21 100644 --- a/Documentation/devicetree/bindings/display/fsl,dcu.txt +++ b/Documentation/devicetree/bindings/display/fsl,dcu.txt @@ -13,6 +13,8 @@ Required properties: Optional properties: - fsl,tcon: The phandle to the timing controller node. +- clocks: Second handle for pixel clock. +- clock-names: Second name "pix" for pixel clock. Examples: dcu: dcu@2ce0000 { |