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authorGuenter Roeck <guenter.roeck@ericsson.com>2011-09-19 21:41:16 -0700
committerGuenter Roeck <guenter.roeck@ericsson.com>2011-09-21 17:25:18 -0700
commitf4af6fd6e21792ca4deca3d29c113a575594078e (patch)
treebe578a88996c6e95f9d09384412e5f52230aed8c /Documentation/scheduler
parenta45a8c8571c0be6a6bd72ae5a14255c26b14b504 (diff)
hwmon: (coretemp) Don't use threshold registers for tempX_max
With commit c814a4c7c4aad795835583344353963a0a673eb0, the meaning of tempX_max was changed. It no longer returns the value of bits 8:15 of MSR_IA32_TEMPERATURE_TARGET, but instead returns the value of CPU threshold register T1. tempX_max_hyst was added to reflect the value of temperature threshold register T0. As it turns out, T0 and T1 are used on some systems, presumably by the BIOS. Also, T0 and T1 don't have a well defined meaning. The thresholds may be used as upper or lower limits, and it is not guaranteed that T0 <= T1. Thus, the new attribute mapping does not reflect the actual usage of the threshold registers. Also, register contents are changed during runtime by an entity other than the hwmon driver, meaning the values cached by the driver do not reflect actual register contents. Revert most of c814a4c7c4aad795835583344353963a0a673eb0 to address the problem. Support for T0 and T1 will be added back in with a separate commit, using new attribute names. Signed-off-by: Guenter Roeck <guenter.roeck@ericsson.com> Cc: Fenghua Yu <fenghua.yu@intel.com> Cc: Durgadoss R <durgadoss.r@intel.com> Acked-by: Jean Delvare <khali@linux-fr.org>
Diffstat (limited to 'Documentation/scheduler')
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