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authorXiubo Li <Li.Xiubo@freescale.com>2014-02-11 15:42:49 +0800
committerNitin Garg <nitin.garg@freescale.com>2015-04-14 13:59:13 -0500
commitbdb62cbb35483f60ea458ebbf45e07250a4e0891 (patch)
treee7b802e94d37accab9ad8a1524171ca87feaa93a /Documentation
parentb02c52e78206042d45cabddc332fdad5fe50bf70 (diff)
ASoC: fsl-esai: big-endian support
For most platforms, the CPU and ESAI device is in the same endianess mode. While for the LS1 platform, the CPU is in LE mode and the ESAI is in BE mode. Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com> Acked-by: Nicolin Chen <Guangyu.Chen@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org> (cherry picked from commit eaba603fc7c6281908c316d9e58de688943d58be)
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/devicetree/bindings/sound/fsl,esai.txt5
1 files changed, 5 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/sound/fsl,esai.txt b/Documentation/devicetree/bindings/sound/fsl,esai.txt
index d7b99fa637b5..aeb8c4a0b88d 100644
--- a/Documentation/devicetree/bindings/sound/fsl,esai.txt
+++ b/Documentation/devicetree/bindings/sound/fsl,esai.txt
@@ -34,6 +34,10 @@ Required properties:
that ESAI would work in the synchronous mode, which means all the settings
for Receiving would be duplicated from Transmition related registers.
+ - big-endian : If this property is absent, the native endian mode will
+ be in use as default, or the big endian mode will be in use for all the
+ device registers.
+
Example:
esai: esai@02024000 {
@@ -46,5 +50,6 @@ esai: esai@02024000 {
dma-names = "rx", "tx";
fsl,fifo-depth = <128>;
fsl,esai-synchronous;
+ big-endian;
status = "disabled";
};