diff options
| author | Richard Zhu <hongxing.zhu@nxp.com> | 2021-03-09 15:13:13 +0800 |
|---|---|---|
| committer | Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com> | 2021-04-27 10:42:03 +0000 |
| commit | 58b5e9c2278e444923b5c5994cc6256aabc642d5 (patch) | |
| tree | 8cef660698a0d3c28885921539401978eef3655f /Documentation | |
| parent | af86e332d57a9ea0a3ebe28b368c77a8ead1983c (diff) | |
MLK-25334-1 dt-bindings: imx6q-pcie: add one property to disable l1ss support or not
HW board design may not support the L1.1 ASPM, although the L1.1 ASPM
can be supported by the SOC chip.
So, export one property to disable L1.1 ASPM supported or not.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Reviewed-by: Jun Li <jun.li@nxp.com>
(cherry picked from commit 7bd2d56b72d33e223305aa2ef9046c0e38f225e6)
(cherry picked from commit 439d54d4021a0cc2a297472fde38de98b687e16a)
Signed-off-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>
Diffstat (limited to 'Documentation')
| -rw-r--r-- | Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt index 3e3e2818bd9b..d208fe06df11 100644 --- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt +++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt @@ -60,6 +60,9 @@ Optional properties: - interrupt-names: Optional include the following entries: - "dma": The interrupt that is asserted when an DMA interrupter is received +- l1ss-disabled: Force to disable L1SS or not. If present then the L1 + substate would be force disabled although it might be supported by the + chip. Additional required properties for imx6sx-pcie: - clock names: Must include the following additional entries: |