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authorStefan Agner <stefan@agner.ch>2015-05-27 14:47:51 +0200
committerStefan Agner <stefan.agner@toradex.com>2015-07-02 13:40:04 +0200
commit04d44a1e1e43d90ffdfdd2412469b591cbd47ee6 (patch)
tree4ba62967d1cc8a27c7b4d0d01eb505e1b8169c75 /Documentation
parent765ecb272e30ed052eb4bfbf4d5abf88a1408d0c (diff)
iio: adc: vf610: implement configurable conversion modes
Support configurable conversion mode through sysfs. So far, the mode used was low-power, which is enabled by default now. Beside that, the modes normal and high-speed are selectable as well. Use the new device tree property which specifies the maximum ADC conversion clock frequencies. Depending on the mode used, the available resulting conversion frequency are calculated dynamically. Acked-by: Fugang Duan <B38611@freescale.com> Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/ABI/testing/sysfs-bus-iio-vf6107
-rw-r--r--Documentation/devicetree/bindings/iio/adc/vf610-adc.txt9
2 files changed, 16 insertions, 0 deletions
diff --git a/Documentation/ABI/testing/sysfs-bus-iio-vf610 b/Documentation/ABI/testing/sysfs-bus-iio-vf610
new file mode 100644
index 000000000000..ecbc1f4af921
--- /dev/null
+++ b/Documentation/ABI/testing/sysfs-bus-iio-vf610
@@ -0,0 +1,7 @@
+What: /sys/bus/iio/devices/iio:deviceX/conversion_mode
+KernelVersion: 4.2
+Contact: linux-iio@vger.kernel.org
+Description:
+ Specifies the hardware conversion mode used. The three
+ available modes are "normal", "high-speed" and "low-power",
+ where the last is the default mode.
diff --git a/Documentation/devicetree/bindings/iio/adc/vf610-adc.txt b/Documentation/devicetree/bindings/iio/adc/vf610-adc.txt
index 1a4a43d5c9ea..3eb40e20c143 100644
--- a/Documentation/devicetree/bindings/iio/adc/vf610-adc.txt
+++ b/Documentation/devicetree/bindings/iio/adc/vf610-adc.txt
@@ -11,6 +11,13 @@ Required properties:
- clock-names: Must contain "adc", matching entry in the clocks property.
- vref-supply: The regulator supply ADC reference voltage.
+Recommended properties:
+- fsl,adck-max-frequency: Maximum frequencies according to datasheets operating
+ requirements. Three values are required, depending on conversion mode:
+ - Frequency in normal mode (ADLPC=0, ADHSC=0)
+ - Frequency in high-speed mode (ADLPC=0, ADHSC=1)
+ - Frequency in low-power mode (ADLPC=1, ADHSC=0)
+
Example:
adc0: adc@4003b000 {
compatible = "fsl,vf610-adc";
@@ -18,5 +25,7 @@ adc0: adc@4003b000 {
interrupts = <0 53 0x04>;
clocks = <&clks VF610_CLK_ADC0>;
clock-names = "adc";
+ fsl,adck-max-frequency = <30000000>, <40000000>,
+ <20000000>;
vref-supply = <&reg_vcc_3v3_mcu>;
};