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authorPeter Chen <peter.chen@freescale.com>2015-02-04 16:20:33 +0800
committerPeter Chen <peter.chen@freescale.com>2015-02-05 16:39:13 +0800
commite6a04edb2240493e0eea898470634093619264ee (patch)
tree14140bf5809b1265d3631206925ed57b34739771 /Documentation
parent4d626975237060ef7cd17a719305410f72682550 (diff)
MLK-10202-2 doc: usb: mxs-phy: add tx-d-cal property
Add tx-d-cal property Signed-off-by: Peter Chen <peter.chen@freescale.com>
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/devicetree/bindings/usb/mxs-phy.txt6
1 files changed, 6 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/usb/mxs-phy.txt b/Documentation/devicetree/bindings/usb/mxs-phy.txt
index 379b84a567cc..a3b6055bec15 100644
--- a/Documentation/devicetree/bindings/usb/mxs-phy.txt
+++ b/Documentation/devicetree/bindings/usb/mxs-phy.txt
@@ -12,10 +12,16 @@ Required properties:
- interrupts: Should contain phy interrupt
- fsl,anatop: phandle for anatop register, it is only for imx6 SoC series
+Optional properties:
+- tx-d-cal: Try to adjust this value to improve signal quality, and pass
+ USB Certification, the value is from 0x0 to 0xf, and the register offset
+ is 0x10 (USBPHY_TX).
+
Example:
usbphy1: usbphy@020c9000 {
compatible = "fsl,imx6q-usbphy", "fsl,imx23-usbphy";
reg = <0x020c9000 0x1000>;
interrupts = <0 44 0x04>;
fsl,anatop = <&anatop>;
+ tx-d-cal = <0x5>;
};