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authorPeter Chen <peter.chen@nxp.com>2018-08-08 09:02:33 +0800
committerJason Liu <jason.hui.liu@nxp.com>2019-02-12 10:33:14 +0800
commitcc529d4fb36298b1d4f80d2d014064e2384a8979 (patch)
tree36d7dea108a3e49ef435620bd773ba313092a73d /Documentation
parent5b550b4ca32316ad145c0ba4609353f5847a61ee (diff)
MLK-19153-1 ARM: dts: update new "fsl,tx-d-cal" property
Using new "fsl,tx-d-cal" for dts, and update document accordingly. Acked-by: Jun Li <jun.li@nxp.com> Signed-off-by: Peter Chen <peter.chen@nxp.com>
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/devicetree/bindings/phy/mxs-usb-phy.txt5
1 files changed, 1 insertions, 4 deletions
diff --git a/Documentation/devicetree/bindings/phy/mxs-usb-phy.txt b/Documentation/devicetree/bindings/phy/mxs-usb-phy.txt
index 415dc0d05805..c795eba2daa2 100644
--- a/Documentation/devicetree/bindings/phy/mxs-usb-phy.txt
+++ b/Documentation/devicetree/bindings/phy/mxs-usb-phy.txt
@@ -23,9 +23,6 @@ Optional properties:
that terminates the DP output signal. Default: 45
- fsl,tx-d-cal: Integer [79-119]. Current trimming value (as a percentage) of
the 17.78mA TX reference current. Default: 100
-- tx-d-cal: Try to adjust this value to improve signal quality, and pass
- USB Certification, the value is from 0x0 to 0xf, and the register offset
- is 0x10 (USBPHY_TX).
Example:
usbphy1: usbphy@020c9000 {
@@ -33,5 +30,5 @@ usbphy1: usbphy@020c9000 {
reg = <0x020c9000 0x1000>;
interrupts = <0 44 0x04>;
fsl,anatop = <&anatop>;
- tx-d-cal = <0x5>;
+ fsl,tx-d-cal = <106>;
};