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authorAndy Shevchenko <andriy.shevchenko@linux.intel.com>2015-01-13 19:08:14 +0200
committerVinod Koul <vinod.koul@intel.com>2015-02-04 22:39:44 -0800
commitd8ded50f8b26a224df48f9f93e49440c6a39b77f (patch)
tree7c7620107180b0a2c3ea77770ef8fb9bccfa8341 /arch/arc
parentcfd8fef322305bbe9955817464f0d2054ce545c0 (diff)
dmaengine: dw: define DW_DMA_MAX_NR_MASTERS
Instead of using magic number in the code the patch provides DW_DMA_MAX_NR_MASTERS constant. While here, restrict the reading of data width array by amount of the actual number of AHB masters. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Diffstat (limited to 'arch/arc')
-rw-r--r--arch/arc/boot/dts/abilis_tb10x.dtsi2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arc/boot/dts/abilis_tb10x.dtsi b/arch/arc/boot/dts/abilis_tb10x.dtsi
index a098d7c05e96..cfb5052239a1 100644
--- a/arch/arc/boot/dts/abilis_tb10x.dtsi
+++ b/arch/arc/boot/dts/abilis_tb10x.dtsi
@@ -112,7 +112,7 @@
chan_allocation_order = <0>;
chan_priority = <1>;
block_size = <0x7ff>;
- data_width = <2 0 0 0>;
+ data_width = <2>;
clocks = <&ahb_clk>;
clock-names = "hclk";
};