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authorOlof Johansson <olof@lixom.net>2018-01-04 23:06:32 -0800
committerOlof Johansson <olof@lixom.net>2018-01-04 23:06:32 -0800
commit38b45e518655f8334b395ebe0be4ac238f598e3d (patch)
tree34d671cb38c6d2ea8b81eea2ed7022d6b63bc580 /arch/arm/boot/dts/am335x-boneblue.dts
parent8db4e1faac7462e371364978dbe357c1c22e9e40 (diff)
parent1cadb0c341079785182a8d00d12ecb0bbef935fb (diff)
Merge tag 'omap-for-v4.16/dt-pt2-v2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt
Second set of device tree changes for omaps for v4.16 merge window This branch mostly configures more hardware support: - Clean-up dts files to remove leading 0x and 0s from binding notation to remove more dtc compiler warnings - A series of am437x updates for backlight, to fix inverted pad pull macro, and to configure power management related OPPs - Configure n950 and droid 4 command mode LCD panels - Updates to pandora and gta04 LCD panels - Add support for am574x-idk - A series of changes to configure more dra7 related PCIe features - A series of fixes for am335x-boneblue for WLAN, UARTs and CAN configuration - A series of changes to configure dra7 OPPs and VDD supplies * tag 'omap-for-v4.16/dt-pt2-v2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (29 commits) Revert "ARM: dts: dra7: Add properties to enable PCIe x2 lane mode" ARM: dts: am572x-idk: Add cpu0 vdd supply ARM: dts: am571x-idk: Add cpu0 vdd supply ARM: dts: dra72-evm-tps65917: Add cpu0 vdd supply ARM: dts: dra7-evm: Add cpu0 vdd supply ARM: dts: am57xx-beagle-x15-common: Add cpu0 vdd supply ARM: dts: dra7: Enable 1.5 GHz operation for the CPU ARM: dts: dra7: Add MPU OPP supply node ARM: dts: dra7: Add vbb-supply to cpu and additional voltages ARM: dts: am335x-boneblue: enable can ARM: dts: am335x-boneblue: enable usarts ARM: dts: am335x-boneblue: fix wl1835 IRQ pin ARM: dts: dra7: Remove deprecated PCI compatible string ARM: dts: dra76-evm: Enable x2 PCIe lanes ARM: dts: DRA72x: Use PCIe compatible specific to dra72 ARM: dts: DRA74x: Use PCIe compatible specific to dra74 ARM: dts: dra7: Add properties to enable PCIe x2 lane mode ARM: dts: am57xx: Add support for am574x-idk ARM: dts: am43x-epos-evm: Hook dcdc2 as the cpu0-supply ARM: dts: am437x-idk-evm: Disable OPP50 for MPU ... Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm/boot/dts/am335x-boneblue.dts')
-rw-r--r--arch/arm/boot/dts/am335x-boneblue.dts79
1 files changed, 77 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/am335x-boneblue.dts b/arch/arm/boot/dts/am335x-boneblue.dts
index d5be9fc4f416..3f2480d05a3b 100644
--- a/arch/arm/boot/dts/am335x-boneblue.dts
+++ b/arch/arm/boot/dts/am335x-boneblue.dts
@@ -159,6 +159,7 @@
>;
};
+ /* UT0 */
uart0_pins: pinmux_uart0_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0) /* (E15) uart0_rxd.uart0_rxd */
@@ -166,6 +167,37 @@
>;
};
+ /* UT1 */
+ uart1_pins: pinmux_uart1_pins {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x980, PIN_INPUT_PULLUP | MUX_MODE0) /* (D16) uart1_rxd.uart1_rxd */
+ AM33XX_IOPAD(0x984, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* (D15) uart1_txd.uart1_txd */
+ >;
+ };
+
+ /* GPS */
+ uart2_pins: pinmux_uart2_pins {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x950, PIN_INPUT_PULLUP | MUX_MODE1) /* (A17) spi0_sclk.uart2_rxd */
+ AM33XX_IOPAD(0x954, PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* (B17) spi0_d0.uart2_txd */
+ >;
+ };
+
+ /* DSM2 */
+ uart4_pins: pinmux_uart4_pins {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x870, PIN_INPUT_PULLUP | MUX_MODE6) /* (T17) gpmc_wait0.uart4_rxd */
+ >;
+ };
+
+ /* UT5 */
+ uart5_pins: pinmux_uart5_pins {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x8C4, PIN_INPUT_PULLUP | MUX_MODE4) /* (U2) lcd_data9.uart5_rxd */
+ AM33XX_IOPAD(0x8C0, PIN_OUTPUT_PULLDOWN | MUX_MODE4) /* (U1) lcd_data8.uart5_txd */
+ >;
+ };
+
mmc1_pins: pinmux_mmc1_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* (C15) spi0_cs1.gpio0[6] */
@@ -216,10 +248,19 @@
wl18xx_pins: pinmux_wl18xx_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x92c, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* (K18) gmii1_txclk.gpio3[9] - WL_EN */
- AM33XX_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE7) /* (H18) rmii1_refclk.gpio0[29] - WL_IRQ */
+ AM33XX_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7) /* (K16) gmii1_txd1.gpio0[21] - WL_IRQ */
AM33XX_IOPAD(0x930, PIN_OUTPUT_PULLUP | MUX_MODE7) /* (L18) gmii1_rxclk.gpio3[10] - LS_BUF_EN */
>;
};
+
+ /* DCAN */
+ dcan1_pins: pinmux_dcan1_pins {
+ pinctrl-single,pins = <
+ AM33XX_IOPAD(0x96c, PIN_INPUT | MUX_MODE2) /* (E17) uart0_rtsn.dcan1_rx */
+ AM33XX_IOPAD(0x968, PIN_OUTPUT | MUX_MODE2) /* (E18) uart0_ctsn.dcan1_tx */
+ AM33XX_IOPAD(0x940, PIN_OUTPUT | MUX_MODE7) /* (M16) gmii1_rxd0.gpio2[21] */
+ >;
+ };
};
&uart0 {
@@ -229,6 +270,34 @@
status = "okay";
};
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart1_pins>;
+
+ status = "okay";
+};
+
+&uart2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart2_pins>;
+
+ status = "okay";
+};
+
+&uart4 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart4_pins>;
+
+ status = "okay";
+};
+
+&uart5 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart5_pins>;
+
+ status = "okay";
+};
+
&usb {
status = "okay";
};
@@ -414,7 +483,7 @@
compatible = "ti,wl1835";
reg = <2>;
interrupt-parent = <&gpio0>;
- interrupts = <29 IRQ_TYPE_EDGE_RISING>;
+ interrupts = <21 IRQ_TYPE_EDGE_RISING>;
};
};
@@ -450,6 +519,12 @@
clock-names = "ext-clk", "int-clk";
};
+&dcan1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&dcan1_pins>;
+ status = "okay";
+};
+
&gpio3 {
ls_buf_en {
gpio-hog;