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authorLokesh Vutla <lokeshvutla@ti.com>2016-06-01 12:06:45 +0300
committerTony Lindgren <tony@atomide.com>2016-06-22 00:44:07 -0700
commit8ed607a7490172733936a50a2231509dbde4f3b9 (patch)
tree27ade11f3312f2cda359bdfc51542fd5b8783cbc /arch/arm/boot/dts/am43xx-clocks.dtsi
parent610e9c4aec6acdb44230e9bd96d12393650333ff (diff)
ARM: dts: AM43xx: clk: Add RNG clk node
Add clk node for RNG module. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/boot/dts/am43xx-clocks.dtsi')
-rw-r--r--arch/arm/boot/dts/am43xx-clocks.dtsi8
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/am43xx-clocks.dtsi b/arch/arm/boot/dts/am43xx-clocks.dtsi
index 7630ba1d89e4..d1d73b725f47 100644
--- a/arch/arm/boot/dts/am43xx-clocks.dtsi
+++ b/arch/arm/boot/dts/am43xx-clocks.dtsi
@@ -104,6 +104,14 @@
clock-div = <1>;
};
+ rng_fck: rng_fck {
+ #clock-cells = <0>;
+ compatible = "fixed-factor-clock";
+ clocks = <&sys_clkin_ck>;
+ clock-mult = <1>;
+ clock-div = <1>;
+ };
+
ehrpwm0_tbclk: ehrpwm0_tbclk@664 {
#clock-cells = <0>;
compatible = "ti,gate-clock";