diff options
| author | Linus Walleij <linus.walleij@linaro.org> | 2014-10-13 13:21:40 +0200 |
|---|---|---|
| committer | Linus Walleij <linus.walleij@linaro.org> | 2014-10-22 13:49:13 +0200 |
| commit | 10d8ddee10b886e4aec0d3e44a73cfa7c35e72e0 (patch) | |
| tree | d7626bf25da1132f6dccb5fed1288c89428bb98d /arch/arm/boot/dts/arm-realview-pb1176.dts | |
| parent | 7406c3957f28aa6528f2d58d638f4f5a306b6122 (diff) | |
ARM: realview: add MMCI to the PB1176 DTS
This adds the MMC/SD card reader (MMCI) block to the
RealView PB1176 DTS file. Add a special MCLK derived clock
and a fixed regulator to represent the 3.3V rail hardwired
to the MMC reader on the board.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'arch/arm/boot/dts/arm-realview-pb1176.dts')
| -rw-r--r-- | arch/arm/boot/dts/arm-realview-pb1176.dts | 36 |
1 files changed, 36 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/arm-realview-pb1176.dts b/arch/arm/boot/dts/arm-realview-pb1176.dts index c292295ac1e3..ff26c7ed8c41 100644 --- a/arch/arm/boot/dts/arm-realview-pb1176.dts +++ b/arch/arm/boot/dts/arm-realview-pb1176.dts @@ -22,6 +22,7 @@ /dts-v1/; #include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/gpio/gpio.h> #include "skeleton.dtsi" / { @@ -43,6 +44,15 @@ reg = <0x00000000 0x08000000>; }; + /* The voltage to the MMC card is hardwired at 3.3V */ + vmmc: fixedregulator@0 { + compatible = "regulator-fixed"; + regulator-name = "vmmc"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + }; + xtal24mhz: xtal24mhz@24M { #clock-cells = <0>; compatible = "fixed-clock"; @@ -57,6 +67,14 @@ clocks = <&xtal24mhz>; }; + mclk: mclk@24M { + #clock-cells = <0>; + compatible = "fixed-factor-clock"; + clock-div = <1>; + clock-mult = <1>; + clocks = <&xtal24mhz>; + }; + kmiclk: kmiclk@24M { #clock-cells = <0>; compatible = "fixed-factor-clock"; @@ -288,6 +306,24 @@ compatible = "simple-bus"; ranges; + fpga_mci: mmcsd@10005000 { + compatible = "arm,pl18x", "arm,primecell"; + reg = <0x10005000 0x1000>; + interrupt-parent = <&intc_fpga1176>; + interrupts = <0 1 IRQ_TYPE_LEVEL_HIGH>, + <0 2 IRQ_TYPE_LEVEL_HIGH>; + /* Due to frequent FIFO overruns, use just 500 kHz */ + max-frequency = <500000>; + bus-width = <4>; + cap-sd-highspeed; + cap-mmc-highspeed; + clocks = <&mclk>, <&pclk>; + clock-names = "mclk", "apb_pclk"; + vmmc-supply = <&vmmc>; + cd-gpios = <&fpga_gpio1 0 GPIO_ACTIVE_LOW>; + wp-gpios = <&fpga_gpio1 1 GPIO_ACTIVE_HIGH>; + }; + fpga_kmi0: kmi@10006000 { compatible = "arm,pl050", "arm,primecell"; reg = <0x10006000 0x1000>; |